HMPS-2825 [AVAGO]
MiniPak Surface Mount RF Schottky Barrier Diodes Single and dual versions; MINIPAK表面贴装射频肖特基势垒二极管单，双版本
| 型号： | HMPS-2825 |
| 厂家： | 
AVAGO TECHNOLOGIES LIMITED |
| 描述： | MiniPak Surface Mount RF Schottky Barrier Diodes Single and dual versions |
| 文件： | 总8页 (文件大小：497K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HMPS-282x Series
MiniPak Surface Mount RF Schottky Barrier Diodes
Data Sheet
Description/Applications
Features
These ultra-miniature products represent the blending of • Surface mount MiniPak package
Avago Technologies’proven semiconductor and the latest
• Better thermal conductivity for higher power
in leadless packaging. This series of Schottky diodes is
the most consistent and best all-round device available,
and finds applications in mixing, detecting, switching,
dissipation
• Single and dual versions
sampling, clamping and wave shaping at frequencies up • Matched diodes for consistent performance
to 6 GHz. The MiniPak package offers reduced parasit-
ics when compared to conventional leaded diodes, and
lower thermal resistance.
• Low turn-on voltage (as low as 0.34 V at 1 mA)
• Low FIT (Failure in Time) rate*
• Six-sigma quality level
The HMPS-282x family of diodes offers the best all-around
• For more information, see the Surface Mount
choice for most applications, featuring low series resis-
tance, low forward voltage at all current levels and good
RF characteristics.
Schottky Reliability Data Sheet.
Note that Avago’s manufacturing techniques assure that
dice found in pairs and quads are taken from adjacent
sites on the wafer, assuring the highest degree of match.
Minipak 1412 is a ceramic based package, while Minipak
QFN is a leadframe based package.
Package Lead Code Identification (Top View)
Pin Connections and Package Marking
Single
Anti-parallel
Parallel
3
4
3
2
4
1
3
2
4
1
3
2
4
1
AA
2
1
#0
#2
#5
(MiniPak 1412)
(MiniPak 1412)
(MiniPak 1412)
Product code
Date code
Anti-parallel
Parallel
Notes:
1. Package marking provides orientation and identification.
2. See “Electrical Specifications”for appropriate package marking.
3
2
4
1
3
2
4
1
#2
#5
(MiniPak QFN)
(MiniPak QFN)
[1]
HMPS-282x Series Absolute Maximum Ratings , T = ꢀ5°ꢁ
ꢁ
MiniPak 1412/
MiniPak QFN
Symbol
Parameter
Units
A
If
Forward Current (1 µs pulse)
Peak Inverse Voltage
1
PIV
V
15
Tj
Junction Temperature
Storage Temperature
Thermal Resistance[2]
°C
150
Tstg
θjc
°C
-65 to +150
150
°C/W
Notes:
1. Operation in excess of any one of these conditions may result in permanent damage to the device.
2. = +25°C, where T is defined to be the temperature at the package pins where contact is made to the circuit board.
T
C
C
MiniPak 1412
Electrical Specifications, T = +ꢀ5°ꢁ, Single Diode
[4]
ꢁ
Minimum
Breakdown Forward
Voltage Voltage
Code Configuration V (V)
Maximum Maximum
Maximum
Reverse
Leakage
Typical
Dynamic
Part
Number Marking Lead
HMPS- Code
Package
Forward
Voltage
Maximum
Capacitance Resistance
[4]
V (mV)
F
V (V) @ I (mA) I (nA) @ V (V)
F
C (pF)
T
R (Ω)
D
BR
F
R
R
2820
L
0
Single
15
340
0.5
10
100
1
1.0
12
Test Conditions
IR = 100
μA
IF = 1
mA[1]
VF = 0 V
f = 1
IF = 5 mA
MHz[2]
Notes:
1. ∆V for diodes in pairs is 15 mV maximum at 1 mA.
F
2. ∆C for diodes in pairs is 0.2 pF maximum.
TO
3. Effective carrier lifetime (τ) for all these diodes is 100 ps maximum measured with Krakauer method at 5 mA.
4. = R + 5.2Ω at 25°C and I = 5 mA.
R
D
S
f
MiniPak QFN
Electrical Specifications, T = +ꢀ5°ꢁ, Single Diode
[4]
ꢁ
Minimum
Breakdown Forward
Voltage Voltage
Code Configuration V (V)
Maximum Maximum
Maximum
Reverse
Leakage
Typical
Dynamic
Part
Package
Forward
Voltage
Maximum
Number Marking Lead
HMPS-
Capacitance Resistance
[4]
Code
V (mV)
F
V (V) @ I (mA) I (nA) @ V (V) C (pF)
F
R (Ω)
D
BR
F
R
R
T
2822
2825
3
2
2
5
Anti-parallel 15
Parallel
340
0.5
10
100
1
1.0
12
Test Conditions
IR = 100
μA
IF = 1
mA[1]
VF = 0 V
f = 1
IF = 5 mA
MHz[2]
Notes:
1. ∆V for diodes in pairs is 15 mV maximum at 1 mA.
F
2. ∆C for diodes in pairs is 0.2 pF maximum.
TO
3. Effective carrier lifetime (τ) for all these diodes is 100 ps maximum measured with Krakauer method at 5 mA.
4.
R = R + 5.2Ω at 25°C and I = 5 mA.
D S f
ESD WARNING: Handling Precautions Should Be Taken To Avoid Static Discharge.
ꢀ
SPICE Parameters
Linear Equivalent Circuit Model Diode Chip
R
j
Parameter
Units
V
HMPS-282x
15
BV
CJ0
EG
IBV
IS
R
S
pF
eV
A
0.7
0.60
1E-4
2.2E-8
1.08
8.0
A
C
j
N
RS = series resistance (see Table of SPICE parameters)
Cj = junction capacitance (see Table of SPICE parameters)
RS
PB
PT
M
Ω
V
0.65
2
8.33 X 10-5 nT
Rj =
Ib + Is
0.5
where
Ib = externally applied bias current in amps
Is = saturation current (see table of SPICE parameters)
T = temperature, °K
n = ideality factor (see table of SPICE parameters)
MiniPak 1412 Linear Circuit Model of the Diode’s Package
Minipak QFN Linear Circuit Model of the Diode’s Package
20 fF
19 fF
3
4
0.043 nH
0.328 nH 0.328 nH
0.053 nH
3
2
4
1
30 fF
30 fF
2
1.1 nH
2 fF
16 fF
0.053 nH
20 fF
0.045 nH
1
0.329 nH 0.329 nH
20 fF
Single diode package (HMPx-x8x0)
18 fF
Parallel diode package (HMPx-x8x5)
19 fF
0.043 nH
0.328 nH 0.328 nH
0.053 nH
3
4
1
2 fF
16 fF
0.053 nH
20 fF
0.045 nH
0.329 nH 0.329 nH
2
18 fF
Anti-Parallel diode package (HMPx-x8x2)
ꢂ
MiniPak 1412 HMPS-282x Series Typical Performance
T = 25°C (unless otherwise noted), Single Diode
c
1
100,000
100
TA = +125°C
TA = +75°C
TA = +25°C
TA = –25°C
0.8
10,000
10
0.6
0.4
1000
100
1
0.1
TA = +125°C
TA = +75°C
TA = +25°C
0.2
0
10
1
0.01
0
2
4
6
8
0
5
10
15
0
0.10
0.20
0.30
0.40
0.50
V
– REVERSE VOLTAGE (V)
V
– REVERSE VOLTAGE (V)
V
– FORWARD VOLTAGE (V)
R
R
F
Figure 3. Total Capacitance vs. Reverse Voltage
at 1MHz
Figure 2. Reverse Current vs. Reverse Voltage
at Temperatures.
Figure 1. Forward Current vs. Forward Voltage
at Temperatures.
1000
30
30
10
100
10
1
1.0
I
(Left Scale)
10
F
I
(Left Scale)
100
F
10
1
ΔV (Right Scale)
F
1
1
ΔV (Right Scale)
F
0.3
0.3
1.4
0.1
0.25
0.1
1
10
100
0.2
0.4
0.6
0.8
1.0
1.2
0.10
0.15
0.20
I
– FORWARD CURRENT (mA)
V
- FORWARD VOLTAGE (V)
V - FORWARD VOLTAGE (V)
F
F
F
Figure 4. Dynamic Resistance vs. Forward
Current.
Figure 5. Typical V Match, Series Pairs and Quads
f
Figure 6. Typical V Match, Series Pairs at
f
at Mixer Bias Levels.
Detector Bias Levels.
1
10
1
10
9
DC bias = 3 μA
-25°C
0.1
+25°C
+75°C
0.1
0.01
8
18 nH HSMS-282B
3.3 nH
HSMS-282B
100 pF
+25°C
RF in
Vo
RF in
Vo
0.001
0.01
7
68 Ω
100 pF
0.0001
1E-005
100 KΩ
4.7 KΩ
0.001
6
-40
-30
-20
-10
0
-20
-10
0
10
20
30
0
2
4
6
8
10
12
P
in
– INPUT POWER (dBm)
P – INPUT POWER (dBm)
in
LOCAL OSCILLATOR POWER (dBm)
Figure 7. Typical Output Voltage vs. Input
Power, Small Signal Detector Operating at 850
MHz.
Figure 8. Typical Output Voltage vs. Input
Power, Large Signal Detector Operating at
915 MHz.
Figure 9. Typical Conversion Loss vs. L.O. Drive,
2.0 GHz (Ref AN997).
4
MiniPak QFN HMPS-2825 Series Typical Performance
T = 25°C (unless otherwise noted), Single Diode
c
1.0
0.8
0.6
0.4
0.2
0.0
100
100000
10000
1000
100
TA = +125°C
TA = +75°C
TA = +25°C
TA = -25°C
10
1
TA = +125°C
TA = +75°C
TA = +25°C
0.1
0.01
10
1
0
0.1
0.2
0.3
0.4
0.5
0
5
10
15
0
2
4
6
8
VF - FORWARD VOLTAGE (V)
VR – REVERSE VOLTAGE (V)
V R - REVERSE VOLTAGE (V)
Figure 10. Forward Current vs. Forward Voltage at
Temperatures.
Figure 12. Total Capacitance vs. Reverse Voltage
at 1MHz
Figure 11. Reverse Current vs. Reverse Voltage at
Temperatures.
30
10
30
10
100
10
1
1.0
1000
100
10
I
(Left Scale)
F
I
(Left Scale)
F
∆V (Right Scale)
F
1
1
∆V (Right Scale)
F
1
0.3
0.3
1.4
0.1
0.25
0.2
0.4
0.6
0.8
1.0
1.2
0.10
0.15
0.20
0.1
1.0
10.0
100.0
V
- FORWARD VOLTAGE (V)
V - FORWARD VOLTAGE (V)
F
F
IF- FORWARD CURRENT (mA)
Figure 13. Dynamic Resistance vs. Forward
Current.
Figure 14. Typical Vf Match, Series Pairs and
Quads at Mixer Bias Levels.
Figure 15. Typical Vf Match, Series Pairs at
Detector Bias Levels.
10
9
8
7
6
0
2
4
6
8
10
12
LOCAL OSCILLATOR POWER (dBm)
Figure 16. Typical Conversion Loss vs. L.O. Drive,
2.0 GHz (Ref AN997).
5
Assembly Information
SMT Assembly
The MiniPak diode is mounted to the PCB or microstrip
board using the pad pattern shown in Figure 17.
Reliable assembly of surface mount components is a
complex process that involves many material, process,
and equipment factors, including: method of heating
(e.g., IR or vapor phase reflow, wave soldering, etc.) circuit
board material, conductor thickness and pattern, type of
solder alloy, and the thermal conductivity and thermal
mass of components. Components with a low mass, such
as the MiniPak package, will reach solder reflow tempera-
tures faster than those with a greater mass.
0.4
0.5
0.4
0.3
0.5
0.3
After ramping up from room temperature, the circuit
board with components attached to it (held in place with
solder paste) passes through one or more preheat zones.
The preheat zones increase the temperature of the board
and components to prevent thermal shock and begin
evaporating solvents from the solder paste. The reflow
zone briefly elevates the temperature sufficiently to
produce a reflow of the solder.
Figure 17. PCB Pad Layout, MiniPak (dimensions in mm).
This mounting pad pattern is satisfactory for most ap-
plications. However, there are applications where a high
degree of isolation is required between one diode and
the other is required. For such applications, the mounting
pad pattern of Figure 18 is recommended.
The rates of change of temperature for the ramp-up
and cool-down zones are chosen to be low enough
to not cause deformation of the board or damage to
components due to thermal shock. The maximum
0.40 mm via hole
(4 places)
0.20
temperature in the reflow zone (T
255°C.
) should not exceed
MAX
2.40
0.8
These parameters are typical for a surface mount assembly
process for Avago diodes. As a general guideline, the
circuit board and components should be exposed only
to the minimum temperatures and times necessary to
achieve a uniform reflow of solder.
0.40
2.60
Figure 18. PCB Pad Layout, High Isolation MiniPak (dimensions in mm).
This pattern uses four via holes, connecting the crossed
ground strip pattern to the ground plane of the board.
ꢃ
MiniPak 1412 Outline Drawing
1.44 (0.057)
1.40 (0.055)
1.12 (0.044)
1.08 (0.043)
0.82 (0.032)
0.78 (0.031)
1.20 (0.047)
1.16 (0.046)
0.32 (0.013)
0.28 (0.01 1)
0.00
Top view
-0.07 (-0.003)
-0.03 (-0.001)
0.92 (0.036)
0.88 (0.035)
0.00
-0.07 (-0.003) 0.42 (0.017)
-0.03 (-0.001) 0.38 (0.015)
1.32 (0.052)
1.28 (0.050)
0.70 (0.028 )
0.58 (0.023)
Bottom view
Side view
Dimensions are in millimeters (inches)
MiniPak QFN Outline Drawing
1.47 (0.058)
1.37 (0.054)
0.50 (0.020)
0.28 (0.011)
1.23 (0.048)
1.13 (0.044)
0.50 (0.020)
0.28 (0.011)
Top View
0.35 (0.014)
0.60 (0.024)
0.40 (0.016)
0.30 (0.012)
0.60 (0.024)
0.50 (0.020)
Side View
Bottom View
Dimensions are in millimeters (inches)
Ordering Information
Part Number
No. of Devices
10000
Container
13˝ Reel
7˝ Reel
HMPS-282x-TR2
HMPS-282x-TR1
HMPS-282x-BLK
3000
100
antistatic bag
ꢄ
Device Orientation
REEL
4 mm
8 mm
CARRIER
TAPE
TOP VIEW
END VIEW
USER
FEED
DIRECTION
Note: “AA” represents package marking code. Package marking is right side
up with carrier tape perforations at top. Conforms to Electronic Industries
RS-481, “Taping of Surface Mounted Components for Automated
Placement.” Standard quantity is 3,000 devices per reel.
COVER TAPE
Tape Dimensions and Product Orientation
For Outline 4T (MiniPak 1412 & MiniPak QFN)
P
P
D
2
P
0
E
F
W
C
D
1
t
(CARRIER TAPE THICKNESS)
T (COVER TAPE THICKNESS)
t
1
K
5
°
MAX.
5° MAX.
0
A
B
0
0
DESCRIPTION
SYMBOL
SIZE (mm)
1.40 0.05
1.63 0.05
0.80 0.05
4.00 0.10
0.80 0.05
SIZE (INCHES)
CAVITY
LENGTH
WIDTH
DEPTH
PITCH
A
B
K
P
D
0.055
0.064
0.031
0.157
0.031
0.002
0.002
0.002
0.004
0.002
0
0
0
BOTTOM HOLE DIAMETER
1
0
PERFORATION
DIAMETER
PITCH
POSITION
D
P
E
1.50 0.10
4.00 0.10
1.75 0.10
0.060
0.157
0.069
0.004
0.004
0.004
CARRIER TAPE
COVER TAPE
DISTANCE
WIDTH
THICKNESS
W
8.00 + 0.30 - 0.10
0.315 + 0.012 - 0.004
t
0.254
0.02
0.010
0.001
1
WIDTH
TAPE THICKNESS
C
T
5.40 0.10
0.213
0.002
0.004
0.00004
0.062
0.001
t
CAVITY TO PERFORATION
(WIDTH DIRECTION)
F
3.50 0.05
0.138
0.002
CAVITY TO PERFORATION
(LENGTH DIRECTION)
P
2.00 0.05
0.079
0.002
2
For product information and a complete list of distributors, please go to our web site: www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.
Data subject to change. ꢁopyright © ꢀ005-ꢀ009 Avago Technologies. All rights reserved. Obsoletes 5989-ꢂꢃꢀ8EN
AV0ꢀ-05ꢄ1EN - January ꢀꢂ, ꢀ009
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