HSMP-383X [AVAGO]
Surface Mount RF PIN Diodes;
| 型号： | HSMP-383X |
| 厂家： | 
AVAGO TECHNOLOGIES LIMITED |
| 描述： | Surface Mount RF PIN Diodes |
| 文件： | 总7页 (文件大小：272K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HSMP-383x
Surface Mount RF PIN Diodes
Data Sheet
Description/Applications
Features
Theꢀ HSMP-383xꢀ seriesꢀ ofꢀ generalꢀ purposeꢀ PINꢀ diodesꢀ
areꢀ designedꢀ forꢀ twoꢀ classesꢀ ofꢀ applications.ꢀ Theꢀ firstꢀ
isꢀattenuatorsꢀwhereꢀcurrentꢀconsumptionꢀisꢀtheꢀmostꢀ
importantꢀdesignꢀconsideration.ꢀTheꢀsecondꢀapplicationꢀ
forꢀ thisꢀ seriesꢀ ofꢀ diodesꢀ isꢀ inꢀ switchesꢀ whereꢀ lowꢀ
capacitanceꢀisꢀtheꢀdrivingꢀissueꢀforꢀtheꢀdesigner.
•ꢀ DiodesꢀOptimizedꢀfor:ꢀ
LowꢀCapacitanceꢀSwitchingꢀ
LowꢀCurrentꢀAttenuator
•ꢀ SurfaceꢀMountꢀSOT-23ꢀPackageꢀ
SingleꢀandꢀDualꢀVersionsꢀ
TapeꢀandꢀReelꢀOptionsꢀAvailable
[1]
TheꢀHSMP-386xꢀseriesꢀTotalꢀCapacitanceꢀ(CT)ꢀandꢀTotalꢀ
Resistanceꢀ(RT)ꢀareꢀtypicalꢀspecifications.ꢀForꢀapplicationsꢀ
thatꢀ requireꢀ guaranteedꢀ performance,ꢀ theꢀ generalꢀ
purposeꢀHSMP-383xꢀseriesꢀisꢀrecommended.
•ꢀ LowꢀFailureꢀinꢀTimeꢀ(FIT)ꢀRate
•ꢀ Lead-free
Note:
1.ꢀ ForꢀmoreꢀinformationꢀseeꢀtheꢀSurfaceꢀMountꢀPINꢀReliabilityꢀDataꢀSheet.
AꢀSPICEꢀmodelꢀisꢀnotꢀavailableꢀforꢀPINꢀdiodesꢀasꢀSPICEꢀ
doesꢀ notꢀ provideꢀ forꢀ aꢀ keyꢀ PINꢀ diodeꢀ characteristic,ꢀ
carrierꢀlifetime.
Package Lead Code Identification (Top View)
SERIES
SINGLE
#2
#0
COMMON
ANODE
COMMON
CATHODE
#3
#4
[1]
Absolute Maximum Ratings TC = 25°C
Symbol
Ifꢀ
Parameter
Units
Absolute Maximum
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ForwardꢀCurrentꢀ(1ꢀmsꢀPulse)ꢀ
TotalꢀDeviceꢀDissipationꢀ
PeakꢀInverseꢀVoltageꢀ
JunctionꢀTemperatureꢀ
StorageꢀTemperatureꢀ
Ampꢀ
1
[2]ꢀ
Ptꢀ
mW
—ꢀ
250
Pivꢀ
Tjꢀ
SameꢀasꢀV
BR
°Cꢀ
°Cꢀ
150
TSTG
ꢀ
-65ꢀtoꢀ150
Notes:
1.ꢀ Operationꢀinꢀexcessꢀofꢀanyꢀoneꢀofꢀtheseꢀconditionsꢀmayꢀresultꢀinꢀpermanentꢀꢀdamageꢀtoꢀ
thisꢀdevice.
2.ꢀ CWꢀPowerꢀDissipationꢀatꢀTLEADꢀ=ꢀ25°C.ꢀDerateꢀtoꢀzeroꢀatꢀmaximumꢀratedꢀtemperature.
PIN General Purpose Diodes, Electrical Specifications TC = 25°C
Minimum
Breakdown
Voltage
Maximum
Series
Resistance
RS (Ω)
Maximum
Total
Capacitance
CT (pF)
Part
Number
HSMP-
Package
Marking
Code
Lead
Code
Configuration
VBR (V)
ꢀ
ꢀ
ꢀ
ꢀ
3830ꢀ
3832ꢀ
3833ꢀ
3834ꢀ
K0ꢀ
K2ꢀ
K3ꢀ
K4ꢀ
0ꢀ
2ꢀ
3ꢀ
4ꢀ
Singleꢀ
Series
CommonꢀAnode
CommonꢀCathode
200ꢀ
1.5ꢀ
0.3
ꢀ
ꢀ
ꢀ
ꢀ ꢀTestꢀConditionsꢀ
ꢀ
ꢀ
ꢀ
ꢀ
VRꢀ=ꢀVBRꢀ
Measureꢀ
IRꢀ≤ꢀ10ꢀmA
IFꢀ=ꢀ100ꢀmAꢀ
fꢀ=ꢀ100ꢀMHzꢀ
VRꢀ=ꢀ50ꢀV
fꢀ=ꢀ1ꢀMHz
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
Typical Parameters at TC = 25°C
Part Number
HSMP-
Series Resistance
RS (Ω)
Carrier Lifetime
Reverse Recovery Time
Total Capacitance
CT (pF)
τ (ns)
Trr (ns)
ꢀ
383xꢀ
20ꢀ
500ꢀ
80ꢀ
0.20ꢀ@ꢀ50ꢀV
ꢀ
ꢀ
ꢀ
ꢀ ꢀTestꢀConditionsꢀ
IFꢀ=ꢀ1ꢀmAꢀ
fꢀ=ꢀ100ꢀMHzꢀ
ꢀ
IFꢀ=ꢀ50ꢀmAꢀ
IRꢀ=ꢀ250ꢀmAꢀ
ꢀ
VRꢀ=ꢀ10ꢀV
IFꢀ=ꢀ20ꢀmA
90%ꢀRecovery
ꢀ
ꢀ
2
Typical Parameters at TC = 25°C (unless otherwise noted), Single Diode
0.35
1000
100
10
100
0.30
10
1 MHz
0.25
0.20
1
100 MHz
1 GHz
1
0.1
125C 25C –50C
0.2 0.4 0.6 0.8
– FORWARD VOLTAGE (mA)
0.01
0.1
0.01
0.15
0
1.0 1.2
0
2
4
6
8
10 12 14 16 18 20
0.1
I – FORWARD BIAS CURRENT (mA)
F
1
10
100
V
REVERSE VOLTAGE (V)
F
Figure 2. RF Capacitance vs. Reverse Bias.
Figure 3. RF Resistance at 25C vs. Forward Bias Current.
Figure 1. Forward Current vs. Forward Voltage.
120
120
1000
Diode Mounted as a
Series Attenuator in a
50 Ohm Microstrip and
Tested at 123 MHz
Diode Mounted as a
Series Attenuator
in a 50 Ohm Microstrip
HSMP-3830
110
115
100 and Tested at 123 MHz
110
V
V
= 5V
R
90
80
70
60
50
40
105
100
95
= 10V
= 20V
R
R
100
V
90
85
10
10
20
FORWARD CURRENT (mA)
30
1000
100
10
1
10
30
DIODE RF RESISTANCE ()
I
– FORWARD BIAS CURRENT (mA)
F
Figure 6. Reverse Recovery Time vs. Forward Current
for Various Reverse Voltage.
Figure 4. 2nd Harmonic Input Intercept Point vs.
Diode RF Resistance for Attenuators.
Figure 5. 2nd Harmonic Input Intercept Point vs.
Forward Bias Current for Switches.
3
Typical Applications for Multiple Diode Products
RF COMMON
RF COMMON
RF 2
RF 1
RF 1
RF 2
BIAS
BIAS
BIAS 1
BIAS 2
Figure 8. High Isolation SPDT Switch, Dual Bias.
Figure 7. Simple SPDT Switch, Using Only Positive Current.
RF COMMON
RF COMMON
BIAS
RF 1
RF 2
RF 2
RF 1
BIAS
Figure 9. Switch Using Both Positive and Negative Current.
Figure 10. Very High Isolation SPDT Switch, Dual Bias.
4
Typical Applications for Multiple Diode Products (continued)
VARIABLE BIAS
RF IN/OUT
INPUT
FIXED
BIAS
VOLTAGE
Figure 11. Four Diode π Attenuator. See AN1048 for details.
BIAS
Figure 12. High Isolation SPST Switch (Repeat Cells as Required).
5
Package Dimensions
Outline 23 (SOT-23)
Recommended PCB Pad Layout
for Avago’s SOT-23 Products
0.039
1
e2
0.039
1
e1
0.079
2.0
E1
E
XXX
0.035
0.9
e
L
0.031
0.8
B
D
C
inches
mm
Dimensions in
DIMENSIONS (mm)
SYMBOL
MIN.
0.79
0.000
0.30
0.08
2.73
1.15
0.89
1.78
0.45
2.10
0.45
MAX.
1.20
0.100
0.54
0.20
3.13
1.50
1.02
2.04
0.60
2.70
0.69
A
A1
B
C
D
E1
e
e1
e2
E
A
A1
Notes:
XXX-package marking
Drawings are not to scale
L
Package Characteristics
LeadꢀMaterialꢀ.............................................................................................................................Alloyꢀ42
LeadꢀFinishꢀ..........................................................................................Tinꢀ100%ꢀ(Lead-freeꢀoption)
MaximumꢀSolderingꢀTemperatureꢀ............................................................. 260°Cꢀforꢀ5ꢀseconds
MinimumꢀLeadꢀStrengthꢀ............................................................................................2ꢀpoundsꢀpull
TypicalꢀPackageꢀInductanceꢀ....................................................................................................... 2ꢀnH
TypicalꢀPackageꢀCapacitanceꢀ...............................................................0.08ꢀpFꢀ(oppositeꢀleads)
Ordering Information
Specifyꢀpartꢀnumberꢀfollowedꢀbyꢀoption.ꢀForꢀexample:
ꢀ
ꢀꢀꢀꢀꢀꢀHSMPꢀꢀ-ꢀꢀꢀ383xꢀꢀꢀꢀ-ꢀꢀꢀXXX
ꢀ
ꢀ
ꢀ
BulkꢀorꢀTapeꢀandꢀReelꢀOption
PartꢀNumber
SurfaceꢀMountꢀPINꢀDiode
Profile Option Descriptions
-BLKGꢀ=ꢀBulk
-TR1Gꢀ=ꢀ3Kꢀpc.ꢀTapeꢀandꢀReel,ꢀDeviceꢀOrientation;ꢀSeeꢀFigureꢀ13
-TR2Gꢀ=ꢀ10Kꢀpc.ꢀTapeꢀandꢀReel,ꢀDeviceꢀOrientation;ꢀSeeꢀFigureꢀ13
TapeꢀandꢀReelingꢀconformsꢀtoꢀElectronicꢀIndustriesꢀRS-481,ꢀ“TapingꢀofꢀSurfaceꢀ
MountedꢀComponentsꢀforꢀAutomatedꢀPlacement.”
6
Device Orientation For Outlines SOT-23
REEL
TOP VIEW
4 mm
END VIEW
8 mm
ABC
ABC
ABC
ABC
CARRIER
TAPE
USER
FEED
DIRECTION
Note: "AB" represents package marking code.
"C" represents date code.
COVER TAPE
Figure 13. Options -TR1, -TR2 for SOT-23 Packages.
Tape Dimensions and Product Orientation For Outline SOT-23
P
P
D
2
E
P
0
F
W
D
1
t1
Ko
13.5° MAX
8° MAX
9° MAX
B
A
0
0
DESCRIPTION
SYMBOL
SIZE (mm)
SIZE (INCHES)
CAVITY
LENGTH
WIDTH
DEPTH
PITCH
A
B
K
P
3.15 ± 0.10
2.77 ± 0.10
1.22 ± 0.10
4.00 ± 0.10
1.00 + 0.05
0.124 ± 0.004
0.109 ± 0.004
0.048 ± 0.004
0.157 ± 0.004
0.039 ± 0.002
0
0
0
BOTTOM HOLE DIAMETER
D
1
PERFORATION
CARRIER TAPE
DIAMETER
PITCH
POSITION
D
1.50 + 0.10
4.00 ± 0.10
1.75 ± 0.10
0.059 + 0.004
0.157 ± 0.004
0.069 ± 0.004
P
E
0
WIDTH
W
8.00+0.30–0.10 0.315+0.012–0.004
THICKNESS
t1
0.229 ± 0.013
0.009 ± 0.0005
DISTANCE
BETWEEN
CAVITY TO PERFORATION
(WIDTH DIRECTION)
F
3.50 ± 0.05
0.138 ± 0.002
CENTERLINE
CAVITY TO PERFORATION
(LENGTH DIRECTION)
P
2.00 ± 0.05
0.079 ± 0.002
2
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Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.
Data subject to change. Copyright © 2005-2009 Avago Technologies. All rights reserved. Obsoletes 5989-4027EN
AV02-1425EN - June 2, 2009
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