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HSMS-2818-BLKG [AVAGO]

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HSMS-2818-BLKG
型号： HSMS-2818-BLKG
厂家： AVAGO TECHNOLOGIES LIMITED    AVAGO TECHNOLOGIES LIMITED
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肖特基二极管 测试 射频 脉冲 光电二极管
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HSMS-281x  
Surface Mount RF Schottky Barrier Diodes  
Data Sheet  
Description/Applications  
Features  
These Schottky diodes are specifically designed for both • Surface Mount Packages  
analog and digital applications. This series offers a wide  
range of specifications and package configurations to  
give the designer wide flexibility. The HSMS‑281x series of  
• Low Flicker Noise  
• Low FIT (Failure in Time) Rate*  
diodes features very low flicker (1/f) noise.  
• Six‑sigma Quality Level  
• Single, Dual and Quad Versions  
• Tape and Reel Options Available  
• Lead‑free  
Note that Avago’s manufacturing techniques assure that  
dice found in pairs and quads are taken from adjacent  
sites on the wafer, assuring the highest degree of match.  
• For more information see the Surface Mount Schottky  
Reliability Data Sheet.  
Pin Connections and Package Marking  
Package Lead Code Identification, SOT-23/SOT-143  
(Top View)  
COMMON  
ANODE  
3
COMMON  
CATHODE  
3
1
2
3
6
5
4
SINGLE  
3
SERIES  
3
1
2
1
2
1
2
1
2
#4  
#0  
#2  
#3  
UNCONNECTED  
PAIR  
RING  
BRIDGE  
QUAD  
Notes:  
QUAD  
3
4
3
4
3
4
1. Package marking provides orientation and identification.  
2. See “Electrical Specifications”for appropriate package marking.  
1
2
1
2
1
2
#5  
#7  
#8  
Package Lead Code Identification, SOT-323  
(Top View)  
Package Lead Code Identification, SOT-363  
(Top View)  
SERIES  
SINGLE  
HIGH ISOLATION  
UNCONNECTED  
TRIO  
UNCONNECTED PAIR  
6
5
4
6
5
4
B
C
1
2
3
1
2
3
COMMON  
ANODE  
COMMON  
CATHODE  
K
L
E
F
Absolute Maximum Ratings[1] TC = 25°C  
Symbol  
Parameter  
Unit  
Amp  
V
SOT-23/SOT-143  
1
SOT-323/SOT-363  
If  
Forward Current (1 μs Pulse)  
Peak Inverse Voltage  
Junction Temperature  
Storage Temperature  
Thermal Resistance[2]  
1
PIV  
Tj  
Same as VBR  
150  
Same as VBR  
150  
°C  
Tstg  
°C  
‑65 to 150  
500  
‑65 to 150  
150  
θjc  
°C/W  
Notes:  
1. Operation in excess of any one of these conditions may result in permanent damage to the device.  
2. TC = +25°C, where TC is defined to be the temperature at the package pins where contact is made to the circuit board.  
ESD WARNING: Handling Precautions Should Be Taken To Avoid Static Discharge.  
Electrical Specifications TC = 25°C, Single Diode[3]  
Maximum Maximum  
Minimum Maximum Forward  
Reverse  
Leakage  
Typical  
Dynamic  
Part  
Package  
Breakdown Forward  
Voltage  
VF (V) @  
IF (mA)  
Maximum  
Number Marking Lead  
Voltage  
VBR (V)  
Voltage  
VF (mV)  
IR (nA) @ Capacitance Resistance  
VR (V)  
HSMS[4]  
Code  
Code Configuration  
CT (pF)  
RD (Ω)[5]  
2810  
2812  
2813  
2814  
2815  
2817  
2818  
281B  
281C  
281E  
281F  
281K  
B0  
B2  
B3  
B4  
B5  
B7  
B8  
B0  
B2  
B3  
B4  
BK  
0
2
3
4
5
7
8
B
C
E
F
K
Single  
20  
410  
1.0 35 200 15  
1.2  
15  
Series  
Common Anode  
Common Cathode  
Unconnected Pair  
Ring Quad[4]  
Bridge Quad[4]  
Single  
Series  
Common Anode  
Common Cathode  
High Isolation  
Unconnected Pair  
Unconnected Trio  
281L  
BL  
L
Test Conditions  
IR = 10 mA IF = 1 mA  
VF = 0 V  
f = 1 MHz  
IF = 5 mA  
Notes:  
1. ∆VF for diodes in pairs and quads in 15 mV maximum at 1 mA.  
2. ∆CTO for diodes in pairs and quads is 0.2 pF maximum.  
3. Effective Carrier Lifetime (τ) for all these diodes is 100 ps maximum measured with Krakauer method at 5 mA.  
4. See section titled “Quad Capacitance.”  
5. RD = RS + 5.2Ω at 25°C and If = 5 mA.  
2
Quad Capacitance  
Linear Equivalent Circuit Model Diode Chip  
R
j
Capacitance of Schottky diode quads is measured using  
an HP4271 LCR meter. This instrument effectively isolates  
individual diode branches from the others, allowing ac‑  
curate capacitance measurement of each branch or each  
diode. The conditions are: 20 mV R.M.S. voltage at 1 MHz.  
Avago defines this measurement as “CM”, and it is equiva‑  
lent to the capacitance of the diode by itself. The equiva‑  
lent diagonal and adjacent capaci‑tances can then be cal‑  
culated by the formulas given below.  
R
S
C
j
RS = series resistance (see Table of SPICE parameters)  
Cj = junction capacitance (see Table of SPICE parameters)  
In a quad, the diagonal capacitance is the capacitance be‑  
tween points A and B as shown in the figure below. The  
diagonal capacitance is calculated using the following  
formula  
8.33 X 10-5 nT  
Rj =  
Ib + Is  
where  
Ib = externally applied bias current in amps  
Is = saturation current (see table of SPICE parameters)  
T = temperature, °K  
C1 x C  
C3 x C  
4
CDIAGONAL = ______2_ + _______  
C1 + C 2 C3 + C 4  
n = ideality factor (see table of SPICE parameters)  
The equivalent adjacent capacitance is the capacitance  
between points A and C in the figure below. This capaci‑  
tance is calculated using the following formula  
Note:  
To effectively model the packaged HSMS-281x product,  
please refer to Application Note AN1124.  
1
CADJACENT = C 1 + ____________  
ESD WARNING:  
1
1
1
–– + –– + ––  
C 2 C3 C4  
Handling Precautions Should Be Taken To Avoid Static Discharge.  
SPICE Parameters  
This information does not apply to cross‑over quad di‑  
odes.  
Parameter  
Units  
HSMS-281x  
BV  
CJ0  
EG  
IBV  
IS  
V
pF  
eV  
A
25  
1.1  
0.69  
E‑5  
A
4.8E‑9  
1.08  
10  
N
RS  
PB  
PT  
M
Ω
V
0.65  
2
0.5  
3
Typical Performance, TC = 25°C (unless otherwise noted), Single Diode  
100  
100,000  
1000  
100  
10,000  
10  
1000  
100  
1
10  
1
TA = +125C  
TA = +75C  
TA = +25C  
TA = –25C  
0.1  
TA = +125C  
TA = +75C  
TA = +25C  
10  
1
0.01  
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8  
0
5
10  
15  
0.1  
1
10  
100  
V
– FORWARD VOLTAGE (V)  
V – REVERSE VOLTAGE (V)  
R
I
– FORWARD CURRENT (mA)  
F
F
Figure 1. Forward Current vs. Forward Voltage at  
Temperatures.  
Figure 2. Reverse Current vs. Reverse Voltage at  
Temperatures.  
Figure 3. Dynamic Resistance vs. Forward  
Current.  
1.25  
1
30  
10  
30  
I
(Left Scale)  
F
10  
0.75  
V
(Right Scale)  
F
0.50  
0.25  
0
1
1
0.3  
0.2  
0.3  
1.4  
0
2
4
6
8
10 12 14 16  
0.4  
0.6  
0.8  
1.0  
1.2  
V
– REVERSE VOLTAGE (V)  
V
- FORWARD VOLTAGE (V)  
R
F
Figure 4. Total Capacitance vs. Reverse Voltage.  
Figure 5. Typical V Match, Pairs and Quads.  
f
4
Applications Information  
Assembly Instructions  
Introduction — Product Selection  
SOT-323 PCB Footprint  
Avago’s family of Schottky products provides unique solu‑ A recommended PCB pad layout for the miniature SOT‑  
tions to many design problems.  
323 (SC‑70) package is shown in Figure 6 (dimensions are  
in inches). This layout provides ample allowance for pack‑  
age placement by automated assembly equipment with‑  
out adding parasitics that could impair the performance.  
The first step in choosing the right product is to select  
the diode type. All of the products in the HSMS‑282x fam‑  
ily use the same diode chip, and the same is true of the  
HSMS‑281x and HSMS‑280x families. Each family has a dif‑  
ferent set of characteristics which can be compared most  
easily by consulting the SPICE parameters in Table 1.  
0.026  
A review of these data shows that the HSMS‑280x family  
has the highest breakdown voltage, but at the expense of  
a high value of series resistance (Rs). In applications which  
do not require high voltage the HSMS‑282x family, with a  
lower value of series resistance, will offer higher current  
carrying capacity and better performance.The HSMS‑281x  
family is a hybrid Schottky (as is the HSMS‑280x), offering  
lower 1/f or flicker noise than the HSMS‑282x family.  
0.079  
0.039  
0.022  
Dimensions in inches  
Figure 6. Recommended PCB Pad Layout for Avago’s SC70 3L/SOT-323 Products.  
In general, the HSMS‑282x family should be the designer’s  
first choice, with the ‑280x family reserved for high volt‑  
age applications and the HSMS‑281x family for low flicker  
noise applications.  
Assembly Instructions  
SOT-363 PCB Footprint  
A recommended PCB pad layout for the miniature SOT‑  
363 (SC‑70, 6 lead) package is shown in Figure 7 (dimen‑  
sions are in inches). This layout provides ample allowance  
for package placement by automated assembly equip‑  
ment without adding parasitics that could impair the per‑  
formance.  
Table 1. Typical SPICE Parameters.  
Parameter Units  
HSMS-280x HSMS-281x HSMS-282x  
BV  
V
75  
25  
15  
CJ0  
EG  
pF  
eV  
A
1.6  
1.1  
0.7  
0.026  
0.69  
1 E‑5  
3 E‑8  
1.08  
30  
0.69  
1 E‑5  
4.8 E‑9  
1.08  
10  
0.69  
1 E‑4  
2.2 E‑8  
1.08  
6.0  
IBV  
IS  
A
N
0.079  
RS  
Ω
V
PB (VJ)  
PT (XTI)  
M
0.65  
2
0.65  
2
0.65  
2
0.039  
0.5  
0.5  
0.5  
0.018  
Dimensions in inches  
Figure 7. Recommended PCB Pad Layout for Avago’s SC70 6L/SOT-363 Products.  
5
SMT Assembly  
The preheat zones increase the temperature of the board  
and components to prevent thermal shock and begin  
evaporating solvents from the solder paste. The reflow  
zone briefly elevates the temperature sufficiently to pro‑  
duce a reflow of the solder.  
Reliable assembly of surface mount components is a com‑  
plex process that involves many material, process, and  
equipment factors, including: method of heating (e.g., IR  
or vapor phase reflow, wave soldering, etc.) circuit board  
material, conductor thickness and pattern, type of solder  
alloy, and the thermal conductivity and thermal mass of  
components. Components with a low mass, such as the  
SOT package, will reach solder reflow temperatures faster  
than those with a greater mass.  
The rates of change of temperature for the ramp‑up and  
cool‑down zones are chosen to be low enough to not  
cause deformation of the board or damage to compo‑  
nents due to thermal shock. The maximum temperature  
in the reflow zone (TMAX) should not exceed 260°C.  
Avago’s SOT diodes have been qualified to the time‑tem‑  
perature profile shown in Figure 8. This profile is repre‑  
sentative of an IR reflow type of surface mount assembly  
process.  
These parameters are typical for a surface mount assem‑  
bly process for Avago diodes. As a general guideline, the  
circuit board and components should be exposed only  
to the minimum temperatures and times necessary to  
achieve a uniform reflow of solder.  
After ramping up from room temperature, the circuit  
board with components attached to it (held in place with  
solder paste) passes through one or more preheat zones.  
tp  
Critical Zone  
T L to Tp  
Tp  
T L  
Ramp-up  
tL  
Ts  
max  
Ts  
min  
Ramp-down  
ts  
Preheat  
25  
t 25° C to Peak  
Time  
Figure 8. Surface Mount Assembly Profile.  
Lead-Free Reflow Profile Recommendation (IPC/JEDEC J-STD-020C)  
Reflow Parameter  
Lead-Free Assembly  
Average ramp‑up rate (Liquidus Temperature (TS(max) to Peak)  
3°C/ second max  
Preheat  
Temperature Min (TS(min)  
)
150°C  
Temperature Max (TS(max)  
)
200°C  
Time (min to max) (tS)  
60‑180 seconds  
3°C/second max  
217°C  
Ts(max) to TL Ramp‑up Rate  
Time maintained above:  
Temperature (TL)  
Time (tL)  
60‑150 seconds  
260 +0/‑5°C  
20‑40 seconds  
6°C/second max  
8 minutes max  
Peak Temperature (TP)  
Time within 5 °C of actual Peak temperature (tP)  
Ramp‑down Rate  
Time 25 °C to Peak Temperature  
Note 1: All temperatures refer to topside of the package, measured on the package body surface  
6
Part Number Ordering Information  
No. of  
Part Number  
Devices  
10000  
3000  
Container  
13" Reel  
HSMS‑281x‑TR2G  
HSMS‑281x‑TR1G  
HSMS‑281x‑BLKG  
7" Reel  
100  
antistatic bag  
x = 0, 2, 3, 4, 5, 7, 8, B, C, E, F, K, L  
Package Dimensions  
Outline 23 (SOT-23)  
Outline SOT-323 (SC-70 3 Lead)  
e1  
e2  
e1  
E1  
E
XXX  
E1  
E
XXX  
e
L
B
e
C
L
D
DIMENSIONS (mm)  
B
D
C
SYMBOL  
MIN.  
0.80  
0.00  
0.15  
0.08  
1.80  
1.10  
MAX.  
1.00  
0.10  
0.40  
0.25  
2.25  
1.40  
A
A1  
B
C
D
E1  
e
e1  
E
DIMENSIONS (mm)  
A
SYMBOL  
MIN.  
0.79  
0.000  
0.30  
0.08  
2.73  
1.15  
0.89  
1.78  
0.45  
2.10  
0.45  
MAX.  
1.20  
0.100  
0.54  
0.20  
3.13  
1.50  
1.02  
2.04  
0.60  
2.70  
0.69  
A
A1  
B
C
D
E1  
e
e1  
e2  
E
A1  
A
0.65 typical  
1.30 typical  
Notes:  
A1  
1.80  
0.26  
2.40  
0.46  
XXX-package marking  
Drawings are not to scale  
L
Notes:  
XXX-package marking  
Drawings are not to scale  
L
7
Outline 143 (SOT-143)  
Outline SOT-363 (SC-70 6 Lead)  
e2  
e1  
HE  
E
B1  
E1  
L
E
XXX  
e
c
D
DIMENSIONS (mm)  
L
SYMBOL  
E
D
HE  
A
A2  
A1  
e
MIN.  
1.15  
1.80  
1.80  
0.80  
0.80  
0.00  
MAX.  
1.35  
2.25  
2.40  
1.10  
1.00  
0.10  
B
C
e
A1  
A2  
A
DIMENSIONS (mm)  
D
SYMBOL  
MIN.  
0.79  
0.013  
0.36  
0.76  
0.086  
2.80  
1.20  
0.89  
1.78  
0.45  
2.10  
0.45  
MAX.  
1.097  
0.10  
0.54  
0.92  
0.152  
3.06  
1.40  
1.02  
2.04  
0.60  
2.65  
0.69  
0.650 BCS  
A
A1  
B
b
c
L
0.15  
0.08  
0.10  
0.30  
0.25  
0.46  
b
A
B1  
C
A1  
D
E1  
e
e1  
e2  
E
Notes:  
XXX-package marking  
Drawings are not to scale  
L
For Outlines SOT-23, -323  
Device Orientation  
REEL  
TOP VIEW  
4 mm  
END VIEW  
8 mm  
CARRIER  
TAPE  
ABC  
ABC  
ABC  
ABC  
USER  
FEED  
DIRECTION  
Note: "AB" represents package marking code.  
"C" represents date code.  
COVER TAPE  
For Outline SOT-143  
For Outline SOT-363  
TOP VIEW  
4 mm  
END VIEW  
TOP VIEW  
4 mm  
END VIEW  
8 mm  
A B C  
A B C  
A B C  
A B C  
8 mm  
ABC  
ABC  
ABC  
ABC  
Note: "AB" represents package marking code.  
"C" re resents date code.  
Note: "AB" represents package marking code.  
"C" represents date code.  
p
8
Tape Dimensions and Product Orientation  
For Outline SOT-23  
P
P
D
2
E
F
P
0
W
D
1
t1  
Ko  
13.5° MAX  
8° MAX  
9° MAX  
B
A
0
0
DESCRIPTION  
SYMBOL  
SIZE (mm)  
SIZE (INCHES)  
CAVITY  
LENGTH  
WIDTH  
DEPTH  
PITCH  
A
B
K
P
D
3.15 0.10  
2.77 0.10  
1.22 0.10  
4.00 0.10  
1.00 + 0.05  
0.124 0.004  
0.109 0.004  
0.048 0.004  
0.157 0.004  
0.039 0.002  
0
0
0
BOTTOM HOLE DIAMETER  
1
0
PERFORATION  
CARRIER TAPE  
DIAMETER  
PITCH  
POSITION  
D
P
E
1.50 + 0.10  
4.00 0.10  
1.75 0.10  
0.059 + 0.004  
0.157 0.004  
0.069 0.004  
WIDTH  
W
8.00+0.30 –0.10 0.315+0.012 –0.004  
THICKNESS  
t1  
0.229 0.013  
0.009 0.0005  
DISTANCE  
BETWEEN  
CENTERLINE  
CAVITY TO PERFORATION  
(WIDTH DIRECTION)  
CAVITY TO PERFORATION  
(LENGTH DIRECTION)  
F
P
3.50 0.05  
0.138 0.002  
2.00 0.05  
0.079 0.002  
2
For Outline SOT-143  
P
D
P2  
P0  
E
F
W
D1  
t1  
K
0
9° M AX  
9° MAX  
A0  
B
0
DESCRIPTION  
SYMBOL  
SIZE (mm)  
SIZE (INCHES)  
CAVITY  
LENGTH  
WIDTH  
DEPTH  
PITCH  
A
B
K
P
D
3.19 0.10  
2.80 0.10  
1.31 0.10  
4.00 0.10  
1.00 + 0.25  
0.126 0.004  
0.110 0.004  
0.052 0.004  
0.157 0.004  
0.039 + 0.010  
0
0
0
BOTTOM HOLE DIAMETER  
1
0
PERFORATION  
DIAMETER  
PITCH  
POSITION  
D
P
E
1.50 + 0.10  
4.00 0.10  
1.75 0.10  
0.059 + 0.004  
0.157 0.004  
0.069 0.004  
CARRIER TAPE  
DISTANCE  
WIDTH  
THICKNESS  
W
t1  
8.00+0.30 –0.10 0.315+0.012 –0.004  
0.254 0.013  
0.0100 0.0005  
CAVITY TO PERFORATION  
(WIDTH DIRECTION)  
F
3.50 0.05  
0.138 0.002  
CAVITY TO PERFORATION  
(LENGTH DIRECTION)  
P
2.00 0.05  
0.079 0.002  
2
9
Tape Dimensions and Product Orientation  
For Outlines SOT-323, -363  
P
P
D
2
P
0
E
F
W
C
D
1
t
(CARRIER TAPE THICKNESS)  
T (COVER TAPE THICKNESS)  
t
1
K
An  
An  
0
A
B
0
0
DESCRIPTION  
SYMBOL  
SIZE (mm)  
SIZE (INCHES)  
CAVITY  
LENGTH  
WIDTH  
DEPTH  
PITCH  
A
B
K
P
D
2.40 0.10  
2.40 0.10  
1.20 0.10  
4.00 0.10  
1.00 + 0.25  
0.094 0.004  
0.094 0.004  
0.047 0.004  
0.157 0.004  
0.039 + 0.010  
0
0
0
BOTTOM HOLE DIAMETER  
1
0
PERFORATION  
DIAMETER  
PITCH  
POSITION  
D
P
E
1.55 0.05  
4.00 0.10  
1.75 0.10  
0.061 0.002  
0.157 0.004  
0.069 0.004  
CARRIER TAPE  
COVER TAPE  
DISTANCE  
WIDTH  
THICKNESS  
W
8.00 0.30  
0.254 0.02  
0.315 0.012  
0.0100 0.0008  
t
1
WIDTH  
TAPE THICKNESS  
C
5.4 0.10  
0.062 0.001  
0.205 0.004  
0.0025 0.00004  
T
t
CAVITY TO PERFORATION  
(WIDTH DIRECTION)  
F
3.50 0.05  
0.138 0.002  
CAVITY TO PERFORATION  
(LENGTH DIRECTION)  
P
2.00 0.05  
0.079 0.002  
2
ANGLE  
FOR SOT-323 (SC70-3 LEAD)  
FOR SOT-363 (SC70-6 LEAD)  
An  
8 °C MAX  
10 °C MAX  
For product information and a complete list of distributors, please go to our web site: www.avagotech.com  
Avago, AvagoTechnologies, and the A logo are trademarks of AvagoTechnologies in the United States and other countries.  
Data subject to change. Copyright © 2005-2009 AvagoTechnologies. All rights reserved. Obsoletes 5989-4021EN  
AV02-1367EN - May 29, 2009  

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SI9135_11

 SMBus Multi-Output Power-Supply Controller

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SI9136_11

 Multi-Output Power-Supply Controller

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SI9130CG-T1-E3

 Pin-Programmable Dual Controller - Portable PCs

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SI9130LG-T1-E3

 Pin-Programmable Dual Controller - Portable PCs

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SI9130_11

 Pin-Programmable Dual Controller - Portable PCs

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SI9137

 Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

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SI9137DB

 Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

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SI9137LG

 Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

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SI9122E

 500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification Drivers

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