HSMS-282P [AVAGO]
Surface Mount RF Schottky Barrier; 表面贴装射频肖特基
| 型号： | HSMS-282P |
| 厂家： | 
AVAGO TECHNOLOGIES LIMITED |
| 描述： | Surface Mount RF Schottky Barrier |
| 文件： | 总15页 (文件大小：508K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HSMS-282x
Surface Mount RF Schottky Barrier Diodes
Data Sheet
Description/Applications
Features
• Low Turn‑On Voltage (As Low as 0.34 V at 1 mA)
• Low FIT (Failure in Time) Rate*
• Six‑sigma Quality Level
These Schottky diodes are specifically designed for both
analog and digital applications. This series offers a wide
range of specifications and package configurations to give
the designer wide flexibility. Typical applications of these
Schottky diodes are mixing, detecting, switching, sam‑
pling, clamping, and wave shaping. The HSMS‑282x series
of diodes is the best all‑around choice for most applica‑
tions, featuring low series resistance, low forward voltage
at all current levels and good RF characteristics.
• Single, Dual and Quad Versions
•
Unique Configurations in Surface Mount SOT‑363
Package
– increase flexibility
– save board space
– reduce cost
Note that Avago’s manufacturing techniques assure that
dice found in pairs and quads are taken from adjacent
sites on the wafer, assuring the highest degree of match.
• HSMS‑282K Grounded Center Leads Provide up to 10
dB Higher Isolation
Package Lead Code Identification,
SOT-23/SOT-143 (Top View)
• Matched Diodes for Consistent Performance
•
Better Thermal Conductivity for Higher Power Dissipation
COMMON
ANODE
3
COMMON
CATHODE
3
• Lead‑free Option Available
SINGLE
3
SERIES
3
• For more information see the Surface Mount Schottky
Reliability Data Sheet.
1
2
1
2
1
2
1
2
#4
#0
#2
#3
Package Lead Code Identification, SOT-363
(Top View)
UNCONNECTED
PAIR
RING
BRIDGE
QUAD
CROSS-OVER
QUAD
QUAD
3
4
3
4
3
4
3
4
HIGH ISOLATION
UNCONNECTED
TRIO
UNCONNECTED PAIR
1
2
1
2
1
2
1
2
6
5
4
6
5
4
#5
#7
#8
#9
Package Lead Code Identification, SOT-323
(Top View)
1
2
3
1
2
3
K
L
COMMON
CATHODE QUAD
COMMON
ANODE QUAD
6
1
6
1
5
4
6
1
6
1
5
4
SERIES
SINGLE
2
3
2
3
M
N
B
C
BRIDGE
QUAD
RING
COMMON
ANODE
COMMON
CATHODE
QUAD
5
4
5
4
2
3
2
3
P
R
E
F
Pin Connections and Package Marking
1
2
3
6
5
4
Notes:
1. Package marking provides orientation and identification.
2. See “Electrical Specifications”for appropriate package marking.
Absolute Maximum Ratings[1] TC = 25°C
Symbol
Parameter
Unit
Amp
V
SOT-23/SOT-143
SOT-323/SOT-363
If
Forward Current (1 μs Pulse)
Peak Inverse Voltage
Junction Temperature
Storage Temperature
Thermal Resistance[2]
1
1
PIV
15
15
Tj
°C
150
150
Tstg
θjc
°C
‑65 to 150
500
‑65 to 150
150
°C/W
Notes:
1. Operation in excess of any one of these conditions may result in permanent damage to the device.
2. TC = +25°C, where TC is defined to be the temperature at the package pins where contact is made to the circuit board.
Electrical Specifications TC = 25°C, Single Diode[3]
Maximum Maximum
Minimum
Breakdown
Voltage
Maximum Forward
Forward Voltage
Reverse
Leakage
I (nA) @
RVR (V)
Typical
Dynamic
Part
Package
Maximum
Number Marking Lead
Voltage
VF (mV)
V (V) @
IFF(mA)
Capacitance Resistance
HSMS[4]
Code
Code Configuration
VBR (V)
CT (pF)
RD (Ω)[5]
2820
2822
2823
2824
2825
2827
2828
2829
282B
282C
282E
282F
282K
C0
C2
C3
C4
C5
C7
C8
C9
C0
C2
C3
C4
CK
0
2
3
4
5
7
8
9
B
C
E
F
K
Single
15
340
0.5 10 100
1
1.0
12
Series
Common Anode
Common Cathode
Unconnected Pair
Ring Quad[4]
Bridge Quad[4]
Cross‑over Quad
Single
Series
Common Anode
Common Cathode
High Isolation
Unconnected Pair
Unconnected Trio
Common Cathode Quad
Common Anode Quad
Bridge Quad
282L
282M
282N
282P
282R
CL
HH
NN
CP
L
M
N
P
OO
R
Ring Quad
Test Conditions
IR = 100 mA IF = 1 mA[1]
VR = 0V[2]
f = 1 MHz
IF = 5 mA
Notes:
1. ∆VF for diodes in pairs and quads in 15 mV maximum at 1 mA.
2. ∆CTO for diodes in pairs and quads is 0.2 pF maximum.
3. Effective Carrier Lifetime (τ) for all these diodes is 100 ps maximum measured with Krakauer method at 5 mA.
4. See section titled “Quad Capacitance.”
5. RD = RS + 5.2Ω at 25°C and If = 5 mA.
2
Quad Capacitance
Linear Equivalent Circuit Model Diode Chip
R
j
Capacitance of Schottky diode quads is measured using
an HP4271 LCR meter. This instrument effectively isolates
individual diode branches from the others, allowing ac‑
curate capacitance measurement of each branch or each
diode. The conditions are: 20 mV R.M.S. voltage at 1 MHz.
Avago defines this measurement as “CM”, and it is equiva‑
lent to the capacitance of the diode by itself. The equiva‑
lent diagonal and adjacent capaci‑tances can then be cal‑
culated by the formulas given below.
R
S
C
j
RS = series resistance (see Table of SPICE parameters)
Cj = junction capacitance (see Table of SPICE parameters)
In a quad, the diagonal capacitance is the capacitance be‑
tween points A and B as shown in the figure below. The
diagonal capacitance is calculated using the following
formula
8.33 X 10-5 nT
Rj =
Ib + Is
where
Ib = externally applied bias current in amps
Is = saturation current (see table of SPICE parameters)
T = temperature, °K
C1 x C
C3 x C
4
CDIAGONAL = ______2_ + _______
C1 + C 2 C3 + C 4
The equivalent adjacent capacitance is the capacitance
between points A and C in the figure below. This capaci‑
tance is calculated using the following formula
n = ideality factor (see table of SPICE parameters)
Note:
To effectively model the packaged HSMS-282x product,
please refer to Application Note AN1124.
1
CADJACENT = C 1 + ____________
1
1
1
ESD WARNING:
–– + –– + ––
C 2 C3 C4
Handling Precautions Should Be Taken To Avoid Static Discharge.
This information does not apply to cross‑over quad di‑
odes.
SPICE Parameters
Parameter
Units
HSMS-282x
A
BV
CJ0
EG
IBV
IS
V
pF
eV
A
15
0.7
C1
C2
C3
C
0.69
1E‑4
2.2E‑8
1.08
6.0
C4
B
A
N
RS
PB
PT
M
Ω
V
0.65
2
0.5
3
Typical Performance, TC = 25°C (unless otherwise noted), Single Diode
1
100,000
100
TA = +125C
TA = +75C
TA = +25C
TA = –25C
0.8
10,000
10
0.6
0.4
1000
100
1
0.1
TA = +125C
TA = +75C
TA = +25C
0.2
0
10
1
0.01
0
2
4
6
8
0
5
10
15
0
0.10
0.20
0.30
0.40
0.50
V
– REVERSE VOLTAGE (V)
V
– REVERSE VOLTAGE (V)
V
– FORWARD VOLTAGE (V)
R
R
F
Figure 3. Total Capacitance vs. Reverse Voltage.
Figure 2. Reverse Current vs. Reverse Voltage at
Temperatures.
Figure 1. Forward Current vs. Forward Voltage at
Temperatures.
1000
100
30
10
30
100
10
1
1.0
I
(Left Scale)
10
F
I
(Left Scale)
F
10
1
V
(Right Scale)
F
1
1
V
(Right Scale)
0.20
F
0.3
0.3
0.1
0.25
0.1
1
10
100
0.2
0.4
0.6
0.8
1.0
1.2
1.4
0.10
0.15
I
– FORWARD CURRENT (mA)
V
- FORWARD VOLTAGE (V)
V - FORWARD VOLTAGE (V)
F
F
F
Figure 4. Dynamic Resistance vs. Forward
Current.
Figure 5. Typical V Match, Series Pairs and Quads
f
Figure 6. Typical V Match, Series Pairs at Detector
f
at Mixer Bias Levels.
Bias Levels.
1
10
1
10
9
DC bias = 3 A
-25C
0.1
+25C
+75C
0.1
0.01
8
18 nH HSMS-282B
3.3 nH
HSMS-282B
100 pF
+25C
RF in
Vo
RF in
68
Vo
0.001
0.01
7
100 pF
0.0001
1E-005
100 K
4.7 K
0.001
6
-40
-30
-20
-10
0
-20
-10
0
10
20
30
0
2
4
6
8
10
12
P
– INPUT POWER (dBm)
P – INPUT POWER (dBm)
in
LOCAL OSCILLATOR POWER (dBm)
in
Figure 7. Typical Output Voltage vs. Input Power,
Small Signal Detector Operating at 850 MHz.
Figure 8. Typical Output Voltage vs. Input Power,
Large Signal Detector Operating at 915 MHz.
Figure 9. Typical Conversion Loss vs. L.O. Drive,
2.0 GHz (Ref AN997).
4
Applications Information
Product Selection
Avago’s family of surface mount Schottky diodes provide
unique solutions to many design problems. Each is opti‑
mized for certain applications.
8.33 X 10 -5 nT
R = –––––––––––– = R – R
j
V
s
I
S + I b
0.026
The first step in choosing the right product is to select
the diode type. All of the products in the HSMS‑282x fam‑
ily use the same diode chip–they differ only in package
configuration. The same is true of the HSMS‑280x, ‑281x,
285x, ‑286x and ‑270x families. Each family has a different
set of characteristics, which can be compared most easily
by consulting the SPICE parameters given on each data
sheet.
≈ ––––– at 25 °C
I
S + I b
where
n = ideality factor (see table of SPICE parameters)
T = temperature in °K
IS = saturation current (see table of SPICE parameters)
Ib = externally applied bias current in amps
The HSMS‑282x family has been optimized for use in RF
applications, such as
Rv = sum of junction and series resistance, the slope of the
V‑I curve
• DC biased small signal detectors to 1.5 GHz.
IS is a function of diode barrier height, and can range from
picoamps for high barrier diodes to as much as 5 µA for
very low barrier diodes.
• Biased or unbiased large signal detectors (AGC or
power monitors) to 4 GHz.
• Mixers and frequencymultipliers to 6 GHz.
The Height of the Schottky Barrier
TheotherfeatureoftheHSMS‑282xfamilyisitsunit‑to‑unit
and lot‑to‑lot consistency. The silicon chip used in this
series has been designed to use the fewest possible pro‑
cessing steps to minimize variations in diode characteris‑
tics. Statistical data on the consistency of this product, in
terms of SPICE parameters, is available from Avago.
The current‑voltage characteristic of a Schottky barrier
diode at room temperature is described by the following
equation:
V - IR
0.026
S
–––––
I = I S (e
– 1)
For those applications requiring very high breakdown
voltage, use the HSMS‑280x family of diodes. Turn to the
HSMS‑281x when you need very low flicker noise. The
HSMS‑285x is a family of zero bias detector diodes for small
signal applications. For high frequency detector or mixer
applications, use the HSMS‑286x family. The HSMS‑270x
is a series of specialty diodes for ultra high speed clipping
and clamping in digital circuits.
On a semi‑log plot (as shown in the Avago catalog) the
current graph will be a straight line with inverse slope 2.3
X 0.026 = 0.060 volts per cycle (until the effect of RS is seen
in a curve that droops at high current). All Schottky diode
curves have the same slope, but not necessarily the same
value of current for a given voltage. This is determined
by the saturation current, IS, and is related to the barrier
height of the diode.
Schottky Barrier Diode Characteristics
Through the choice of p‑type or n‑type silicon, and the
selection of metal, one can tailor the characteristics of a
Schottky diode. Barrier height will be altered, and at the
same time CJ and RS will be changed. In general, very low
barrier height diodes (with high values of IS, suitable for
zero bias applications) are realized on p‑type silicon. Such
diodes suffer from higher values of RS than do the n‑type.
Stripped of its package, a Schottky barrier diode chip
consists of a metal‑semiconductor barrier formed by de‑
position of a metal layer on a semiconductor. The most
common of several different types, the passivated diode,
is shown in Figure 10, along with its equivalent circuit.
RS is the parasitic series resistance of the diode, the sum
of the bondwire and leadframe resistance, the resistance
of the bulk layer of silicon, etc. RF energy coupled into RS
is lost as heat—it does not contribute to the rectified out‑
put of the diode. CJ is parasitic junction capacitance of the
diode, controlled by the thick‑ness of the epitaxial layer
and the diameter of the Schottky contact. Rj is the junc‑
tion resistance of the diode, a function of the total current
flowing through it.
R
S
METAL
PASSIVATION
PASSIVATION
N-TYPE OR P-TYPE EPI LAYER
R
j
SCHOTTKY JUNCTION
C
j
N-TYPE OR P-TYPE SILICON SUBSTRATE
CROSS-SECTION OF SCHOTTKY
BARRIER DIODE CHIP
EQUIVALENT
CIRCUIT
Figure 10. Schottky Diode Chip.
5
Thus, p‑type diodes are generally reserved for detector
applications (where very high values of RV swamp out
high RS) and n‑type diodes such as the HSMS‑282x are
used for mixer applications (where high L.O. drive levels
keep RV low). DC biased detectors and self‑biased detec‑
tors used in gain or power control circuits.
• The two diodes are in parallel in the RF circuit, lowering
the input impedance and making the design of the RF
matching network easier.
• The two diodes are in series in the output (video) circuit,
doubling the output voltage.
• Some cancellation of even‑order harmonics takes place
at the input.
Detector Applications
Detector circuits can be divided into two types, large signal
(Pin > ‑20 dBm) and small signal (Pin < ‑20 dBm). In general,
the former use resistive impedance matching at the in‑
put to improve flatness over frequency—this is possible
since the input signal levels are high enough to produce
adequate output voltages without the need for a high Q
reactive input matching network. These circuits are self‑
biased (no external DC bias) and are used for gain and
power control of amplifiers.
DC Bias
Zero Biased Diodes
DC Biased Diodes
Figure 12. Voltage Doubler.
The most compact and lowest cost form of the doubler is
achieved when the HSMS‑2822 or HSMS‑282C series pair
is used.
Small signal detectors are used as very low cost receivers,
and require a reactive input impedance matching net‑
work to achieve adequate sensitivity and output voltage.
Those operating with zero bias utilize the HSMS‑ 285x
family of detector diodes. However, superior performance
over temperature can be achieved with the use of 3 to 30
µA of DC bias. Such circuits will use the HSMS‑282x family
of diodes if the operating frequency is 1.5 GHz or lower.
Both the detection sensitivity and the DC forward voltage
of a biased Schottky detector are temperature sensitive.
Where both must be compensated over a wide range of
temperatures, the differential detector[2] is often used.
Such a circuit requires that the detector diode and the
reference diode exhibit identical characteristics at all DC
bias levels and at all temperatures. This is accomplished
through the use of two diodes in one package, for exam‑
ple the HSMS‑2825 in Figure 13. In the Avago assembly
facility, the two dice in a surface mount package are taken
from adjacent sites on the wafer (as illustrated in Figure
14). This assures that the characteristics of the two diodes
are more highly matched than would be possible through
individual testing and hand matching.
Typical performance of single diode detectors (using
HSMS‑2820 or HSMS‑282B) can be seen in the transfer
curves given in Figures 7 and 8. Such detectors can be re‑
alized either as series or shunt circuits, as shown in Figure
11.
DC Bias
bias
Shunt inductor provides
video signal return
Shunt diode provides
DC Bias
differential
amplifier
video signal return
matching
network
Zero Biased Diodes DC Biased Diodes
HSMS-2825
Figure 11. Single Diode Detectors.
Figure 13. Differential Detector.
[1] Avago Application Note 956‑4, “Schottky Diode Voltage Doubler.”
The series and shunt circuits can be combined into a volt‑
age doubler[1], as shown in Figure 12. The doubler offers
three advantages over the single diode circuit.
[2] Raymond W. Waugh, “Designing Large‑Signal Detectors for Handsets
and Base Stations,” Wireless Systems Design, Vol. 2, No. 7, July 1997,
pp 42 – 48.
6
bias
differential
amplifier
matching
network
HSMS-282P
Figure 17. Voltage Doubler Differential Detector.
Figure 14. Fabrication of Avago Diode Pairs.
However, care must be taken to assure that the two refer‑
ence diodes closely match the two detector diodes. One
possible configuration is given in Figure 16, using two
HSMS‑2825. Board space can be saved through the use of
the HSMS‑282P open bridge quad, as shown in Figure 17.
In high power applications, coupling of RF energy from
the detector diode to the reference diode can introduce
error in the differential detector. The HSMS‑282K diode
pair, in the six lead SOT‑363 package, has a copper bar
between the diodes that adds 10 dB of additional isola‑
tion between them. As this part is manufactured in the
SOT‑363 package it also provides the benefit of being
40% smaller than larger SOT‑143 devices. The HSMS‑282K
is illustrated in Figure 15—note that the ground connec‑
tions must be made as close to the package as possible to
minimize stray inductance to ground.
While the differential detector works well over tempera‑
ture, another design approach[3] works well for large signal
detectors. See Figure 18 for the schematic and a physical
layout of the circuit. In this design, the two 4.7 KΩ resis‑
tors and diode D2 act as a variable power divider, assuring
constant output voltage over temperature and improving
output linearity.
detector diode
PA
V
bias
RF
in
V
o
D1
4.7 KΩ
4.7 KΩ
68 Ω
33 pF
D2
68 Ω
33 pF
RF
in
HSMS-282K
reference diode
HSMS-2825
or
HSMS-282K
to differential amplifier
HSMS-282K
V
o
Figure 15. High Power Differential Detector.
4.7 KΩ
The concept of the voltage doubler can be applied to the
differential detector, permitting twice the output voltage
for a given input power (as well as improving input im‑
pedance and suppressing second harmonics).
Figure 18. Temperature Compensated Detector.
In certain applications, such as a dual‑band cellphone
handset operating at both 900 and 1800 MHz, the second
harmonics generated in the power control output detec‑
tor when the handset is working at 900 MHz can cause
problems. A filter at the output can reduce unwanted
emissions at 1800 MHz in this case, but a lower cost so‑
lution is available[4]. Illustrated schematically in Figure
19, this circuit uses diode D2 and its associated passive
components to cancel all even order harmonics at the
detector’s RF input. Diodes D3 and D4 provide tempera‑
ture compensation as described above. All four diodes are
contained in a single HSMS‑ 282R package, as illustrated
in the layout shown in Figure 20.
bias
differential
amplifier
HSMS-2825
matching
network
HSMS-2825
[3] Hans Eriksson and RaymondW.Waugh,“ATemperature Compensated
Linear Diode Detector,”to be published.
Figure 16. Voltage Doubler Differential Detector.
7
D1
R4
RF in
R1
V+
R2
HSMS-2829
D2
R3
68 Ω
V–
C1
RF in
LO in
D3
C2
D4
C1 = C2 ≈ 100 pF
R1 = R2 = R3 = R4 = 4.7 KΩ
D1 & D2 & D3 & D4 = HSMS-282R
IF out
Figure 19. Schematic of Suppressed Harmonic Detector.
Figure 22. Planar Double Balanced Mixer.
HSMS-282R
A review of Figure 21 may lead to the question as to why
the HSMS‑282R ring quad is open on the ends. Distor‑
tion in double balanced mixers can be reduced if LO drive
is increased, up to the point where the Schottky diodes
are driven into saturation. Above this point, increased LO
drive will not result in improvements in distortion. The use
of expensive high barrier diodes (such as those fabricated
on GaAs) can take advantage of higher LO drive power,
but a lower cost solution is to use a eight (or twelve) diode
ring quad. The open design of the HSMS‑282R permits this
to easily be done, as shown in Figure 23.
4.7 KΩ
4.7 KΩ
V+
V–
100 pF
100 pF
RF in
68 Ω
Figure 20. Layout of Suppressed Harmonic Detector.
Note that the forgoing discussion refers to the output volt‑
age being extracted at point V+ with respect to ground. If
a differential output is taken at V+ with respect to V‑, the
circuit acts as a voltage doubler.
LO in
RF in
Mixer applications
HSMS-282R
IF out
The HSMS‑282x family, with its wide variety of packaging,
can be used to make excellent mixers at frequencies up
to 6 GHz.
Figure 23. Low Distortion Double Balanced Mixer.
This same technique can be used in the single‑balanced
mixer. Figure 24 shows such a mixer, with two diodes in
each spot normally occupied by one. This mixer, with a
sufficiently high LO drive level, will display low distortion.
The HSMS‑2827 ring quad of matched diodes (in the SOT‑143
package) has been designed for double balanced mixers.
The smaller (SOT‑363) HSMS‑282R ring quad can similarly
be used, if the quad is closed with external connections as
shown in Figure 21.
HSMS-282R
RF in
HSMS-282R
RF in
LO in
180°
hybrid
Low pass
filter
IF out
LO in
Figure 24. Low Distortion Balanced Mixer.
[4] Alan Rixon and Raymond W. Waugh, “A Suppressed Harmonic Power
Detector for Dual Band ‘Phones,”to be published.
IF out
Figure 21. Double Balanced Mixer.
Both of these networks require a crossover or a three di‑
mensional circuit. A planar mixer can be made using the
SOT‑143 crossover quad, HSMS‑2829, as shown in Figure
22. In this product, a special lead frame permits the cross‑
over to be placed inside the plastic package itself, elimi‑
nating the need for via holes (or other measures) in the RF
portion of the circuit itself.
8
Sampling Applications
Note that θjc, the thermal resistance from diode junction
to the foot of the leads, is the sum of two component re‑
sistances,
The six lead HSMS‑282P can be used in a sampling circuit,
as shown in Figure 25. As was the case with the six lead
HSMS‑282R in the mixer, the open bridge quad is closed
with traces on the circuit board. The quad was not closed
internally so that it could be used in other applications,
such as illustrated in Figure 17.
θjc = θpkg + θchip
(2)
Package thermal resistance for the SOT‑3x3 package is ap‑
proximately 100°C/W, and the chip thermal resistance for
the HSMS‑282x family of diodes is approximately 40°C/W.
The designer will have to add in the thermal resistance
from diode case to ambient—a poor choice of circuit
board material or heat sink design can make this number
very high.
sample
point
HSMS-282P
sampling
Equation (1) would be straightforward to solve but for the
fact that diode forward voltage is a function of tempera‑
ture as well as forward current. The equation for Vf is:
pulse
sampling circuit
Figure 25. Sampling Circuit.
Thermal Considerations
11600 (Vf – I f R s )
nT
The obvious advantage of the SOT‑323 and SOT‑363 over
the SOT‑23 and SOT‑142 is combination of smaller size
and extra leads. However, the copper leadframe in the
SOT‑3x3 has a thermal conductivity four times higher than
the Alloy 42 leadframe of the SOT‑23 and SOT‑143, which
enables the smaller packages to dissipate more power.
If = I S
e
– 1
(3)
where
n = ideality factor
T = temperature in °K
Rs = diode series resistance
The maximum junction temperature for these three fami‑
lies of Schottky diodes is 150°C under all operating con‑
ditions. The following equation applies to the thermal
analysis of diodes:
and IS (diode saturation current) is given by
Tj = (Vf If + PRF) θjc + Ta
where
(1)
2
n
)
1
T
1
298
– 4060
e
(
–
)
T
298
Is = I 0
(
Tj = junction temperature
Ta = diode case temperature
θjc = thermal resistance
VfIf = DC power dissipated
PRF = RF power dissipated
(4)
Equation (4) is substituted into equation (3), and equa‑
tions (1) and (3) are solved simultaneously to obtain the
value of junction temperature for given values of diode
case temperature, DC power dissipation and RF power
dissipation.
9
Diode Burnout
Assembly Instructions
SOT-3x3 PCB Footprint
Recommended PCB pad layouts for the miniature SOT‑
3x3 (SC‑70) packages are shown in Figures 26 and 27 (di‑
mensions are in inches). These layouts provide ample al‑
lowance for package placement by automated assembly
equipment without adding parasitics that could impair
the performance.
Any Schottky junction, be it an RF diode or the gate of a
MESFET, is relatively delicate and can be burned out with
excessive RF power. Many crystal video receivers used
in RFID (tag) applications find themselves in poorly con‑
trolled environments where high power sources may
be present. Examples are the areas around airport and
FAA radars, nearby ham radio operators, the vicinity of a
broadcast band transmitter, etc. In such environments,
the Schottky diodes of the receiver can be protected by a
device known as a limiter diode.[5] Formerly available only
in radar warning receivers and other high cost electronic
warfare applications, these diodes have been adapted to
commercial and consumer circuits.
0.026
0.079
Avago offers a complete line of surface mountable PIN
limiter diodes. Most notably, our HSMP‑4820 (SOT‑23) can
act as a very fast (nanosecond) power‑sensitive switch
when placed between the antenna and the Schottky di‑
ode, shorting out the RF circuit temporarily and reflecting
the excessive RF energy back out the antenna.
0.039
0.022
Dimensions in inches
Figure26. RecommendedPCBPadLayoutforAvago’s SC70 3L/SOT-323 Products.
[5] Avago Application Note 1050, “Low Cost, Surface Mount Power
Limiters.”
0.026
0.079
0.039
0.018
Dimensions in inches
Figure 27. Recommended PCB Pad Layout for Avago's SC70 6L/SOT-363 Products.
10
SMT Assembly
Reliable assembly of surface mount components is a com‑
plex process that involves many material, process, and
equipment factors, including: method of heating (e.g., IR
or vapor phase reflow, wave soldering, etc.) circuit board
material, conductor thickness and pattern, type of solder
alloy, and the thermal conductivity and thermal mass of
components. Components with a low mass, such as the
SOT packages, will reach solder reflow temperatures fast‑
er than those with a greater mass.
The preheat zones increase the temperature of the board
and components to prevent thermal shock and begin
evaporating solvents from the solder paste. The reflow
zone briefly elevates the temperature sufficiently to pro‑
duce a reflow of the solder.
The rates of change of temperature for the ramp‑up and
cool‑down zones are chosen to be low enough to not
cause deformation of the board or damage to compo‑
nents due to thermal shock. The maximum temperature
in the reflow zone (TMAX) should not exceed 260°C.
Avago’s diodes have been qualified to the time‑tempera‑
ture profile shown in Figure 28. This profile is representa‑
tive of an IR reflow type of surface mount assembly pro‑
cess.
These parameters are typical for a surface mount assem‑
bly process for Avago diodes. As a general guideline, the
circuit board and components should be exposed only
to the minimum temperatures and times necessary to
achieve a uniform reflow of solder.
After ramping up from room temperature, the circuit
board with components attached to it (held in place with
solder paste) passes through one or more preheat zones.
tp
Critical Zone
T L to Tp
Tp
T L
Ramp-up
tL
Ts
max
Ts
min
Ramp-down
ts
Preheat
25
t 25° C to Peak
Time
Figure 28. Surface Mount Assembly Profile.
Lead-Free Reflow Profile Recommendation (IPC/JEDEC J-STD-020C)
Reflow Parameter
Lead-Free Assembly
3°C/ second max
150°C
Average ramp‑up rate (Liquidus Temperature (TS(max) to Peak)
Preheat
Temperature Min (TS(min))
Temperature Max (TS(max)
)
200°C
Time (min to max) (tS)
60‑180 seconds
3°C/second max
217°C
Ts(max) to TL Ramp‑up Rate
Time maintained above:
Temperature (TL)
Time (tL)
60‑150 seconds
260 +0/‑5°C
20‑40 seconds
Peak Temperature (TP)
Time within 5 °C of actual
Peak temperature (tP)
Ramp‑down Rate
6°C/second max
8 minutes max
Time 25 °C to Peak Temperature
Note 1: All temperatures refer to topside of the package, measured on the package body surface
11
Package Dimensions
Outline SOT-323 (SC-70 3 Lead)
Outline 23 (SOT-23)
e2
e1
e1
E1
E
XXX
E1
E
XXX
e
L
e
B
L
C
D
DIMENSIONS (mm)
B
D
C
SYMBOL
MIN.
0.80
0.00
0.15
0.10
1.80
1.10
MAX.
1.00
0.10
0.40
0.20
2.25
1.40
A
A1
B
DIMENSIONS (mm)
A
SYMBOL
MIN.
0.79
0.000
0.37
0.086
2.73
1.15
0.89
1.78
0.45
2.10
0.45
MAX.
1.20
0.100
0.54
0.152
3.13
1.50
1.02
2.04
0.60
2.70
0.69
A
A1
B
C
D
A1
A
E1
e
C
0.65 typical
1.30 typical
1.80 2.40
D
A1
e1
E
Notes:
XXX-package marking
Drawin s are not to scale
E1
e
L
0.425 typical
g
e1
e2
E
Notes:
XXX-package marking
Drawings are not to scale
L
Outline 143 (SOT-143)
Outline SOT-363 (SC-70 6 Lead)
e2
DIMENSIONS (mm)
e1
SYMBOL
MIN.
1.15
1.80
1.80
0.80
0.80
0.00
0.10
MAX.
1.35
2.25
2.40
1.10
1.00
0.10
0.40
E
D
HE
E
B1
E1
HE
A
A2
A1
Q1
e
E
XXX
0.650 BCS
e
b
0.15
0.10
0.10
0.30
0.20
0.30
c
D
L
L
B
C
e
Q1
c
A1
A2
A
DIMENSIONS (mm)
D
SYMBOL
MIN.
0.79
0.013
0.36
0.76
0.086
2.80
1.20
0.89
1.78
0.45
2.10
0.45
MAX.
1.097
0.10
0.54
0.92
0.152
3.06
1.40
1.02
2.04
0.60
2.65
0.69
A
A1
B
b
L
A
B1
C
A1
D
E1
e
e1
e2
E
Notes:
XXX-package marking
Drawings are not to scale
L
12
Device Orientation
For Outlines SOT-23, -323
REEL
TOP VIEW
END VIEW
4 mm
CARRIER
TAPE
8 mm
ABC
ABC
ABC
ABC
USER
FEED
DIRECTION
Note: "AB" represents package marking code.
"C" represents date code.
COVER TAPE
For Outline SOT-143
For Outline SOT-363
TOP VIEW
4 mm
END VIEW
TOP VIEW
4 mm
END VIEW
8 mm
A B C
A B C B A C
C A B
8 mm
ABC
ABC
ABC
ABC
Note: "AB" represents package marking code.
"C" re presents date code.
Note: "AB" represents package marking code.
"C" represents date code.
13
Tape Dimensions and Product Orientation For Outline SOT-23
P
P
D
2
E
P
0
F
W
D
1
t1
Ko
13.5° MAX
8° MAX
9° MAX
B
A
0
0
DESCRIPTION
SYMBOL
SIZE (mm)
SIZE (INCHES)
CAVITY
LENGTH
WIDTH
DEPTH
PITCH
A
B
K
P
D
3.15 0.10
2.77 0.10
1.22 0.10
4.00 0.10
1.00 + 0.05
0.124 0.004
0.109 0.004
0.048 0.004
0.157 0.004
0.039 0.002
0
0
0
BOTTOM HOLE DIAMETER
1
0
PERFORATION
CARRIER TAPE
DIAMETER
PITCH
POSITION
D
P
E
1.50 + 0.10
4.00 0.10
1.75 0.10
0.059 + 0.004
0.157 0.004
0.069 0.004
WIDTH
W
8.00+0.30 –0.10 0.315+0.012 –0.004
THICKNESS
t1
0.229 0.013
0.009 0.0005
DISTANCE
BETWEEN
CENTERLINE
CAVITY TO PERFORATION
(WIDTH DIRECTION)
CAVITY TO PERFORATION
(LENGTH DIRECTION)
F
P
3.50 0.05
0.138 0.002
2.00 0.05
0.079 0.002
2
For Outline SOT-143
P
D
P2
P0
E
F
W
D1
t1
K
0
9° M AX
9° MAX
A0
B
0
DESCRIPTION
SYMBOL
SIZE (mm)
SIZE (INCHES)
CAVITY
LENGTH
WIDTH
DEPTH
PITCH
A
B
K
P
D
3.19 0.10
2.80 0.10
1.31 0.10
4.00 0.10
1.00 + 0.25
0.126 0.004
0.110 0.004
0.052 0.004
0.157 0.004
0.039 + 0.010
0
0
0
BOTTOM HOLE DIAMETER
1
0
PERFORATION
DIAMETER
PITCH
POSITION
D
P
E
1.50 + 0.10
4.00 0.10
1.75 0.10
0.059 + 0.004
0.157 0.004
0.069 0.004
CARRIER TAPE
DISTANCE
WIDTH
THICKNESS
W
t1
8.00+0.30 –0.10 0.315+0.012 –0.004
0.254 0.013
0.0100 0.0005
CAVITY TO PERFORATION
(WIDTH DIRECTION)
F
3.50 0.05
0.138 0.002
CAVITY TO PERFORATION
(LENGTH DIRECTION)
P
2.00 0.05
0.079 0.002
2
14
Tape Dimensions and Product Orientation For Outlines SOT-323, -363
P
P
D
2
P
0
E
F
W
C
D
1
t
(CARRIER TAPE THICKNESS)
T (COVER TAPE THICKNESS)
t
1
K
An
An
0
A
B
0
0
DESCRIPTION
SYMBOL
SIZE (mm)
SIZE (INCHES)
CAVITY
LENGTH
WIDTH
DEPTH
PITCH
A
B
K
P
D
2.40 0.10
2.40 0.10
1.20 0.10
4.00 0.10
1.00 + 0.25
0.094 0.004
0.094 0.004
0.047 0.004
0.157 0.004
0.039 + 0.010
0
0
0
BOTTOM HOLE DIAMETER
1
0
PERFORATION
DIAMETER
PITCH
POSITION
D
P
E
1.55 0.05
4.00 0.10
1.75 0.10
0.061 0.002
0.157 0.004
0.069 0.004
CARRIER TAPE
COVER TAPE
DISTANCE
WIDTH
THICKNESS
W
8.00 0.30
0.254 0.02
0.315 0.012
0.0100 0.0008
t
1
WIDTH
TAPE THICKNESS
C
5.4 0.10
0.062 0.001
0.205 0.004
0.0025 0.00004
T
t
CAVITY TO PERFORATION
(WIDTH DIRECTION)
F
3.50 0.05
0.138 0.002
CAVITY TO PERFORATION
(LENGTH DIRECTION)
P
2.00 0.05
0.079 0.002
2
ANGLE
FOR SOT-323 (SC70-3 LEAD)
FOR SOT-363 (SC70-6 LEAD)
An
8 °C MAX
10 °C MAX
Part Number Ordering Information
No. of
Part Number
Devices
10000
3000
Container
13" Reel
HSMS‑282x‑TR2G
HSMS‑282x‑TR1G
HSMS‑282x‑BLKG
7" Reel
100
antistatic bag
x = 0, 2, 3, 4, 5, 7, 8, 9, B, C, E, F, K, L, M, N, P or R
For product information and a complete list of distributors, please go to our web site: www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.
Data subject to change. Copyright © 2005-2008 Avago Technologies. All rights reserved. Obsoletes 5989-4030EN
AV02-1320EN - June 26, 2008
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