DIR1700E [BB]

DIGITAL AUDIO INTERFACE RECEIVER; 数字音频接口接收器
DIR1700E
型号: DIR1700E
厂家: BURR-BROWN CORPORATION    BURR-BROWN CORPORATION
描述:

DIGITAL AUDIO INTERFACE RECEIVER
数字音频接口接收器

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文件: 总3页 (文件大小:90K)
中文:  中文翻译
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®
49%  
DIR1700  
DIR1700  
PRELIMINARY INFORMATION  
SUBJECT TO CHANGE  
WITHOUT NOTICE  
DIGITAL AUDIO INTERFACE RECEIVER  
FEATURES  
DESCRIPTION  
STANDARD DIGITAL AUDIO INTERFACE  
DIR1700 is a Digital Audio Interface Receiver (DIR)  
which is designed for consumer and professional digi-  
tal audio applications, such as digital AV receivers.  
DIR1700 has two system clock operation modes:  
internal PLL operation mode and XTAL clock opera-  
tion mode for systems which contain both digital and  
analog inputs. The advantages of the DIR1700 are  
very low clock jitter, and 96kHz sampling rate capa-  
bility. These features are now required for consumer  
and professional audio systems.  
RECEIVER (EIAJ1201)  
SAMPLING RATE: 32/44.1/48/96kHz  
RECOVERS 256/384/512fS SYSTEM CLOCKS  
VERY LOW CLOCK JITTER:  
100ps (with 20pF load)  
FLEXIBLE SYSTEM CLOCK OUTPUT  
SELECTABLE OUTPUT PCM AUDIO  
DATA FORMAT  
XTAL CLOCK/PLL CLOCK  
OPERATION MODES  
SELECTABLE ERROR FLAG FUNCTION  
OUTPUTS CHANNEL STATUS DATA  
VDD  
DGND  
ERF  
ERSNS  
D0  
D1  
FLAG WITH BLOCK START SIGNAL  
OUTPUTS USER BIT DATA  
SINGLE +5V POWER SUPPLY  
28-LEAD SSOP PACKAGE  
DIN  
Parity  
DAT  
Data  
Format  
Select  
Error Check  
BCK  
LRCK  
SCLK  
Mute  
Clock and Data  
Recover  
CS1  
Data  
Output  
Timing  
CS2  
CS3  
CS24  
CS25  
VLFLG  
PLL  
lock or unlock  
Clocks  
FIL  
258/384/512fs  
VCO STOP  
PLL  
Oscillation  
Select  
CSBIT  
UDAT  
BLSTRT  
AGND  
VCC  
Xtal  
Xtal  
Oscillation  
STOP  
Oscillation  
Clock  
256/384/512  
Select  
Xtal Bias  
Network  
Xtal Existence  
Auto-Detection  
CLKSEL  
OSCSEL  
XTO  
XTI  
International Airport Industrial Park  
Mailing Address: PO Box 11400, Tucson, AZ 85734  
FAXLine: (800) 548-6133 (US/Canada Only)  
Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706  
Tel: (520) 746-1111  
Twx: 910-952-1111  
Internet: http://www.burr-brown.com/  
Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132  
© 1998 Burr-Brown Corporation  
PDS-1416  
Printed inU.S.A. September, 1998  
SPECIFICATIONS—Preliminary  
All specifications at +25°C and VCA = VCP = VDD = +5V, unless otherwise noted.  
DIR1700E  
TYP  
PARAMETER  
CONDITIONS  
MIN  
MAX  
UNITS  
DIGITAL FILTER PERFORMANCE  
(1)  
Input Logic Level: VIH  
2.0  
VDC  
VDC  
VDC  
VDC  
VDC  
VDC  
VDC  
VDC  
µA  
(1)  
VIL  
0.8  
30% VDD  
TBD  
(2)  
V
2
70% VDD  
TBD  
IH  
VIL2(2)  
(3)  
V
3
IH  
VIL3(3)  
(4)  
Output Logic Level: VOH  
IO = 2mA  
IO = –4mA  
VDD 0.4  
(4)  
VOL  
Input Leakage Current: IIN  
Input Sampling Frequency: fS  
System Clock Frequency SCLK(5)  
SCLK Clock Jitter  
0.5  
±10  
96  
±1.0  
+32  
8.192  
kHz  
256, 384, 512fS  
36.864  
MHz  
ps rms  
%
100  
50  
SCLK Duty Cycle  
Crystal Resonator Frequency  
8.192  
+4.5  
24.576  
+5.5  
MHz  
POWER SUPPLY REQUIREMENTS  
Voltage Range  
VDD, VCC  
+5  
VDC  
mA  
mA  
Supply Current: IA (VCC  
)
TBD  
TBD  
TBD  
I
D (VDD  
)
Power Consumption  
PD  
mA  
NOTES: (1) Except CLKSEL DIN; TTL Compatible. (2) CLKSEL. (3) DIN, CMOS Logic Level. (4) Pins 6-8, 11-21, and 23. (5) fS is defined as the incoming audio  
sampling frequency per channel. (6) DIR1700 without load at SCLK, LRCK, BCK, DAT. Power supply current varies with system clock frequency.  
ABSOLUTE MAXIMUM RATINGS  
PACKAGE INFORMATION  
PACKAGE DRAWING  
NUMBER(1)  
Supply Voltages: +VDD ...................................................................... ±6.5V  
+VCC ..................................................................... ±6.5V  
PRODUCT  
PACKAGE  
Input Voltage ................................................................. –0.3 to VDD +0.3V  
Input Current ................................................................................... ±10mA  
Operating Temperature Range ......................................... –25°C to +85°C  
Storage Temperature Range .......................................... –55°C to +125°C  
DIR1700E  
28-Lead SSOP  
324  
NOTE: (1) For detailed drawing and dimension table, please see end of data  
sheet, or Appendix C of Burr-Brown IC Data Book.  
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes  
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change  
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant  
any BURR-BROWN product for use in life support devices and/or systems.  
®
2
DIR1700  
PIN CONFIGURATION  
PIN ASSIGNMENTS  
PIN NAME  
I/O  
DESCRIPTION  
1
CLKSEL  
OSCSEL  
VCC  
In  
In  
Clock Select (256fS, 384fS and 512fS)(1)  
Oscillation Select (PLL/Xtal)(2)  
Analog Power Supply  
PLL Filter  
2
CLKSEL  
OSCSEL  
VCC  
1
2
3
4
5
6
7
8
9
28 D0  
3
27 D1  
4
FIL  
5
AGND  
NC  
Analog Ground  
26 VDD  
6
No Connection  
FIL  
25 ERSNS  
24 DGND  
23 ERF  
22 DIN  
7
CS25  
CS24  
XTI  
Out  
Out  
In  
fS Rate Flag (32k, 44.1k and 48k)(4)  
fS Rate Flag (32k, 44.1k and 48k)(4)  
Crystal In  
8
AGND  
NC  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
XTO  
Out  
Out  
Out  
Out  
Out  
Out  
Out  
Out  
Out  
Out  
Out  
Out  
In  
Crystal Out  
Block Start Clock(5)  
User Data Out(5)  
Channel Status Bit(5)  
CS25  
CS24  
XTI  
BLSTRT  
UDAT  
CSBIT  
VLFLG  
CS3  
DIR1700E  
21 LRCK  
20 DAT  
19 BCK  
18 SCLK  
17 CS1  
16 CS2  
15 CS3  
Validity Flag  
Emphasis Flag(4)  
Copy Guard Flag(4)  
Audio Data Flag (PCM/DATA)(4)  
Audio System Clock Out  
Audio Bit Clock Out  
Audio Data Out  
XTO 10  
BLSTRT 11  
UDAT 12  
CS2  
CS1  
SCLK  
BCK  
CSBIT 13  
VLFLG 14  
DAT  
LRCK  
DIN  
Audio Left/Right Clock Out  
Data Input  
ERF  
Out  
Error Flag Out (PLL Unlock/Parity Error)  
NC = No Connection  
DGND  
ERSNS  
VDD  
Digital Ground  
In  
Error Sense Switch(2)  
Digital Power Supply  
Data Format Select 1(3)  
Data Format Select 0(3)  
D1  
In  
D0  
In  
NOTES: (1) When “CLKSEL” is open, input level becomes 1/2 VDD by pull-  
up and pull-down resistors. (2) Pull-up. (3) Pull-down. (4) Channel status  
output pins become active for consumer applications. (5) Serial outputs are  
utilized for both consumer and professional applications.  
®
3
DIR1700  

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