OPA2111SM [BB]
Dual Low Noise Precision Difet OPERATIONAL AMPLIFIER; 双路低噪声精密差动运算放大器
| 型号： | OPA2111SM |
| 厂家： | 
BURR-BROWN CORPORATION |
| 描述： | Dual Low Noise Precision Difet OPERATIONAL AMPLIFIER |
| 文件： | 总13页 (文件大小：233K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
®
OPA2111
Dual Low Noise Precision
Difet ® OPERATIONAL AMPLIFIER
FEATURES
APPLICATIONS
● LOW NOISE: 100% Tested, 8nV/√Hz max at
● PRECISION INSTRUMENTATION
10kHz
● DATA ACQUISITION
● LOW BIAS CURRENT: 4pA max
● LOW OFFSET: 500µV max
● LOW DRIFT: 2.8µV/°C
● TEST EQUIPMENT
● PROFESSIONAL AUDIO EQUIPMENT
● MEDICAL EQUIPMENT
● HIGH OPEN-LOOP GAIN: 114dB min
● DETECTOR ARRAYS
● HIGH COMMON-MODE REJECTION:
96dB min
DESCRIPTION
The OPA2111 is a high precision monolithic
dielectrically isolated FET (Difet) operational ampli-
fier. Outstanding performance characteristics allow its
use in the most critical instrumentation applications.
+VCC
8
Noise, bias current, voltage offset, drift, open-loop
gain, common-mode rejection, and power supply re-
jection are superior to BIFET® amplifiers.
–In
+In
Very low bias current is obtained by dielectric isola-
tion with on-chip guarding.
Noise-Free
Cascode*
Laser trimming of thin-film resistors gives very low
offset and drift. Extremely low noise is achieved with
patented circuit design techniques. A cascode design
allows high precision input specifications and reduced
susceptibility to flicker noise.
Output
–VCC
4
Standard dual op amp pin configuration allows up-
grading of existing designs to higher performance
levels.
*Patented
OPA2111 Simplified Circuit
(Each Amplifier)
BIFET® National Semiconductor Corp., Difet® Burr-Brown Corp.
International Airport Industrial Park
•
Mailing Address: PO Box 11400
Cable: BBRCORP
•
Tucson, AZ 85734
•
Street Address: 6730 S. Tucson Blvd.
•
Tucson, AZ 85706
Tel: (520) 746-1111 Twx: 910-952-1111
•
•
•
Telex: 066-6491
•
FAX: (520) 889-1510
•
Immediate Product Info: (800) 548-6132
© 1984 Burr-Brown Corporation
PDS-540E
Printed in U.S.A. October, 1993
SPECIFICATIONS
ELECTRICAL
At VCC = ±15VDC and TA = +25°C unless otherwise noted
.
OPA2111AM
OPA2111BM
MIN TYP MAX
OPA2111SM
MIN TYP MAX
OPA2111KM, KP
PARAMETER
CONDITION
MIN
TYP
MAX
MIN
TYP MAX
UNITS
INPUT NOISE
Voltage, fO = 10Hz
fO = 100Hz
100% Tested
100% Tested
40
15
8
80
40
15
8
1.2
3.3
24
1.3
30
11
7
60
30
12
8
40
15
8
80
40
15
8
1.2
3.3
24
1
40
15
8
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
µVrms
µVp-p
fO = 1kHz
fO = 10kHz
fB = 10Hz to 10kHz
100% Tested
(1)
6
6
6
6
(1)
(1)
(1)
(1)
0.7
1.6
15
0.8
0.6
1.2
12
0.6
1
0.7
1.6
15
0.8
0.7
1.6
15
0.8
fB = 0.1Hz to 10Hz
Current, fB = 0.1Hz to 10Hz
fO = 0.1Hz to 20kHz
2.5
19
1
fAp-p
fA/√Hz
OFFSET VOLTAGE(2)
Input Offset Voltage
Average Drift
Match
Supply Rejection
VCM = 0VDC
TA = TMIN to TMAX
±0.1
±2
±1
110
±3
136
±0.75
±6
±0.05 ±0.5
±0.1 ±0.75
±0.3
±8
2
110
±3
136
±2
±15
mV
µV/°C
µV/°C
dB
µV/V
dB
±0.5
±0.5
110
±3
±2.8
±2
2
±6
90
96
90
110
±3
86
±31
±8
±16
±31
±50
±15
±12
Channel Separation
100Hz, RL = 2kΩ
136
136
BIAS CURRENT(2)
Input Bias Current
Match
VCM = 0VDC
±2
±1
±1.2
±0.5
±4
±3
±2
±1
±8
±6
±3
2
pA
pA
OFFSET CURRENT(2)
Input Offset Current
VCM = 0VDC
±1.2
±6
±0.6
±1.2
±3
pA
IMPEDANCE
Differential
Common-Mode
1013 || 1
1014 || 3
1013 || 1
1014 || 3
1013 || 1
1014 || 3
1013 || 1
1014 || 3
Ω || pF
Ω || pF
VOLTAGE RANGE
Common-Mode Input Range
Common-Mode Rejection
±10
90
±11
110
±10
96
±11
110
±10
90
±11
110
±10
82
±11
110
V
dB
VIN = ±10VDC
RL ≥ 2kΩ
OPEN-LOOP GAIN, DC
Open-Loop Voltage Gain
Match
110
125
3
114
125
2
110
125
3
106
125
3
dB
dB
FREQUENCY RESPONSE
Unity Gain, Small Signal
Full Power Response
Slew Rate
Settling Time, 0.1%
0.01%
2
32
2
6
10
2
32
2
6
10
2
32
2
6
10
2
32
2
6
10
MHz
kHz
V/µs
µs
20Vp-p, RL = 2kΩ
VO = ±10V, RL = 2kΩ
Gain = –1, RL = 2kΩ
10V Step
16
1
16
1
16
1
µs
Overload Recovery,
50% Overdrive(3)
Gain = –1
5
5
5
5
µs
RATED OUTPUT
Voltage Output
Current Output
Output Resistance
Load Capacitance Stability
Short Circuit Current
RL = 2kΩ
VO = ±10VDC
DC, Open-Loop
Gain = +1
±10
±5
±11
±10
100
1000
40
±10
±5
±11
±10
100
1000
40
±10
±5
±11
±10
100
1000
40
±10
±5
±11
±10
100
1000
40
V
mA
Ω
pF
mA
10
10
10
10
POWER SUPPLY
Rated Voltage
±15
±15
±15
±15
VDC
Voltage Range, Derated
Performance
Current, Quiescent
±5
±18
7
±5
±18
7
±5
±18
7
±5
±18
9
VDC
mA
IO = 0mADC
5
5
5
5
TEMPERATURE RANGE
Specification
Operating “M” Package
“P” Package
Storage “M” Package
“P” Package
θ Junction-Ambient
Ambient Temp.
Ambient Temp.
–25
–55
+85
+125
–25
–55
+85
+125
–55
–55
+125
+125
0
+70
+125
+85
+150
+85
°C
°C
°C
°C
°C
–55
–40
–65
–40
Ambient Temp.
–65
+150
–65
+150
–65
+150
200
200
200
200(4)
°C/W
NOTES: (1) Sample tested—this parameter is guaranteed. (2) Offset voltage, offset current, and bias current are measured with the units fully warmed up. (3) Overload
recovery is defined as the time required for the output to return from saturation to linear operation following the removal of a 50% input overdrive. (4) Typical θJ-A
150°C/W for plastic DIP.
=
®
OPA2111
2
ELECTRICAL (FULL TEMPERATURE RANGE SPECIFICATIONS)
At VCC = ±15VDC and TA = TMIN to TMAX unless otherwise noted.
OPA2111AM
OPA2111BM
OPA2111SM
OPA2111KM, KP
PARAMETER
CONDITION
MIN
TYP MAX
MIN
TYP MAX
MIN
TYP
MAX
MIN
TYP MAX
UNITS
TEMPERATURE RANGE
Specification Range
Ambient Temp.
VCM = 0VDC
–25
86
+85
–25
90
+85
–55
86
+125
0
+70
°C
INPUT OFFSET VOLTAGE(1)
Input Offset Voltage
Average Drift
Match
Supply Rejection
±0.22 ±1.2
±0.08 ±0.75
±0.3
±2
2
100
±10
±1.5
±6
±0.9
±8
2
100
±10
±5
±15
mV
µV/°C
µV/°C
dB
±2
1
100
±10
±6
±0.5
0.5
100
±10
±2.8
82
±50
±32
±50
±80
µV/V
BIAS CURRENT(1)
Input Bias Current
Match
VCM = 0VDC
VCM = 0VDC
±125 ±1nA
60
±75
30
±500
±2nA ±16.3nA
1nA
±125 ±500
pA
pA
OFFSET CURRENT(1)
Input Offset Current
±75
±750
±38
±375
±1.3nA ±12nA
±75
±375
pA
VOLTAGE RANGE
Common-Mode Input Range
Common-Mode Rejection
±10
86
±11
100
±10
90
±11
100
±10
86
±11
100
±10
80
±11
100
V
dB
V
IN = ±10VDC
RL ≥ 2kΩ
OPEN-LOOP GAIN, DC
Open-Loop Voltage Gain
Match
106
120
5
110
120
3
106
120
5
100
120
5
dB
dB
RATED OUTPUT
Voltage Output
RL = 2kΩ
±10.5 ±11
±10.5 ±11
±10.5 ±11
±10.5 ±11
V
Current Output
Short Circuit Current
V
V
O = ±10VDC
O = 0VDC
±5
10
±10
40
±5
10
±10
40
±5
10
±10
40
±5
10
±10
40
mA
mA
POWER SUPPLY
Current, Quiescent
IO = 0mADC
5
8
5
8
5
8
5
10
mA
NOTES: (1) Offset voltage, offset current, and bias current are measured with the units fully warmed up.
ABSOLUTE MAXIMUM RATINGS
CONNECTION DIAGRAMS
Supply ........................................................................................... ±18VDC
Internal Power Dissipation (TJ ≤ +175°C) .................................... 500mW
Differential Input Voltage ............................................................ Total VCC
Input Voltage Range.......................................................................... ±VCC
Storage Temperature Range: “M” Package .................. –65°C to +150°C
“P” Package .................... –40°C to +85°C
Operating Temperature Range: “M” Package............... –55°C to +125°C
“P” Package ................. –40°C to +85°C
Lead Temperature (soldering, 10s) ............................................... +300°C
Output Short Circuit to Ground (+25°C) ................................. Continuous
Junction Temperature .................................................................... +175°C
Top View
DIP
Out A
–In A
+In A
–VCC
1
2
3
4
8
7
6
5
+VCC
Out B
–In B
+In B
A
B
PACKAGE INFORMATION
PACKAGE DRAWING
MODEL
PACKAGE
NUMBER(1)
OPA2111AM
OPA2111BM
OPA2111KM
OPA2111SM
OPA2111KP
TO-99
TO-99
TO-99
001
001
001
001
006
Top View
TO-99
+VCC and Case
TO-99
8
8-Pin Plastic DIP
Out A
Out B
1
7
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix D of Burr-Brown IC Data Book.
A
B
2
6
–In B
–In A
ORDERING INFORMATION
3
+In B
+In A
5
OFFSET
4
TEMPERATURE
RANGE
VOLTAGE,
max (mV)
–VCC
MODEL
PACKAGE
OPA2111AM
OPA2111BM
OPA2111KM
OPA2111SM
OPA2111KP
TO-99
TO-99
TO-99
–25°C to +85°C
–25°C to +85°C
0°C to +70°C
–55°C to +125°C
0°C to +70°C
±0.75
±0.5
±2
±0.75
±2
0
TO-99
8-Pin Plastic DIP
®
3
OPA2111
DICE INFORMATION
PAD
FUNCTION
1
2
Out A
–In A
3
+In A
4
–VS
5
+In B
6
–In B
7
Out B
8
+VS
NC
No Connection
Substrate Bias: No Connection
MECHANICAL INFORMATION
MILS (0.001")
MILLIMETERS
Die Size
Die Thickness
Min. Pad Size
138 x 84 ±5
20 ±3
3.51 x 2.13 ±0.13
0.51 ±0.08
0.10 x 0.10
4 x 4
OPA2111AD DIE TOPOGRAPHY
Backing
Transistor Count
None
102
TYPICAL PERFORMANCE CURVES
TA = +25°C, and VCC = ±15VDC unless otherwise noted.
VOLTAGE AND CURRENT NOISE SPECTRAL
DENSITY vs TEMPERATURE
INPUT CURRENT NOISE SPECTRAL DENSITY
100
12
10
8
100
10
f
O = 1kHz
10
1
1
BM
6
4
0.1
0.01
0.1
1
10
100
1k
10k
100k
1M
–75
–50 –25
0
25
50
75
100
125
Frequency (Hz)
Temperature (°C)
®
OPA2111
4
TYPICAL PERFORMANCE CURVES (CONT)
TA = +25°C, and VCC = ±15VDC unless otherwise noted.
TOTAL(1) INPUT VOLTAGE NOISE SPECTRAL
DENSITY vs SOURCE RESISTANCE
INPUT OFFSET VOLTAGE WARM-UP DRIFT
1k
40
20
0
RS = 10MΩ
RS = 1MΩ
100
RS = 100kΩ
BM
10
1
RS = 100Ω
–20
–40
NOTE: (1) Includes contribution
from source resistance.
0
1
2
3
4
5
6
0.1
1
10
100
1k
10k
100k
Frequency (Hz)
Time From Power Turn-On (Minutes)
BIAS AND OFFSET CURRENT
vs TEMPERATURE
INPUT VOLTAGE NOISE SPECTRAL DENSITY
1k
100
10
1k
100
10
1
1k
100
AM, SM
BM
1
10
1
0.1
0.1
0.01
0.01
1
10
100
1k
10k
100k
1M
–50
–25
0
25
50
75
100
125
Frequency (Hz)
Ambient Temperature (°C)
TOTAL(1) INPUT VOLTAGE NOISE (PEAK-TO-PEAK)
vs SOURCE RESISTANCE
POWER SUPPLY REJECTION
vs FREQUENCY
140
120
100
80
1k
NOTE: (1) Includes contribution
from source resistance.
100
60
BM
10
1
40
fB = 0.1Hz to 10Hz
20
0
104
105
106
107
108
109
1010
1
10
100
1k
10k
100k
1M
10M
Source Resistance (Ω)
Frequency (Hz)
®
5
OPA2111
TYPICAL PERFORMANCE CURVES (CONT)
TA = +25°C, and VCC = ±15VDC unless otherwise noted.
COMMON-MODE REJECTION
vs INPUT COMMON-MODE VOLTAGE
TOTAL INPUT VOLTAGE NOISE SPECTRAL DENSITY
AT 1kHz vs SOURCE RESISTANCE
120
110
100
90
1k
EO
RS
100
BM
OPA2111 +
Resistor
10
1
80
70
Resistor Noise Only
–15
–10
–5
0
5
10
15
100
1k
10k
100k
1M
10M
100M
Common-Mode Voltage (V)
Source Resistance (Ω)
INPUT OFFSET VOLTAGE CHANGE
DUE TO THERMAL SHOCK
GAIN-BANDWIDTH AND SLEW RATE
vs TEMPERATURE
150
75
0
4
3
2
1
0
4
3
2
AM
BM
25°C
85°C
TA = 25°C to TA = 85°C
Air Environment
–75
1
0
–150
–1
0
1
2
3
4
5
–75
–50 –25
0
25
50
75
100
125
Time From Thermal Shock (Minutes)
Ambient Temperature (°C)
BIAS AND OFFSET CURRENT
OPEN-LOOP GAIN vs TEMPERATURE
vs INPUT COMMON-MODE VOLTAGE
10
1
10
140
130
120
Bias Current
1
Offset Current
0.1
0.1
110
100
0.01
0.01
–15
–10
–5
0
5
10
15
–75
–50 –25
0
25
50
75
100
125
Ambient Temperature (°C)
Common-Mode Voltage (V)
®
OPA2111
6
TYPICAL PERFORMANCE CURVES (CONT)
TA = +25°C, VCC = ±15VDC unless otherwise noted.
COMMON-MODE REJECTION
vs FREQUENCY
140
LARGE SIGNAL TRANSIENT RESPONSE
120
15
100
80
0
60
40
–15
20
0
0
25
50
1
10
100
1k
10k
100k
1M
10M
Time (µs)
Frequency (Hz)
OPEN-LOOP FREQUENCY RESPONSE
SETTLING TIME vs CLOSED-LOOP GAIN
140
120
100
80
100
80
–45
–90
Gain
φ
60
Phase
Margin
≈ 65°
0.01%
0.1%
60
40
40
–135
–180
20
0
20
0
1
10
100
1k
10k
100k
1M
10M
1
10
100
1k
Frequency (Hz)
Closed-Loop Gain (V/V)
GAIN-BANDWIDTH AND SLEW RATE
vs SUPPLY VOLTAGE
CHANNEL SEPARATION vs FREQUENCY
150
140
130
120
3
2
3
2
RL = ∞
RL = 2kΩ
RL = 560Ω
1
0
1
0
110
100
10
100
1k
10k
100k
0
5
10
15
20
Supply Voltage (±VCC
)
Frequency (Hz)
®
7
OPA2111
TYPICAL PERFORMANCE CURVES (CONT)
TA = +25°C, VCC = ±15VDC unless otherwise noted.
MAXIMUM UNDISTORTED OUTPUT
VOLTAGE vs FREQUENCY
SUPPLY CURRENT vs TEMPERATURE
8
6
4
30
20
10
0
2
0
1k
10k
Frequency (Hz)
100k
1M
–75
–50 –25
0
25
50
75
100
125
Ambient Temperature (°C)
TOTAL HARMONIC DISTORTION
vs FREQUENCY
SMALL SIGNAL TRANSIENT RESPONSE
1
60
40
10kΩ
EO = 7V
10kΩ
EO
0.1
20
2kΩ
0
EO
=
700mV
0.01
–20
–40
–60
THD + Noise
Residual Test Limit
0.001
0
1
2
3
4
5
0.1
1
10
100
Frequency (Hz)
1K
10K
100K
Time (µs)
APPLICATIONS INFORMATION
OFFSET VOLTAGE ADJUSTMENT
INPUT PROTECTION
The OPA2111 offset voltage is laser-trimmed and will
require no further trim for most applications.
Conventional monolithic FET operational amplifiers require
external current-limiting resistors to protect their inputs
against destructive currents that can flow when input FET
gate-to-substrate isolation diodes are forward-biased. Most
Offset voltage can be trimmed by summing (see Figure 1).
With this trim method there will be no degradation of input
offset drift.
BIFET amplifiers can be destroyed by the loss of –VCC
.
Because of its dielectric isolation, no special protection is
needed on the OPA2111. Of course, the differential and
common-mode voltage limits should be observed. Static
damage can cause subtle changes in amplifier input charac-
teristics without necessarily destroying the device. In preci-
sion operational amplifiers (both bipolar and FET types),
this may cause a noticeable degradation of offset voltage and
drift.
In
1/2 OPA2111
Out
–15V
±2mV
OffsetTrim
150kΩ
100kΩ
Static protection is recommended when handling any preci-
sion IC operational amplifier.
20Ω
+15V
FIGURE 1. Offset Voltage Trim.
®
OPA2111
8
GUARDING AND SHIELDING
APPLICATIONS CIRCUITS
As in any situation where high impedances are involved,
careful shielding is required to reduce “hum” pickup in input
leads. If large feedback resistors are used, they should also
be shielded along with the external input circuitry.
Figures 5 through 13 are circuit diagrams of various appli-
cations for the OPA2111.
Leakage currents across printed circuit boards can easily
exceed the bias current of the OPA2111. To avoid leakage
problems, it is recommended that the signal input lead of the
OPA2111 be wired to a Teflon standoff. If the OPA2111 is
to be soldered directly into a printed circuit board, utmost
care must be used in planning the board layout. A “guard”
pattern should completely surround the high impedance
input leads and should be connected to a low impedance
point which is at the signal input potential (see Figure 2).
1k
OP-27 + Resistor
EO
OPA2111 + Resistor
Resistor Noise Only
100
RS
EO
=
eN2 + (iNRS)2 + 4kTRS
10
1
OPA2111 + Resistor
Resistor Noise Only
OP-27 + Resistor
BM
1M
NOISE: FET vs BIPOLAR
100
1k
10k
100k
10M
Low noise circuit design requires careful analysis of all
noise sources. External noise sources can dominate in many
cases, so consider the effect of source resistance on overall
operational amplifier noise performance. At low source
impedances, the low voltage noise of a bipolar operational
amplifier is superior, but at higher impedances the high
current noise of a bipolar amplifier becomes a serious
liability. Above about 15kΩ the OPA2111 will have lower
total noise than an OP-27 (see Figure 3).
Source Resistance, RS (Ω)
FIGURE 3. Voltage Noise Spectral Density vs Source
Resistance.
80
TA = 25°C; curves taken from
manufacturers' published
LF156/157
60
typical data
BIAS CURRENT CHANGE
vs COMMON-MODE VOLTAGE
40
The input bias currents of most popular BIFET® opera-
tional amplifiers are affected by common-mode voltage
(Figure 4). Higher input FET gate-to-drain voltage causes
leakage and ionization (bias) currents to increase. Due to its
cascode input stage, the extremely low bias current of the
OPA2111 is not compromised by common-mode voltage.
20
LF155
AD547
OP-15/16/17 “Perfect Bias Current Cancellation”
OPA2111
0
–20
–15
–10
–5
0
5
10
15
Common-Mode Voltage (VDC)
Non-Inverting
Buffer
FIGURE 4. Input Bias Currrent vs Common-Mode Voltage.
2
2
3
Out
Out
1
1
1MΩ
A
A
3
10kΩ
Operate
In
In
In
In
2
3
1/2
Out
1
OPA2111BM
Zero
Inverting
TO-99 Bottom View
100kΩ
4
Gain = –100
OS ≤ 5µV
Drift ≤ 0.028µV/°C
Zero Droop ≤ 2µV/s
Referred to Input
2
3
1
5
Out
Polypropylene
1µF
1
V
100Ω
A
2
6
100kΩ
3
7
6
5
8
1/2
7
OPA2111BM
Board layout for input guarding: guard top and bottom of board.
Alternate: use Teflon® standoff for sensitive input pins.
Teflon® E. I. Du Pont de Nemours & Co.
FIGURE 2. Connection of Input Guard.
FIGURE 5. Auto-Zero Amplifier.
®
9
OPA2111
<1pF to prevent gain peaking
100Ω
10kΩ
1/2 OPA2111BM
1000MΩ
2
3
1
+15V
Out
5.34MΩ(1)
5.34MΩ(1)
Pin Photodiode
UDT Pin-040A
Guard
0.1µF
1/2 OPA2111BM
In
2
5
6
2kΩ
Q
1000pF
8
Output
1
1/2 OPA2111
7
3
0.1µF
4
5 x 108V/W
2.67MΩ(1)
0.01µF
1000MΩ
500pF
500pF
–15V
Circuit must be well shielded.
NOTE: (1) For 50Hz use 3.16MΩ and 6.37Ω.
Gain = 101
FIGURE 6. Sensitive Photodiode Amplifier.
FIGURE 7. High Impedance 60Hz Reject Filter with Gain.
0.03µF
10.5kΩ
0.01µF
73.2Ω
Right
1µF
365Ω
2
3
365kΩ
Output
1
1/2 OPA2111
L
Input
0.01µF
100kΩ
RT
CT
0.03µF
10.5kΩ
0.01µF
73.2Ω
Left
1µF
365Ω
6
5
365Ω
Output
7
1/2 OPA2111
R
Input
100kΩ
0.01µF
RT
CT
G = 26dB Midband
FIGURE 8. RIAA Equalized Stereo Preamplifier.
®
OPA2111
10
IB = ±4pA max
Gain = 100
1/2 OPA2111BM
3
2
CMRR ≈ 106dB
1
IN ≈ 1013
Ω
–In
R
RF
5kΩ
25kΩ
25kΩ
25kΩ
2
5
RG
101Ω
RF
5kΩ
6
3
Output
Burr-Brown
1/2 OPA2111BM
INA105
Differential
Amplifier
6
5
25kΩ
7
1
+In
Differential Voltage Gain = 1 + 2RF/RG
FIGURE 9. FET Input Instrumentation Amplifier.
10kΩ
≈10pF
(1)
1/2
1MΩ
OPA2111AM
6
IN914
1/2
Output
7
OPA2111AM
2
(1)
5
(1)
1
3
IN914
Droop ≈ 0.5mV/s
2N4117A
Input
0.01µF
NOTE: (1) Reverse polarity for
negative peak detection.
Polystyrene
FIGURE 10. Low-Droop Positive Peak Detector.
6.3MΩ
944kΩ
6.3MΩ
7.8MΩ
2
3
6
1.6MΩ
1
7
1/2 OPA2111
1/2 OPA2111
1.6MΩ
1.6MΩ
1.6MΩ
5
Out
In
0.01µF
NPO
0.01µF
NPO
0.01µF
NPO
0.01µF
NPO
NOTE: Lower value resistors will have lower
thermal noise but capacitors must
be scaled larger.
AV = 2.6
fO = 10Hz
–24dB/Octave
FIGURE 11. 10Hz Fourth-Order Butterworth Low-Pass Filter.
®
11
OPA2111
100Ω
100Ω
100Ω
100Ω
100Ω
10kΩ
2
3
10kΩ
10kΩ
10kΩ
10kΩ
10kΩ
1
7
1
7
1
Input
1/2OPA2111
10kΩ
Since signal voltage sums directly with N
but amplifier noise voltage sums as N,
signal-to-noise ratio improves by N.
6
5
1/2OPA2111
AV = –1010
en = 1.9nV/ Hz typ(1) at 10kHz
BW = 30kHz typ
10kΩ
GBW = 30.3 MHz typ
VOS = ±16µV typ(1)
∆VOS/∆T = ±0.16µV/°C typ(1)
IB = 40pA max
2
3
1/2OPA2111
ZIN = 1012Ω || 30pF
10kΩ
NOTE: (1) Theoretical performance
achievable from OPA2111BM
with uncorrelated random
6
5
distribution of parameters.
1/2OPA2111
10kΩ
2
3
10kΩ
1/2OPA2111
2
3
Output
6
OPA37
1/2OPA2111
N = 10
5 each OPA2111BM
FIGURE 12. ‘N’ Stage Parallel-Input Amplifier.
®
OPA2111
12
1/2 OPA2111
1
E1
–In
A1
R2
10kΩ
INA106
10kΩ
10kΩ
100kΩ
2
3
5
R1
202Ω
R2
10kΩ
6
EO
Output
1/2 OPA2111
100kΩ
AV = 10
A2
1
E2
+In
EO = 10(1 + 2 R2/R1)(E2 – E1) = 1000(E2 – E1)
Using the INA106 for an output difference amplifier extends the input common-mode
range of an instrumentation amplifier to ±10V. A conventional IA with a unity-gain difference
amplifier has an input common-mode range limited to ±5V for an output swing of ±10V. This
is because a unity-gain difference amp needs ±5V at the input for 10V at the output,
allowing only 5V additional for common-mode.
FIGURE 13. Precision Instrumentation Amplifier.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
®
13
OPA2111
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