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OPA2132U/2K5E4 [BB]

High-Speed FET-INPUT OPERATIONAL AMPLIFIERS; 高速FET输入运算放大器
OPA2132U/2K5E4
型号： OPA2132U/2K5E4
厂家： BURR-BROWN CORPORATION    BURR-BROWN CORPORATION
描述：

High-Speed FET-INPUT OPERATIONAL AMPLIFIERS
高速FET输入运算放大器

运算放大器 输入元件
文件： 总14页 (文件大小：577K)
中文：  中文翻译
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O
O
P
A
2
1
P
A
OPA132  
OPA2132  
OPA4132  
1
3
O
3
2
2
P
A
4
1
3
2
O
P
O
P
A
2
A
1
1
3
3
2
2
O
P
A41  
3
2
SBOS054A – JANUARY 1995 – REVISED JUNE 2004  
High-Speed  
FET-INPUT OPERATIONAL AMPLIFIERS  
FEATURES  
OPA132  
ꢀ FET INPUT: IB = 50pA max  
Offset Trim  
1
2
3
4
8
7
6
5
Offset Trim  
V+  
ꢀ WIDE BANDWIDTH: 8MHz  
–In  
+In  
V–  
ꢀ HIGH SLEW RATE: 20V/µs  
Output  
NC  
ꢀ LOW NOISE: 8nV/√Hz (1kHz)  
ꢀ LOW DISTORTION: 0.00008%  
ꢀ HIGH OPEN-LOOP GAIN: 130dB (600Ω load)  
ꢀ WIDE SUPPLY RANGE: ±2.5 to ±18V  
ꢀ LOW OFFSET VOLTAGE: 500µV max  
ꢀ SINGLE, DUAL, AND QUAD VERSIONS  
8-Pin DIP, SO-8  
OPA2132  
DESCRIPTION  
Out A  
–In A  
+In A  
V–  
1
2
3
4
8
7
6
5
V+  
The OPA132 series of FET-input op amps provides high-  
speed and excellent dc performance. The combination of  
high slew rate and wide bandwidth provide fast settling time.  
Single, dual, and quad versions have identical specifications  
for maximum design flexibility. High performance grades  
are available in the single and dual versions. All are ideal for  
general-purpose, audio, data acquisition and communica-  
tions applications, especially where high source impedance  
is encountered.  
A
Out B  
–In B  
+In B  
B
8-Pin DIP, SO-8  
OPA132 op amps are easy to use and free from phase  
inversion and overload problems often found in  
common FET-input op amps. Input cascode circuitry pro-  
vides excellent common-mode rejection and  
maintains low input bias current over its wide input voltage  
range. OPA132 series op amps are stable in unity gain and  
provide excellent dynamic behavior over a wide range of  
load conditions, including high load capacitance. Dual and  
quad versions feature completely independent circuitry for  
lowest crosstalk and freedom from interaction, even when  
overdriven or overloaded.  
OPA4132  
Out A  
–In A  
+In A  
V+  
1
2
3
4
5
6
7
14 Out D  
13 –In D  
12 +In D  
11 V–  
A
D
C
+In B  
–In B  
Out B  
10 +In C  
B
9
8
–In C  
Out C  
Single and dual versions are available in 8-pin DIP and  
SO-8 surface-mount packages. Quad is available in 14-pin  
DIP and SO-14 surface-mount packages. All are specified  
for –40°C to +85°C operation.  
14-Pin DIP  
SO-14  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
All trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
Copyright © 1995-2004, Texas Instruments Incorporated  
www.ti.com  
ABSOLUTE MAXIMUM RATINGS  
ELECTROSTATIC  
DISCHARGE SENSITIVITY  
This integrated circuit can be damaged by ESD. Texas  
Instruments recommends that all integrated circuits be  
handled with appropriate precautions. Failure to ob-  
serve proper handling and installation procedures can  
cause damage.  
Supply Voltage, V+ to V– .................................................................... 36V  
Input Voltage .....................................................(V–) –0.7V to (V+) +0.7V  
Output Short-Circuit(1) .............................................................. Continuous  
Operating Temperature ..................................................–40°C to +125°C  
Storage Temperature .....................................................–55°C to +125°C  
Junction Temperature ...................................................................... 150°C  
Lead Temperature (soldering, 10s) ................................................. 300°C  
NOTE: (1) Short-circuit to ground, one amplifier per package.  
ESD damage can range from subtle performance deg-  
radation to complete device failure. Precision inte-  
grated circuits may be more susceptible to damage  
because very small parametric changes could cause  
the device not to meet its published specifications.  
PACKAGE/ORDERING INFORMATION  
For the most current package and ordering information,  
see the Package Option Addendum located at the end  
of this data sheet.  
OPA132, 2132, 4132  
2
SBOS054A  
www.ti.com  
SPECIFICATIONS  
At TA = +25°C, VS = ±15V, unless otherwise noted.  
OPA132PA, UA  
OPA2132PA, UA  
OPA4132PA, UA  
OPA132P, U  
OPA2132P, U  
PARAMETER  
CONDITION  
MIN  
TYP  
MAX  
MIN  
TYP  
MAX  
UNITS  
OFFSET VOLTAGE  
Input Offset Voltage  
±0.25  
±2  
5
±0.5  
±10  
15  
±0.5  
ꢀ
ꢀ
±2  
ꢀ
30  
mV  
vs Temperature(1)  
Operating Temperature Range  
µV/°C  
µV/V  
µV/V  
vs Power Supply  
Channel Separation (dual and quad)  
V
S = ±2.5V to ±18V  
RL = 2kΩ  
0.2  
ꢀ
INPUT BIAS CURRENT  
Input Bias Current(2)  
vs Temperature  
VCM = 0V  
VCM = 0V  
+5  
±50  
±50  
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
pA  
pA  
See Typical Curve  
Input Offset Current(2)  
±2  
NOISE  
Input Voltage Noise  
Noise Density, f = 10Hz  
f = 100Hz  
f = 1kHz  
f = 10kHz  
Current Noise Density, f = 1kHz  
23  
10  
8
8
3
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
nV/√Hz  
nV/√Hz  
nV/√Hz  
nV/√Hz  
fA/√Hz  
INPUT VOLTAGE RANGE  
Common-Mode Voltage Range  
Common-Mode Rejection  
(V–)+2.5  
96  
±13  
100  
(V+)–2.5  
ꢀ
86  
ꢀ
94  
ꢀ
V
dB  
V
V
CM = –12.5V to +12.5V  
CM = –12.5V to +12.5V  
INPUT IMPEDANCE  
Differential  
Common-Mode  
1013 || 2  
1013 || 6  
ꢀ
ꢀ
Ω || pF  
Ω || pF  
OPEN-LOOP GAIN  
Open-Loop Voltage Gain  
RL = 10kΩ, VO = –14.5V to +13.8V  
RL = 2kΩ, VO = –13.8V to +13.5V  
RL = 600Ω, VO = –12.8V to +12.5V  
110  
110  
110  
120  
126  
130  
104  
104  
104  
ꢀ
120  
120  
dB  
dB  
dB  
FREQUENCY RESPONSE  
Gain-Bandwidth Product  
Slew Rate  
Settling Time: 0.1%  
0.01%  
8
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
MHz  
V/µs  
µs  
µs  
µs  
±20  
0.7  
1
G = –1, 10V Step, CL = 100pF  
G = –1, 10V Step, CL = 100pF  
G = ±1  
1kHz, G = 1, VO = 3.5Vrms  
RL = 2kΩ  
Overload Recovery Time  
Total Harmonic Distortion + Noise  
0.5  
0.00008  
0.00009  
ꢀ
ꢀ
%
%
RL = 600Ω  
OUTPUT  
Voltage Output, Positive  
Negative  
RL = 10kΩ  
RL = 2kΩ  
RL = 600Ω  
(V+)–1.2 (V+)–0.9  
(V–)+0.5 (V–)+0.3  
(V+)–1.5 (V+)–1.2  
(V–)+1.2 (V–)+0.9  
(V+)–2.5 (V+)–2.0  
(V–)+2.2 (V–)+1.9  
±40  
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
V
V
V
V
V
Positive  
Negative  
Positive  
Negative  
V
mA  
Short-Circuit Current  
Capacitive Load Drive (Stable Operation)  
See Typical Curve  
POWER SUPPLY  
Specified Operating Voltage  
Operating Voltage Range  
Quiescent Current (per amplifier)  
±15  
±4  
ꢀ
ꢀ
V
V
mA  
±2.5  
±18  
±4.8  
ꢀ
ꢀ
ꢀ
IO = 0  
TEMPERATURE RANGE  
Operating Range  
Storage  
–40  
–40  
+85  
+125  
ꢀ
ꢀ
ꢀ
ꢀ
°C  
°C  
Thermal Resistance, θJA  
8-Pin DIP  
SO-8 Surface-Mount  
14-Pin DIP  
100  
150  
80  
ꢀ
ꢀ
ꢀ
ꢀ
°C/W  
°C/W  
°C/W  
°C/W  
SO-14 Surface-Mount  
110  
ꢀ Specifications same as OPA132P, OPA132U.  
NOTES: (1) Guaranteed by wafer test. (2) High-speed test at TJ = 25°C.  
OPA132, 2132, 4132  
3
SBOS054A  
www.ti.com  
TYPICAL PERFORMANCE CURVES  
At TA = +25°C, VS = ±15V, RL = 2kΩ, unless otherwise noted.  
POWER SUPPLY AND COMMON-MODE REJECTION  
vs FREQUENCY  
OPEN-LOOP GAIN/PHASE vs FREQUENCY  
160  
140  
120  
100  
80  
0
120  
100  
80  
60  
40  
20  
0
–PSR  
–45  
–90  
–135  
–180  
φ
60  
40  
+PSR  
G
20  
CMR  
0
–20  
10  
100  
1k  
10k  
100k  
1M  
100k  
15  
0.1  
1
10  
100  
1k  
10k 100k  
1M  
10M  
Frequency (Hz)  
Frequency (Hz)  
INPUT VOLTAGE AND CURRENT NOISE  
SPECTRAL DENSITY vs FREQUENCY  
CHANNEL SEPARATION vs FREQUENCY  
RL = ∞  
160  
140  
120  
100  
80  
1k  
100  
Voltage Noise  
RL = 2kΩ  
Dual and quad devices.  
G = 1, all channels.  
Quad measured channel  
A to D or B to C—other  
combinations yield improved  
rejection.  
10  
1
Current Noise  
100  
1k  
10k  
1
10  
100  
1k  
10k  
100k  
1M  
Frequency (Hz)  
Frequency (Hz)  
INPUT BIAS CURRENT  
INPUT BIAS CURRENT vs TEMPERATURE  
vs INPUT COMMON-MODE VOLTAGE  
10  
9
8
7
6
5
4
3
2
1
0
100k  
10k  
1k  
High Speed Test  
Warmed Up  
High Speed Test  
Quad  
Dual  
100  
10  
1
Single  
0.1  
–75  
–50  
–25  
0
25  
50  
75  
100  
125  
–15  
–10  
–5  
0
5
10  
Ambient Temperature (°C)  
Common-Mode Voltage (V)  
OPA132, 2132, 4132  
4
SBOS054A  
www.ti.com  
TYPICAL PERFORMANCE CURVES (Cont.)  
At TA = +25°C, VS = ±15V, RL = 2kΩ, unless otherwise noted.  
QUIESCENT CURRENT AND SHORT-CIRCUIT CURRENT  
vs TEMPERATURE  
AOL, CMR, PSR vs TEMPERATURE  
4.3  
4.2  
4.1  
4.0  
3.9  
3.8  
60  
50  
40  
30  
20  
10  
130  
120  
110  
100  
90  
Open-Loop  
Gain  
±ISC  
PSR  
±IQ  
CMR  
50  
–75  
–50  
–25  
0
25  
75  
100  
125  
–75  
–50  
–25  
0
25  
50  
75  
100  
125  
Ambient Temperature (°C)  
Ambient Temperature (°C)  
OFFSET VOLTAGE  
OFFSET VOLTAGE DRIFT  
PRODUCTION DISTRIBUTION  
PRODUCTION DISTRIBUTION  
12  
10  
8
12  
10  
8
Typical production  
Typical production distribution  
of packaged units. Single,  
dual and quad units included.  
distribution of packaged  
units. Single, dual and  
quad units included.  
6
6
4
4
2
2
0
0
Offset Voltage Drift (µV/°C)  
Offset Voltage (µV)  
TOTAL HARMONIC DISTORTION + NOISE  
vs FREQUENCY  
MAXIMUM OUTPUT VOLTAGE  
vs FREQUENCY  
0.01  
0.001  
30  
20  
10  
0
RL  
2kΩ  
600Ω  
Maximum output voltage  
VS = ±15V  
without slew-rate  
induced distortion  
G = +10  
G = +1  
0.0001  
0.00001  
VS = ±5V  
VO = 3.5Vrms  
10k  
VS = ±2.5V  
10  
100  
1k  
100k  
10k  
100k  
Frequency (Hz)  
1M  
10M  
Frequency (Hz)  
OPA132, 2132, 4132  
5
SBOS054A  
www.ti.com  
TYPICAL PERFORMANCE CURVES (Cont.)  
At TA = +25°C, VS = ±15V, RL = 2kΩ, unless otherwise noted.  
SMALL-SIGNAL STEP RESPONSE  
G = 1, CL = 100pF  
LARGE-SIGNAL STEP RESPONSE  
G = 1, CL = 100pF  
200ns/div  
1µs/div  
SMALL-SIGNAL OVERSHOOT  
vs LOAD CAPACITANCE  
SETTLING TIME vs CLOSED-LOOP GAIN  
100  
10  
1
60  
50  
40  
30  
20  
10  
0
G = +1  
0.01%  
G = –1  
FPO  
0.1%  
G = ±10  
0.1  
±1  
±10  
±100  
±1000  
100pF  
1nF  
10nF  
Closed-Loop Gain (V/V)  
Load Capacitance  
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT  
15  
14  
13  
12  
11  
10  
VIN = 15V  
–55°C  
25°C
125°C  
85°C  
–10  
–11  
–12  
–13  
–14  
–15  
85°C  
125°C  
–55°C  
25°C  
VIN = –15V  
0
10  
20  
30  
40  
50  
60  
Output Current (mA)  
OPA132, 2132, 4132  
6
SBOS054A  
www.ti.com  
APPLICATIONS INFORMATION  
V+  
Trim Range: ±4mV typ  
OPA132 series op amps are unity-gain stable and suitable  
for a wide range of general-purpose applications. Power  
supply pins should be bypassed with 10nF ceramic capaci-  
tors or larger.  
10nF  
100kΩ  
7
1
2
3
OPA132 op amps are free from unexpected output phase-  
reversal common with FET op amps. Many FET-input op  
amps exhibit phase-reversal of the output when the input  
common-mode voltage range is exceeded. This can occur in  
voltage-follower circuits, causing serious problems in  
control loop applications. OPA132 series op amps are free  
from this undesirable behavior. All circuitry is completely  
independent in dual and quad versions, assuring normal  
behavior when one amplifier in a package is overdriven or  
short-circuited.  
8
6
OPA132  
OPA132 single op amp only.  
Use offset adjust pins only to null  
offset voltage of op amp—see text.  
4
10nF  
V–  
FIGURE 1. OPA132 Offset Voltage Trim Circuit.  
INPUT BIAS CURRENT  
OPERATING VOLTAGE  
The FET-inputs of the OPA132 series provide very low  
input bias current and cause negligible errors in most appli-  
cations. For applications where low input bias current is  
crucial, junction temperature rise should be minimized. The  
input bias current of FET-input op amps increases with  
temperature as shown in the typical performance curve  
“Input Bias Current vs Temperature.”  
OPA132 series op amps operate with power supplies from  
±2.5V to ±18V with excellent performance. Although  
specifications are production tested with ±15V supplies,  
most behavior remains unchanged throughout the full  
operating voltage range. Parameters which vary signifi-  
cantly with operating voltage are shown in the typical  
performance curves.  
The OPA132 series may be operated at reduced power  
supply voltage to minimize power dissipation and tempera-  
ture rise. Using ±3V supplies reduces power dissipation to  
one-fifth that at ±15V.  
OFFSET VOLTAGE TRIM  
Offset voltage of OPA132 series amplifiers is laser trimmed  
and usually requires no user adjustment. The OPA132  
(single op amp version) provides offset voltage trim con-  
nections on pins 1 and 8. Offset voltage can be adjusted by  
connecting a potentiometer as shown in Figure 1. This  
adjustment should be used only to null the offset of the op  
amp, not to adjust system offset or offset produced by the  
signal source. Nulling offset could degrade the offset  
voltage drift behavior of the op amp. While it is not  
possible to predict the exact change in drift, the effect is  
usually small.  
The dual and quad versions have higher total power dissipa-  
tion than the single, leading to higher junction temperature.  
Thus, a warmed-up quad will have higher input bias current  
than a warmed-up single. Furthermore, an SOIC will gener-  
ally have higher junction temperature than a DIP at the same  
ambient temperature because of a larger θJA. Refer to the  
specifications table.  
Circuit board layout can also help minimize junction tem-  
perature rise. Temperature rise can be minimized by solder-  
ing the devices to the circuit board rather than using a socket.  
Wide copper traces will also help dissipate the heat by acting  
as an additional heat sink.  
Input stage cascode circuitry assures that the input bias  
current remains virtually unchanged throughout the full  
input common-mode range of the OPA132 series. See the  
typical performance curve “Input Bias Current vs Common-  
Mode Voltage.”  
OPA132, 2132, 4132  
7
SBOS054A  
www.ti.com  
PACKAGE OPTION ADDENDUM  
www.ti.com  
12-Feb-2007  
PACKAGING INFORMATION  
Orderable Device  
Status (1)  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
PDIP  
PDIP  
PDIP  
PDIP  
SOIC  
Drawing  
OPA132P  
OPA132P1  
OPA132PA  
OPA132PA2  
OPA132U  
OBSOLETE  
OBSOLETE  
OBSOLETE  
OBSOLETE  
ACTIVE  
P
P
P
P
D
8
8
8
8
8
TBD  
TBD  
TBD  
TBD  
Call TI  
Call TI  
Call TI  
Call TI  
Call TI  
Call TI  
Call TI  
Call TI  
100 Green (RoHS & CU NIPDAU Level-3-260C-168 HR  
no Sb/Br)  
OPA132U/2K5  
ACTIVE  
ACTIVE  
SOIC  
SOIC  
D
D
8
8
2500 Green (RoHS & CU NIPDAU Level-3-260C-168 HR  
no Sb/Br)  
OPA132U/2K5G4  
2500 Green (RoHS & CU NIPDAU Level-3-260C-168 HR  
no Sb/Br)  
OPA132U1  
OPA132UA  
OBSOLETE  
ACTIVE  
PDIP  
SOIC  
P
D
8
8
TBD  
Call TI  
Call TI  
100 Green (RoHS & CU NIPDAU Level-3-260C-168 HR  
no Sb/Br)  
OPA132UA/2K5  
OPA132UA/2K5E4  
OPA132UA/2K5G4  
ACTIVE  
ACTIVE  
ACTIVE  
SOIC  
SOIC  
SOIC  
D
D
D
8
8
8
2500 Green (RoHS & CU NIPDAU Level-3-260C-168 HR  
no Sb/Br)  
2500 Green (RoHS & CU NIPDAU Level-3-260C-168 HR  
no Sb/Br)  
2500 Green (RoHS & CU NIPDAU Level-3-260C-168 HR  
no Sb/Br)  
OPA132UA2  
OBSOLETE  
ACTIVE  
PDIP  
SOIC  
P
D
8
8
TBD  
Call TI  
Call TI  
OPA132UAE4  
100 Green (RoHS & CU NIPDAU Level-3-260C-168 HR  
no Sb/Br)  
OPA132UAG4  
OPA132UG4  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
SOIC  
SOIC  
PDIP  
PDIP  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
D
D
P
P
D
D
D
D
D
D
D
D
D
8
8
8
8
8
8
8
8
8
8
8
8
8
100 Green (RoHS & CU NIPDAU Level-3-260C-168 HR  
no Sb/Br)  
100 Green (RoHS & CU NIPDAU Level-3-260C-168 HR  
no Sb/Br)  
OPA2132P  
50 Green (RoHS & CU NIPDAU N / A for Pkg Type  
no Sb/Br)  
OPA2132PA  
50 Green (RoHS & CU NIPDAU N / A for Pkg Type  
no Sb/Br)  
OPA2132U  
100  
2500  
2500  
Pb-Free  
(RoHS)  
CU NIPDAU Level-3-260C-168 HR  
CU NIPDAU Level-3-260C-168 HR  
CU NIPDAU Level-3-260C-168 HR  
OPA2132U/2K5  
OPA2132U/2K5E4  
OPA2132UA  
Pb-Free  
(RoHS)  
Pb-Free  
(RoHS)  
100 Green (RoHS & CU NIPDAU Level-3-260C-168 HR  
no Sb/Br)  
OPA2132UA/2K5  
OPA2132UA/2K5E4  
OPA2132UAE4  
OPA2132UAG4  
OPA2132UE4  
2500  
2500  
100  
Pb-Free  
(RoHS)  
CU NIPDAU Level-3-260C-168 HR  
CU NIPDAU Level-3-260C-168 HR  
CU NIPDAU Level-3-260C-168 HR  
Pb-Free  
(RoHS)  
Pb-Free  
(RoHS)  
100 Green (RoHS & CU NIPDAU Level-3-260C-168 HR  
no Sb/Br)  
100  
Pb-Free  
(RoHS)  
CU NIPDAU Level-3-260C-168 HR  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
12-Feb-2007  
Orderable Device  
Status (1)  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
PDIP  
SOIC  
Drawing  
OPA4132PA  
OPA4132UA  
OBSOLETE  
ACTIVE  
N
D
14  
14  
TBD  
Call TI  
Call TI  
50 Green (RoHS & CU NIPDAU Level-3-260C-168 HR  
no Sb/Br)  
OPA4132UA/2K5  
OPA4132UA/2K5E4  
OPA4132UAE4  
ACTIVE  
ACTIVE  
ACTIVE  
SOIC  
SOIC  
SOIC  
D
D
D
14  
14  
14  
2500 Green (RoHS & CU NIPDAU Level-3-260C-168 HR  
no Sb/Br)  
2500  
Pb-Free  
(RoHS)  
CU NIPDAU Level-3-260C-168 HR  
50 Green (RoHS & CU NIPDAU Level-3-260C-168 HR  
no Sb/Br)  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and  
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS  
compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is  
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the  
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take  
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on  
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited  
information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
to Customer on an annual basis.  
Addendum-Page 2  
MECHANICAL DATA  
MPDI001A – JANUARY 1995 – REVISED JUNE 1999  
P (R-PDIP-T8)  
PLASTIC DUAL-IN-LINE  
0.400 (10,60)  
0.355 (9,02)  
8
5
0.260 (6,60)  
0.240 (6,10)  
1
4
0.070 (1,78) MAX  
0.325 (8,26)  
0.300 (7,62)  
0.020 (0,51) MIN  
0.015 (0,38)  
Gage Plane  
0.200 (5,08) MAX  
Seating Plane  
0.010 (0,25) NOM  
0.125 (3,18) MIN  
0.100 (2,54)  
0.021 (0,53)  
0.430 (10,92)  
MAX  
0.010 (0,25)  
M
0.015 (0,38)  
4040082/D 05/98  
NOTES: A. All linear dimensions are in inches (millimeters).  
B. This drawing is subject to change without notice.  
C. Falls within JEDEC MS-001  
For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm  
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
IMPORTANT NOTICE  
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,  
enhancements, improvements, and other changes to its products and services at any time and to  
discontinue any product or service without notice. Customers should obtain the latest relevant information  
before placing orders and should verify that such information is current and complete. All products are sold  
subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.  
TI warrants performance of its hardware products to the specifications applicable at the time of sale in  
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent  
TI deems necessary to support this warranty. Except where mandated by government requirements, testing  
of all parameters of each product is not necessarily performed.  
TI assumes no liability for applications assistance or customer product design. Customers are responsible  
for their products and applications using TI components. To minimize the risks associated with customer  
products and applications, customers should provide adequate design and operating safeguards.  
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent  
right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine,  
or process in which TI products or services are used. Information published by TI regarding third-party  
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that product or service voids all express and any implied warranties for the associated TI product or service  
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Following are URLs where you can obtain information on other Texas Instruments products and application  
solutions:  
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Applications  
Audio  
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Broadband  
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interface.ti.com  
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www.ti.com/audio  
www.ti.com/automotive  
www.ti.com/broadband  
www.ti.com/digitalcontrol  
www.ti.com/military  
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power.ti.com  
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