OPA4277UAG4_技术文档

O

P

A

2

P

A

2

O

7

P

A

4

7

OPA277

OPA2277

OPA4277

2

7

OPA2277

OPA277

O

P

A

4277

O

P

O

P

A

2

7

SBOS079A – MARCH 1999 – REVISED APRIL 2005

High Precision

OPERATIONAL AMPLIFIERS

FEATURES

DESCRIPTION

The OPA277 series precision op amps replace the industry

standard OP-177. They offer improved noise, wider output

voltage swing, and are twice as fast with half the quiescent

current. Features include ultra low offset voltage and drift, low

bias current, high common-mode rejection, and high power

supply rejection. Single, dual, and quad versions have identical

specifications for maximum design flexibility.

ꢀ ULTRA LOW OFFSET VOLTAGE: 10µV

ꢀ ULTRA LOW DRIFT: ±0.1µV/°C

ꢀ HIGH OPEN-LOOP GAIN: 134dB

ꢀ HIGH COMMON-MODE REJECTION: 140dB

ꢀ HIGH POWER SUPPLY REJECTION: 130dB

ꢀ LOW BIAS CURRENT: 1nA max

OPA277 series op amps operate from ±2V to ±18V supplies with

excellent performance. Unlike most op amps which are specified

at only one supply voltage, the OPA277 series is specified for

real-world applications; a single limit applies over the ±5V to

±15V supply range. High performance is maintained as the

amplifiers swing to their specified limits. Because the initial offset

voltage (±20µV max) is so low, user adjustment is usually not

required. However, the single version (OPA277) provides exter-

nal trim pins for special applications.

ꢀ WIDE SUPPLY RANGE: ±2V to ±18V

ꢀ LOW QUIESCENT CURRENT: 800µA/amplifier

ꢀ SINGLE, DUAL, AND QUAD VERSIONS

ꢀ REPLACES OP-07, OP-77, OP-177

APPLICATIONS

ꢀ TRANSDUCER AMPLIFIER

OPA277 op amps are easy to use and free from phase inversion

and overload problems found in some other op amps. They are

stable in unity gain and provide excellent dynamic behavior over

a wide range of load conditions. Dual and quad versions feature

completely independent circuitry for lowest crosstalk and free-

dom from interaction, even when overdriven or overloaded.

ꢀ BRIDGE AMPLIFIER

ꢀ TEMPERATURE MEASUREMENTS

ꢀ STRAIN GAGE AMPLIFIER

ꢀ PRECISION INTEGRATOR

ꢀ BATTERY POWERED INSTRUMENTS

ꢀ TEST EQUIPMENT

Single (OPA277) and dual (OPA2277) versions are available

in DIP-8, SO-8, and DFN-8 (4mm x 4mm) packages. The quad

(OPA4277) comes in DIP-14 and SO-14 surface-mount pack-

ages. All are fully specified from –40°C to +85°C and operate

OPA277

Offset Trim

1

2

3

4

8

7

6

5

Offset Trim

V+

from –55°C to +125°C.

OPA277AIDRM

–In

+In

V–

Output

NC

Offset Trim

−In

1

2

3

4

8

7

6

5

Offset Trim

V+

OPA4277

Pin 1

Indicator

Out A

–In A

+In A

V+

1

14 Out D

13 –In D

12 +In D

11 V–

8-Pin DIP, SO-8

2

3

4

5

6

7

+In

Output

NC

A

B

D

C

OPA2277AIDRM

V−

Out A

−In A

+In A

V−

1

2

3

4

8

7

6

5

Out B

+In B

–In B

Out B

10 +In C

Pin 1

Indicator

DFN-8 4mm x 4mm

(top view)

9

8

–In C

OPA2277

Thermal Pad

on Bottom

(Connect to V−)

V+

Out C

Out A

–In A

+In A

V–

1

2

3

4

8

V+

−In B

+In B

A

14-Pin DIP, SO-14

7

Out B

–In B

+In B

B

6

5

DFN-8 4mm x 4mm

(top view)

Thermal Pad

on Bottom

NC = No connection.

8-Pin DIP, SO-8

(Connect to V−)

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

www.ti.com

ABSOLUTE MAXIMUM RATINGS⁽¹⁾

ELECTROSTATIC

DISCHARGE SENSITIVITY

This integrated circuit can be damaged by ESD. Texas Instru-

ments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling

and installation procedures can cause damage.

Supply Voltage .................................................................................... 36V

Input Voltage .....................................................(V–) –0.7V to (V+) +0.7V

Output Short-Circuit⁽²⁾.............................................................. Continuous

Operating Temperature ..................................................–55°C to +125°C

Storage Temperature .....................................................–55°C to +125°C

Junction Temperature ...................................................................... 150°C

Lead Temperature (soldering, 10s) ................................................. 300°C

ESD Rating (Human Body Model) .................................................. 2000V

(Machine Model) ........................................................... 100V

ESD damage can range from subtle performance degradation

to complete device failure. Precision integrated circuits may be

more susceptible to damage because very small parametric

changes could cause the device not to meet its published

specifications.

NOTE: (1) Stresses above these rating may cause permanent damage.

Exposure to absolute maximum conditions for extended periods may degrade

device reliability. (2) Short-circuit to ground, one amplifier per package.

PACKAGE/ORDERING INFORMATION⁽¹⁾

OFFSET

VOLTAGE

VOLTAGE DRIFT

PRODUCT

max, µV

max, µV/°C

PACKAGE-LEAD

Single

OPA277PA

OPA277P

OPA277UA

OPA277U

OPA277AIDRM

±50

±20

±50

±20

±100

±1

±0.15

±1

±0.15

±1

DIP-8

SO-8 Surface Mount

DFN-8 (4mm x 4mm)

Dual

OPA2277PA

OPA2277P

OPA2277UA

OPA2277U

OPA2277AIDRM

±50

±25

±50

±25

±100

±1

±0.25

±1

±0.25

±1

DIP-8

SO-8 Surface Mount

DFN-8 (4mm x 4mm)

Quad

OPA4277PA

OPA4277UA

±50

±1

DIP-14

SO-14 Surface Mount

NOTE: (1) For the most current package and ordering information, see the Package Option Addendum located at the end of this data sheet or visit the TI web site

at www.ti.com.

PIN DESCRIPTIONS

OPA2277AIDRM

OPA277

Offset Trim

1

2

3

4

8

7

6

5

Offset Trim

V+

Out A

−In A

+In A

V−

1

2

3

4

8

7

6

5

Out B

V+

–In

+In

V–

Pin 1

Indicator

Output

NC⁽¹⁾

−In B

+In B

OPA4277

8-Pin DIP, SO-8

Out A

–In A

+In A

V+

1

2

3

4

5

6

7

14 Out D

13 –In D

12 +In D

11 V–

DFN-8 4mm x 4mm

(top view)

A

B

D

C

Thermal Pad

on Bottom

(Connect to V−)

OPA277AIDRM

+In B

–In B

Out B

10 +In C

9

8

–In C

Offset Trim

1

8

Offset Trim

V+

Out C

Pin 1

Indicator

−In

+In

V−

2

3

4

7

6

5

OPA2277

14-Pin DIP, SO-14

Output

NC

Out A

–In A

+In A

V–

1

2

3

4

8

7

6

5

V+

A

Out B

–In B

+In B

B

DFN-8 4mm x 4mm

(top view)

Thermal Pad

on Bottom

NOTE: (1) NC = No connection.

(Connect to V−)

8-Pin DIP, SO-8

OPA277, OPA2277, OPA4277

2

SBOS079A

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ELECTRICAL CHARACTERISTICS: V_S= ±5V to V_S= ±15V

At T_A= +25°C, and R_L= 2kΩ, unless otherwise noted.

Boldface limits apply over the specified temperature range, –40°C to +85°C.

OPA277PA, UA

OPA277P, U

OPA2277P, U

OPA2277PA, UA

OPA4277PA, UA

OPA277AIDRM,

OPA2277AIDRM

PARAMETER

CONDITION

MIN

TYP⁽¹⁾

MAX

MIN

TYP⁽¹⁾

MAX

MIN

TYP⁽¹⁾

MAX

UNITS

OFFSET VOLTAGE

Input Offset Voltage:

V_OS

OPA277P, U (high grade, single)

OPA2277P, U (high grade, dual)

All PA, UA, Versions

±10

±20

±25

µV

±20

±50

AIDRM Versions

±35

±100

Input Offset Voltage Over Temperature

OPA277P, U (high grade, single)

OPA2277P, U (high grade, dual)

All PA, UA, Versions

T

_A= –40

°

C to +85

°

°C

C

±

±50

30

µV

±100

AIDRM Versions

±165

Input Offset Voltage Drift

dV_OS/dT

OPA277P, U (high grade, single)

OPA2277P, U (high grade, dual)

All PA, UA, AIDRM Versions

T

_A= –40

°

C to +85

°

°C

C

±

±0.1

0.1

±

0.15

µV/°C

±0.25

±0.15

±1

±0.15

±1

Input Offset Voltage: (all models)

vs Time

0.2

ꢀ

µV/mo

µV/V

vs Power Supply

PSRR

V_S= ±2V to ±18V

dc

±0.3

±0.5

0.5

±1

T

_A= –40°C to +85

°C

±

±1

Channel Separation (dual, quad)

0.1

ꢀ

INPUT BIAS CURRENT

Input Bias Current

I_B

±0.5

±1

ꢀ

±2.8

nA

T

_A= –40

Input Offset Current

_A= –40 C to +85

°

C to +85

°

C

±2

±1

±4

±2.8

±4

±2.8

I_OS

T

°

C

±2

±4

NOISE

Input Voltage Noise, f = 0.1 to 10Hz

0.22

0.035

12

ꢀ

µV_PP

µVrms

nV/√Hz

pA/√Hz

Input Voltage Noise Density, f = 10Hz e_n

f = 100Hz

f = 1kHz

8

f = 10kHz

8

Current Noise Density, f = 1kHz

i_n

0.2

INPUT VOLTAGE RANGE

Common-Mode Voltage Range

Common-Mode Rejection

V_CM

(V–) +2

130

(V+) –2

ꢀ

115

ꢀ

115

ꢀ

V

CMRR V_CM= (V–) +2V to (V+) –2V

V_CM= (V–) +2V to (V+) –2V

140

ꢀ

dB

T

_A= –40°C to +85

°C

128

INPUT IMPEDANCE

Differential

100 || 3

250 || 3

ꢀ

MΩ || pF

GΩ || pF

Common-Mode

V_CM= (V–) +2V to (V+) –2V

OPEN-LOOP GAIN

Open-Loop Voltage Gain

A_OL

V_O= (V–)+0.5V to

(V+)–1.2V, R_L= 10kΩ

140

134

ꢀ

dB

V_O= (V–)+1.5V to

(V+)–1.5V, R_L= 2kΩ

126

ꢀ

T_A= –40°C to +85

°C

V_O= (V–)+1.5V to

(V+)–1.5V, R_L= 2kΩ

126

FREQUENCY RESPONSE

Gain-Bandwidth Product

Slew Rate

GBW

SR

1

0.8

14

ꢀ

MHz

V/µs

µs

Settling Time, 0.1%

0.01%

V_S= ±15V, G = 1, 10V Step

V_IN• G = V_S

16

µs

Overload Recovery Time

3

µs

Total Harmonic Distortion + Noise THD+N

1kHz, G = 1, V_O= 3.5Vrms

0.002

%

ꢀ Specifications same as OPA277P, U.

NOTE: (1) V_S= ±15V.

OPA277, OPA2277, OPA4277

SBOS079A

3

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ELECTRICAL CHARACTERISTICS: V_S= ±5V to V_S= ±15V (CONT)

At T_A= +25°C, and R_L= 2kΩ, unless otherwise noted.

Boldface limits apply over the specified temperature range, –40°C to +85°C.

OPA277PA, UA

OPA277P, U

OPA2277P, U

OPA2277PA, UA

OPA4277PA, UA

OPA277AIDRM,

OPA2277AIDRM

PARAMETER

CONDITION

MIN

TYP⁽¹⁾

MAX

MIN

TYP⁽¹⁾

MAX

MIN

TYP⁽¹⁾

MAX

UNITS

OUTPUT

Voltage Output

V_O

R_L= 10kΩ

(V–) +0.5

(V–) +1.5

(V+) –1.2

(V+) –1.5

ꢀ

V

T

_A= –40

°

C to +85

°C

R

_L= 2kΩ

V

_A= –40

°

C to +85

°C

R_L= 2kΩ

V

Short-Circuit Current

I_SC

±35

ꢀ

mA

Capacitive Load Drive

C_LOAD

See Typical Curve

POWER SUPPLY

Specified Voltage Range

Operating Voltage Range

Quiescent Current (per amplifier)

V_S

I_Q

±5

±2

±15

±18

ꢀ

V

I_O= 0

±790

±825

ꢀ

µA

T

_A= –40°C to +85

°C

±900

TEMPERATURE RANGE

Specified Range

Operating Range

Storage Range

Thermal Resistance

SO-8 Surface-Mount

DIP-8

–40

–55

+85

+125

ꢀ

°C

θ_JA

150

100

80

ꢀ

°C/W

DIP-14

SO-14 Surface-Mount

DFN-8⁽²⁾

100

45

ꢀ Specifications same as OPA277P, U.

NOTES: (1) V_S= ±15V.

(2) Thermal pad soldered to printed circuit board (PCB).

OPA277, OPA2277, OPA4277

4

SBOS079A

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TYPICAL CHARACTERISTICS

At T_A= +25°C, V_S= ±15V, and R_L= 2kΩ, unless otherwise noted.

POWER SUPPLY AND COMMON-MODE

REJECTION vs FREQUENCY

OPEN-LOOP GAIN/PHASE

vs FREQUENCY

140

120

100

80

G

C_L= 0

C_L= 1500pF

120

0

+PSR

–PSR

100

–30

–60

–90

–120

–150

–180

80

φ

60

40

20

0

CMR

60

40

20

–20

0

0.1

1

10

100

1k

10k

100k

1M

0.1

1

10

100

1k

10k 100k

1M

10M

Frequency (Hz)

INPUT NOISE AND CURRENT NOISE

SPECTRAL DENSITY vs FREQUENCY

INPUT NOISE VOLTAGE vs TIME

1000

100

10

Noise signal is bandwidth limited to

lie between 0.1Hz and 10Hz.

Current Noise

Voltage Noise

1

10

100

1k

10k

1s/div

Frequency (Hz)

TOTAL HARMONIC DISTORTION + NOISE

vs FREQUENCY

CHANNEL SEPARATION vs FREQUENCY

140

120

100

80

1

0.1

V_OUT= 3.5Vrms

Dual and quad devices. G = 1,

all channels. Quad measured

channel A to D or B to C—other

combinations yield similar or

improved rejection.

G = 10, R_L= 2kΩ, 10kΩ

G = 1, R_L= 2kΩ, 10kΩ

0.01

0.001

60

40

10

100

1k

10k

100k

1M

10

100

1k

10k

100k

Frequency (Hz)

OPA277, OPA2277, OPA4277

SBOS079A

5

www.ti.com

TYPICAL CHARACTERISTICS (CONT)

At T_A= +25°C, V_S= ±15V, and R_L= 2kΩ, unless otherwise noted.

OFFSET VOLTAGE DRIFT

OFFSET VOLTAGE PRODUCTION DISTRIBUTION

PRODUCTION DISTRIBUTION

16

35

30

25

20

15

10

5

Typical distribution

14

12

10

8

of packaged units.

Single, dual, and

quad included.

of packaged units.

Single, dual, and

quad included.

6

4

2

0

–50–45–40–35–30–25–20–15–10 –5

0

5 10 15 20 25 30 35 40 45 50

0

0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0

Offset Voltage (µV)

Offset Voltage (µV/°C)

WARM-UP OFFSET VOLTAGE DRIFT

A_OL, CMR, PSR vs TEMPERATURE

3

160

150

140

130

120

110

100

2

1

CMR

A_OL

0

PSR

–1

–2

–3

0

15

30

45

60

75

90

105

120

–75

–50

–25

0

25

50

75

100

125

Time from Power Supply Turn-On (s)

Temperature (°C)

QUIESCENT CURRENT AND

SHORT-CIRCUIT CURRENT vs TEMPERATURE

INPUT BIAS CURRENT vs TEMPERATURE

100

1000

950

900

850

800

750

700

650

600

550

500

5

4

90

80

70

60

50

40

30

20

10

0

3

2

±I_Q

1

0

–I_SC

–1

–2

–3

–4

–5

+I_SC

Curves represent typical

production units.

–75

–50

–25

0

25

50

75

100

125

–75

–50

–25

0

25

50

75

100

125

Temperature (°C)

OPA277, OPA2277, OPA4277

6

SBOS079A

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TYPICAL CHARACTERISTICS (CONT)

At T_A= +25°C, V_S= ±15V, and R_L= 2kΩ, unless otherwise noted.

CHANGE IN INPUT BIAS CURRENT

vs POWER SUPPLY VOLTAGE

2.0

CHANGE IN INPUT BIAS CURRENT

vs COMMON-MODE VOLTAGE

2.0

1.5

Curve shows normalized change in bias current

with respect to V_CM= 0V. Typical I_Bmay range

from –05.nA to +0.5nA at V_CM= 0V.

Curve shows normalized change in

bias current with respect to V_S= ±10V

1.5

(+20V). Typical I_Bmay range from

–0.5nA to +0.5nA at V_S= ±10V.

1.0

V_S= ±5V

0.5

0.0

V_CM= 0V

–0.5

–1.0

–1.5

–2.0

–0.5

–1.0

–1.5

–2.0

V_S= ±15V

0

5

10

15

20

25

30

35

40

–15

±1

0

–10

–5

0

5

10

15

Supply Voltage (V)

Common-Mode Voltage (V)

QUIESCENT CURRENT vs SUPPLY VOLTAGE

per amplifier

SETTLING TIME vs CLOSED-LOOP GAIN

1000

900

800

700

600

500

100

50

10V step

C_L= 1500pF

0.01%

0.1%

20

10

0

±5

±10

±15

±20

±10

±100

Supply Voltage (V)

Gain (V/V)

MAXIMUM OUTPUT VOLTAGE

vs FREQUENCY

OUTPUT VOLTAGE SWING vs OUTPUT CURRENT

(V+)

(V+) – 1

(V+) – 2

(V+) – 3

(V+) – 4

(V+) – 5

30

25

20

15

10

5

V_S= ±15V

–55°C

125°C

25°C

(V–) + 5

(V–) + 4

(V–) + 3

(V–) + 2

(V–) + 1

(V–)

125°C

V_S= ±5V

–55°C

0

±5

±10

±15

±20

±25

±30

1k

10k

100k

1M

Output Current (mA)

Frequency (Hz)

OPA277, OPA2277, OPA4277

SBOS079A

7

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TYPICAL CHARACTERISTICS (CONT)

At T_A= +25°C, V_S= ±15V, and R_L= 2kΩ, unless otherwise noted.

SMALL-SIGNAL OVERSHOOT

vs LOAD CAPACITANCE

60

LARGE-SIGNAL STEP RESPONSE

G = +1, CL = 1500pF, V_S= +15V

Gain = –1

50

40

Gain = +1

30

20

Gain = ±10

10

0

10

100

1k

10k

100k

10µs/div

Load Capacitance (pF)

SMALL-SIGNAL STEP RESPONSE

G = +1, C_L= 0, V_S= ±15V

G = +1, C_L= 1500pF, V_S= ±15V

1µs/div

OPA277, OPA2277, OPA4277

8

SBOS079A

www.ti.com

connecting a potentiometer as shown in Figure 1. This

adjustment should be used only to null the offset of the op

amp. This adjustment should not be used to compensate for

offsets created elsewhere in a system since this can intro-

duce additional temperature drift.

APPLICATIONS INFORMATION

The OPA277 series is unity-gain stable and free from unex-

pected output phase reversal, making it easy to use in a wide

range of applications. Applications with noisy or high imped-

ance power supplies may require decoupling capacitors

close to the device pins. In most cases 0.1µF capacitors are

adequate.

V+

Trim Range: Exceeds

Offset Voltage Specification

0.1µF

The OPA277 series has very low offset voltage and drift. To

achieve highest performance, circuit layout and mechanical

conditions should be optimized. Offset voltage and drift can

be degraded by small thermoelectric potentials at the op amp

inputs. Connections of dissimilar metals will generate thermal

potential which can degrade the ultimate performance of the

OPA277 series. These thermal potentials can be made to

cancel by assuring that they are equal in both input terminals.

20kΩ

7

1

2

8

OPA277

6

3

OPA277 single op amp only.

Use offset adjust pins only to null

4

0.1µF

offset voltage of op amp—see text.

• Keep thermal mass of the connections made to the two

V–

input terminals similar.

FIGURE 1. OPA277 Offset Voltage Trim Circuit.

• Locate heat sources as far as possible from the critical

input circuitry.

• Shield op amp and input circuitry from air currents such as

INPUT PROTECTION

cooling fans.

The inputs of the OPA277 series are protected with 1kΩ

series input resistors and diode clamps. The inputs can

withstand ±30V differential inputs without damage. The pro-

tection diodes will, of course, conduct current when the

inputs are over-driven. This may disturb the slewing behavior

of unity-gain follower applications, but will not damage the op

amp.

OPERATING VOLTAGE

OPA277 series op amp operate from ±2V to ±18V supplies

with excellent performance. Unlike most op amps which are

specified at only one supply voltage, the OPA277 series is

specified for real-world applications; a single limit applies

over the ±5V to ±15V supply range. This allows a customer

operating at V_S= ±10V to have the same assured perfor-

mance as a customer using ±15V supplies. In addition, key

parameters are assured over the specified temperature range,

–40°C to +85°C. Most behavior remains unchanged through

the full operating voltage range (±2V to ±18V). Parameters

which vary significantly with operating voltage or temperature

are shown in typical performance curves.

INPUT BIAS CURRENT CANCELLATION

The input stage base current of the OPA277 series is

internally compensated with an equal and opposite cancella-

tion circuit. The resulting input bias current is the difference

between the input stage base current and the cancellation

current. This residual input bias current can be positive or

negative.

When the bias current is canceled in this manner, the input

bias current and input offset current are approximately the

same magnitude. As a result, it is not necessary to use a bias

current cancellation resistor as is often done with other op

amps (Figure 2). A resistor added to cancel input bias current

errors may actually increase offset voltage and noise.

OFFSET VOLTAGE ADJUSTMENT

The OPA277 series is laser-trimmed for very low offset

voltage and drift so most circuits will not require external

adjustment. However, offset voltage trim connections are

provided on pins 1 and 8. Offset voltage can be adjusted by

R₂

R₁

Op Amp

OPA277

R_B= R₂|| R₁

No bias current

cancellation resistor

(see text)

(a)

(b)

Conventional op amp with external bias

current cancellation resistor.

OPA277 with no external bias current

cancellation resistor.

FIGURE 2. Input Bias Current Cancellation.

OPA277, OPA2277, OPA4277

SBOS079A

9

www.ti.com

V+

1/2

R₂

R₁

V_OUT= (V₁– V₂)(1 +

)

OPA2277

R₂

V–

V+

R–∆R

R+∆R

V₂

R₁

Load

Cell

V₁

1/2

R–∆R

OPA2277

V–

R₂

R₁

For integrated solution see: INA126, INA2126 (dual)

INA125 (on-board reference)

INA122 (single-supply)

FIGURE 3. Load Cell Amplifier.

I_REG1mA

5V

12

1

V+

V_LIN

V_I⁺_N

14

I_R1

1/2

13

11

V_REG

I_R2

10

V+

OPA2277

Type J

R_F

10kΩ

4

R_G

1250Ω

9

8

B

E

R

412Ω

XTR105

R_F

10kΩ

3

R_G

V_I^–_N

I_O

1/2

OPA2277

2

7

1kΩ

25Ω

I_RET

I_O= 4mA + (V_I⁺_N– V_I^–_N

)

40

R_G

V–

6

50Ω

R_CM= 1250Ω

2R_F

R

(G = 1 +

= 50)

0.01µF

FIGURE 4. Thermocouple Low Offset, Low Drift Loop Measurement with Diode Cold Junction Compensation.

OPA277, OPA2277, OPA4277

10

SBOS079A

www.ti.com

DFN PACKAGE

LAYOUT GUIDELINES

The OPA277 series uses the 8-lead DFN (also known as

SON), which is a QFN package with contacts on only two

sides of the package bottom. This leadless, near-chip-scale

package maximizes board space and enhances thermal and

electrical characteristics through an exposed pad.

The leadframe die pad should be soldered to a thermal pad

on the PCB. Mechanical drawings located at the end of this

data sheet list the physical dimensions for the package and

pad.

Soldering the exposed pad significantly improves board-level

reliability during temperature cycling, key push, package

shear, and similar board-level tests. Even with applications

that have low-power dissipation, the exposed pad must be

soldered to the PCB to provide structural integrity and long-

term reliability.

DFN packages are physically small, have a smaller routing

area, improved thermal performance, and improved electrical

parasitics, with a pinout scheme that is consistent with other

commonly-used packages, such as SO and MSOP. Addition-

ally, the absence of external leads eliminates bent-lead

issues.

The DFN package can be easily mounted using standard

printed circuit board (PCB) assembly techniques. See Appli-

cation Note, QFN/SON PCB Attachment (SLUA271) and

Application Report, Quad Flatpack No-Lead Logic Packages

(SCBA017), both available for download at www.ti.com.

The exposed leadframe die pad on the bottom of the

package should be connected to V–.

OPA277, OPA2277, OPA4277

SBOS079A

11

www.ti.com

PACKAGE OPTION ADDENDUM

www.ti.com

28-Jun-2007

PACKAGING INFORMATION

Orderable Device

Status ⁽¹⁾

Package Package

Pins Package Eco Plan ⁽²⁾Lead/Ball Finish MSL Peak Temp ⁽³⁾

Qty

Type

SON

Drawing

OPA2277AIDRMR

OPA2277AIDRMRG4

OPA2277AIDRMT

PREVIEW

ACTIVE

DRM

8

3000

TBD

Call TI

DRM

250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

OPA2277AIDRMTG4

OPA2277P

ACTIVE

SON

PDIP

SOIC

DRM

P

8

250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

50 Green (RoHS & CU NIPDAU N / A for Pkg Type

no Sb/Br)

OPA2277PA

P

50 Green (RoHS & CU NIPDAU N / A for Pkg Type

no Sb/Br)

OPA2277PAG4

OPA2277PG4

OPA2277U

P

50 Green (RoHS & CU NIPDAU N / A for Pkg Type

no Sb/Br)

P

50 Green (RoHS & CU NIPDAU N / A for Pkg Type

no Sb/Br)

D

100 Green (RoHS & CU NIPDAU Level-3-260C-168 HR

no Sb/Br)

OPA2277U/2K5

OPA2277U/2K5G4

OPA2277UA

D

2500 Green (RoHS & CU NIPDAU Level-3-260C-168 HR

no Sb/Br)

D

2500 Green (RoHS & CU NIPDAU Level-3-260C-168 HR

no Sb/Br)

D

100 Green (RoHS & CU NIPDAU Level-3-260C-168 HR

no Sb/Br)

OPA2277UA/2K5

OPA2277UA/2K5E4

D

2500

100

Pb-Free

(RoHS)

CU NIPDAU Level-3-260C-168 HR

D

Pb-Free

(RoHS)

CU NIPDAU Level-3-260C-168 HR

OPA2277UAE4

OPA2277UAG4

ACTIVE

SOIC

D

8

TBD

Call TI

100 Green (RoHS & CU NIPDAU Level-3-260C-168 HR

no Sb/Br)

OPA2277UG4

OPA277AIDRMR

OPA277AIDRMRG4

OPA277AIDRMT

OPA277AIDRMTG4

OPA277P

ACTIVE

SOIC

SON

PDIP

SOIC

D

DRM

P

8

100 Green (RoHS & CU NIPDAU Level-3-260C-168 HR

no Sb/Br)

3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

50 Green (RoHS & CU NIPDAU N / A for Pkg Type

no Sb/Br)

OPA277PA

P

50 Green (RoHS & CU NIPDAU N / A for Pkg Type

no Sb/Br)

OPA277PAG4

OPA277PG4

P

50 Green (RoHS & CU NIPDAU N / A for Pkg Type

no Sb/Br)

P

50 Green (RoHS & CU NIPDAU N / A for Pkg Type

no Sb/Br)

OPA277U

D

100 Green (RoHS & CU NIPDAU Level-3-260C-168 HR

no Sb/Br)

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

28-Jun-2007

Orderable Device

OPA277U/2K5

OPA277U/2K5G4

OPA277UA

Status ⁽¹⁾

ACTIVE

Package Package

Pins Package Eco Plan ⁽²⁾Lead/Ball Finish MSL Peak Temp ⁽³⁾

Qty

Type

Drawing

SOIC

D

8

2500 Green (RoHS & CU NIPDAU Level-3-260C-168 HR

no Sb/Br)

SOIC

PDIP

SOIC

D

N

D

8

2500 Green (RoHS & CU NIPDAU Level-3-260C-168 HR

no Sb/Br)

8

100 Green (RoHS & CU NIPDAU Level-3-260C-168 HR

no Sb/Br)

OPA277UA/2K5

OPA277UA/2K5E4

OPA277UAE4

OPA277UAG4

OPA277UG4

8

2500

Pb-Free

(RoHS)

CU NIPDAU Level-3-260C-168 HR

8

2500

Pb-Free

(RoHS)

CU NIPDAU Level-3-260C-168 HR

8

100 Green (RoHS & CU NIPDAU Level-3-260C-168 HR

no Sb/Br)

8

100 Green (RoHS & CU NIPDAU Level-3-260C-168 HR

no Sb/Br)

8

100 Green (RoHS & CU NIPDAU Level-3-260C-168 HR

no Sb/Br)

OPA4277PA

14

25 Green (RoHS & CU NIPDAU N / A for Pkg Type

no Sb/Br)

OPA4277PAG4

OPA4277UA

25 Green (RoHS & CU NIPDAU N / A for Pkg Type

no Sb/Br)

58 Green (RoHS & CU NIPDAU Level-3-260C-168 HR

no Sb/Br)

OPA4277UA/2K5

OPA4277UA/2K5E4

OPA4277UAE4

OPA4277UAG4

2500

Pb-Free

(RoHS)

CU NIPDAU Level-3-260C-168 HR

2500

Pb-Free

(RoHS)

CU NIPDAU Level-3-260C-168 HR

58 Green (RoHS & CU NIPDAU Level-3-260C-168 HR

no Sb/Br)

58 Green (RoHS & CU NIPDAU Level-3-260C-168 HR

no Sb/Br)

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered

at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and

package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS

compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame

retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is

Addendum-Page 2

PACKAGE OPTION ADDENDUM

www.ti.com

28-Jun-2007

provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the

accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take

reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on

incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited

information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI

to Customer on an annual basis.

Addendum-Page 3

PACKAGE MATERIALS INFORMATION

www.ti.com

2-Jul-2007

TAPE AND REEL INFORMATION

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

2-Jul-2007

Device

Package Pins

Site

Reel

A0 (mm)

B0 (mm)

K0 (mm)

P1

W

Pin1

Diameter Width

(mm) (mm) Quadrant

(mm)

180

330

180

330

(mm)

12

OPA2277AIDRMT

OPA2277UA/2K5

OPA277AIDRMR

OPA277AIDRMT

OPA277UA/2K5

OPA4277UA/2K5

DRM

D

8

MLA

4.3

6.9

4.3

6.9

6.5

4.3

5.4

4.3

5.4

9.5

1.5

2.0

1.5

2.0

2.1

8

12

16

Q2

Q1

Q2

Q1

12

DRM

D

8

12

8

12

8

12

D

14

16

TAPE AND REEL BOX INFORMATION

Device

Package

Pins

Site

Length (mm) Width (mm) Height (mm)

OPA2277AIDRMT

OPA2277UA/2K5

OPA277AIDRMR

OPA277AIDRMT

OPA277UA/2K5

OPA4277UA/2K5

DRM

D

8

MLA

190.0

346.0

190.0

390.0

346.0

212.7

346.0

212.7

348.0

346.0

31.75

29.0

31.75

63.0

33.0

DRM

D

8

D

14

Pack Materials-Page 2

PACKAGE MATERIALS INFORMATION

www.ti.com

2-Jul-2007

Pack Materials-Page 3

MECHANICAL DATA

MPDI001A – JANUARY 1995 – REVISED JUNE 1999

P (R-PDIP-T8)

PLASTIC DUAL-IN-LINE

0.400 (10,60)

0.355 (9,02)

8

5

0.260 (6,60)

0.240 (6,10)

1

4

0.070 (1,78) MAX

0.325 (8,26)

0.300 (7,62)

0.020 (0,51) MIN

0.015 (0,38)

Gage Plane

0.200 (5,08) MAX

Seating Plane

0.010 (0,25) NOM

0.125 (3,18) MIN

0.100 (2,54)

0.021 (0,53)

0.430 (10,92)

MAX

0.010 (0,25)

M

0.015 (0,38)

4040082/D 05/98

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice.

C. Falls within JEDEC MS-001

For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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Customers should obtain the latest relevant information before placing orders and should verify that such information is current and

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TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s

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TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and

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Applications

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Wireless

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Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265


型号：	OPA4277UAG4
厂家：	BURR-BROWN CORPORATION
描述：	High Precision OPERATIONAL AMPLIFIERS 高精密运算放大器运算放大器
文件：	总25页 (文件大小：922K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

OPA4277UAG4 [BB]

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