REF102AP [BB]

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REF102AP
型号: REF102AP
厂家: BURR-BROWN CORPORATION    BURR-BROWN CORPORATION
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®
REF102  
REF102  
REF102  
Precision  
VOLTAGE REFERENCE  
FEATURES  
APPLICATIONS  
+10V ±0.0025V OUTPUT  
PRECISION-CALIBRATED VOLTAGE  
STANDARD  
VERY LOW DRIFT: 2.5ppm/°C max  
D/A AND A/D CONVERTER REFERENCE  
PRECISION CURRENT REFERENCE  
EXCELLENT STABILITY:  
5ppm/1000hr typ  
EXCELLENT LINE REGULATION:  
ACCURATE COMPARATOR THRESHOLD  
1ppm/V max  
REFERENCE  
EXCELLENT LOAD REGULATION:  
DIGITAL VOLTMETERS  
TEST EQUIPMENT  
10ppm/mA max  
LOW NOISE: 5µVp-p typ, 0.1Hz to 10Hz  
WIDE SUPPLY RANGE: 11.4VDC to 36VDC  
LOW QUIESCENT CURRENT: 1.4mA max  
PC-BASED INSTRUMENTATION  
PACKAGE OPTIONS: HERMETIC TO-99,  
PLASTIC DIP, SOIC  
V+  
Trim  
5
2
DESCRIPTION  
The REF102 is a precision 10V voltage reference. The  
drift is laser-trimmed to 2.5ppm/°C max (CM grade)  
over the industrial temperature range and 5ppm/°C  
max (SM grade) over the military temperature range.  
The REF102 achieves its precision without a heater.  
This results in low power, fast warm-up, excellent  
stability, and low noise. The output voltage is ex-  
tremely insensitive to both line and load variations and  
can be externally adjusted with minimal effect on drift  
and stability. Single supply operation from 11.4V to  
36V and excellent overall specifications make the  
REF102 an ideal choice for demanding instrumenta-  
tion and system reference applications.  
R5  
50kΩ  
R2  
R3  
14kΩ  
22kΩ  
8kΩ  
R1  
+
6
A1  
VOUT  
R6  
7kΩ  
R4  
DZ1  
4kΩ  
8
4
Noise Common  
Reduction  
International Airport Industrial Park  
Mailing Address: PO Box 11400, Tucson, AZ 85734  
FAXLine: (800) 548-6133 (US/Canada Only)  
• Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111  
Internet: http://www.burr-brown.com/  
Cable: BBRCORP  
Telex: 066-6491  
FAX: (520) 889-1510  
Immediate Product Info: (800) 548-6132  
©1989 Burr-Brown Corporation  
PDS-900E  
Printed in U.S.A. October, 1993  
SPECIFICATIONS  
ELECTRICAL  
At TA = +25°C and VS = +15V power supply, unless otherwise noted.  
REF102A, R  
REF102B, S  
TYP  
REF102C, M  
TYP  
PARAMETER  
CONDITIONS  
A = 25°C  
MIN  
TYP  
MAX  
MIN  
MAX  
MIN  
MAX  
UNITS  
OUTPUT VOLTAGE  
Initial  
vs Temperature (1)  
vs Supply  
T
9.99  
10.01  
10  
9.995  
10.005  
5
9.9975  
10.0025  
2.5  
V
ppm/°C  
(Line Regulation)  
vs Output Current  
(Load Regulation)  
V
S = 11.4V to 36V  
2
1
1
ppm/V  
I
L = 0mA to +10mA  
L = 0mA to –5mA  
A = 25°  
20  
40  
10  
20  
10  
20  
ppm/mA  
ppm/mA  
I
vs Time  
T
M Package  
5
20  
ppm/1000hr  
ppm/1000hr  
P, U Packages (2)  
Trim Range (3)  
Capacitive Load, max  
±3  
%
pF  
1000  
5
NOISE  
(0.1Hz to 10Hz)  
µVp-p  
OUTPUT CURRENT  
+10, –5  
+11.4  
mA  
INPUT VOLTAGE  
RANGE  
+36  
V
QUIESCENT CURRENT  
WARM-UP TIME (4)  
(IOUT = 0)  
(To 0.1%)  
+1.4  
mA  
µs  
15  
TEMPERATURE  
RANGE  
Specification  
REF102A, B, C  
REF102R, S  
–25  
–55  
+85  
+125  
°C  
°C  
Specifications same as REF102A/R.  
NOTES: (1)Theboxmethodisusedtospecifyoutputvoltagedriftvstemperature. SeetheDiscussionofPerformancesection. (2)Typically5ppm/1000hrsafter168hr  
powered stabilization. (3) Trimming the offset voltage affects drift slightly. See Installation and Operating Instructions for details. (4) With noise reduction pin floating.  
See Typical Performance Curves for details.  
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes  
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change  
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant  
any BURR-BROWN product for use in life support devices and/or systems.  
®
2
REF102  
ORDERING INFORMATION  
TEMPERATURE  
RANGE  
MAX INITIAL  
ERROR (mV)  
MAX DRIFT  
(ppm/°C)  
PRODUCT  
PACKAGE  
REF102AU  
REF102AP  
REF102BP  
REF102AM  
REF102BM  
REF102CM  
REF102RM  
REF102SM  
8-Pin SOIC  
8-Pin Plastic DIP  
8-Pin Plastic DIP  
Metal TO-99  
Metal TO-99  
Metal TO-99  
–25°C to +85°C  
–25°C to +85°C  
–25°C to +85°C  
–25°C to +85°C  
–25°C to +85°C  
–25°C to +85°C  
–55°C to +125°C  
–55°C to +125°C  
±10  
±10  
±5  
±10  
±5  
±2.5  
±10  
±5  
±10  
±10  
±5  
±10  
±5  
±2.5  
±10  
±5  
Metal TO-99  
Metal TO-99  
PIN CONFIGURATIONS  
ABSOLUTE MAXIMUM RATINGS  
Input Voltage ...................................................................................... +40V  
Operating Temperature  
P,U .................................................................................. –25°C to +85°C  
M ................................................................................... –55°C to +125°C  
Storage Temperature Range  
P,U .................................................................................. –40°C to +85°C  
M ................................................................................... –65°C to +150°C  
Lead Temperature (soldering, 10s)................................................ +300°C  
(SOIC, 3s) ....................................................... +260°C  
Top View  
DIP/SOIC  
Noise Reduction  
NC  
V+  
1
2
3
4
8
7
6
5
NC  
NC  
VOUT  
Trim  
Com  
Short-Circuit Protection to Common or V+............................... Continuous  
Top View  
TO-99  
Noise Reduction  
PACKAGE INFORMATION  
8
NC  
NC  
PACKAGE DRAWING  
1
3
7
5
PRODUCT  
PACKAGE  
NUMBER(1)  
2
6
V+  
NC  
VOUT  
Trim  
REF102AU  
REF102AP  
REF102BP  
REF102AM  
REF102BM  
REF102CM  
REF102RM  
REF102SM  
8-Pin SOIC  
8-Pin Plastic DIP  
8-Pin Plastic DIP  
Metal-TO-99  
Metal-TO-99  
Metal-TO-99  
182  
006  
006  
001  
001  
001  
001  
001  
4
Common  
Metal-TO-99  
Metal-TO-99  
ELECTROSTATIC  
DISCHARGE SENSITIVITY  
NOTE: (1) For detailed drawing and dimension table, please see end of data  
sheet, or Appendix C of Burr-Brown IC Data Book.  
This integrated circuit can be damaged by ESD. Burr-Brown  
recommends that all integrated circuits be handled with  
appropriate precautions. Failure to observe proper handling  
and installation procedures can cause damage.  
ESD damage can range from subtle performance degradation  
to complete device failure. Precision integrated circuits may  
be more susceptible to damage because very small parametric  
changes could cause the device not to meet its published  
specifications.  
®
3
REF102  
TYPICAL PERFORMANCE CURVES  
At TA = +25°C, VS = +15V, unless otherwise noted.  
POWER TURN-ON RESPONSE  
POWER TURN-ON RESPONSE with 1µF Cn  
V
V
OUT  
OUT  
VIN  
VIN  
Time (10ms/div)  
Power Turn-On  
Time (5µs/div)  
Power Turn-On  
POWER SUPPLY REJECTION vs FREQUENCY  
130  
LOAD REGULATION  
+1.5  
120  
110  
100  
90  
+1.0  
+0.5  
0
–0.5  
–1.0  
–1.5  
80  
70  
60  
–5  
0
+5  
+10  
1
100  
Frequency (Hz)  
1k  
10k  
Output Current (mA)  
QUIESCENT CURRENT vs TEMPERATURE  
RESPONSE TO THERMAL SHOCK  
+600  
+300  
0
1.6  
1.4  
1.2  
1.0  
0.8  
–300  
REF102CM Immersed in +85°C Fluorinert Bath  
TA = +85°C  
TA  
+25°C  
–600  
=
0
15  
30  
45  
60  
–75  
–50 –25  
0
+25  
+50  
+75 +100 +125  
Temperature (°C)  
Time (s)  
®
4
REF102  
TYPICAL PERFORMANCE CURVES (CONT)  
At TA = +25°C, VS = +15V, unless otherwise noted.  
TYPICAL REF102 REFERENCE NOISE  
20Ω  
2kΩ  
6
4
Oscilloscope  
2
8KΩ  
100µF  
OPA27  
0
+
DUT  
2µF  
–2  
–4  
–6  
15.8kΩ  
Gain = 100V/V  
f–3dB = 0.1Hz and 10Hz  
Noise Test Circuit.  
Low Frequency Noise (1s /div)  
(See Noise Test Circuit)  
®
5
REF102  
THEORY OF OPERATION  
INSTALLATION AND  
Refer to the diagram on the first page of this data sheet. The  
10V output is derived from a compensated buried zener  
diode DZ1, op amp A1, and resistor network R1–R6.  
OPERATING INSTRUCTIONS  
BASIC CIRCUIT CONNECTION  
Figure 2 shows the proper connection of the REF102. To  
achieve the specified performance, pay careful attention to  
layout. A low resistance star configuration will reduce volt-  
age errors, noise pickup, and noise coupled from the power  
supply. Commons should be connected as indicated being  
sure to minimize interconnection resistances.  
Approximately 8.2V is applied to the non-inverting input of  
A1 by DZ1. R1, R2, and R3 are laser-trimmed to produce an  
exact 10V output. The zener bias current is established from  
the regulated output voltage through R4. R5 allows user-  
trimming of the output voltage by providing for small  
external adjustment of the amplifier gain. Because the TCR  
of R5 closely matches the TCR of R1, R2 and R3 , the voltage  
trim has minimal effect on the reference drift. The output  
voltage noise of the REF102 is dominated by the noise of the  
zener diode. A capacitor can be connected between the  
Noise Reduction pin and ground to form a low-pass filter  
with R6 and roll off the high-frequency noise of the zener.  
(1)  
2
(2)  
V+  
6
+
1µF  
Tantalum  
REF102  
RL 1  
RL 2  
RL 3  
DISCUSSION  
4
OF PERFORMANCE  
(1)  
(2)  
The REF102 is designed for applications requiring a preci-  
sion voltage reference where both the initial value at room  
temperature and the drift over temperature are of importance  
to the user. Two basic methods of specifying voltage refer-  
ence drift versus temperature are in common usage in the  
industry—the “butterfly method” and the “box method.”  
The REF102 is specified with the more commonly used  
“box method.” The “box” is formed by the high and low  
specification temperatures and a diagonal, the slope of  
which is equal to the maximum specified drift.  
NOTES: (1) Lead resistances here of up to a few ohms have negligible  
effect on performance. (2) A resistance of 0.1in series with these  
leads will cause a 1mV error when the load current is at its maximum of  
10mA. This results in a 0.01% error of 10V.  
FIGURE 2. REF102 Installation.  
OPTIONAL OUTPUT VOLTAGE ADJUSTMENT  
Optional output voltage adjustment circuits are shown in  
Figures 3 and 4. Trimming the output voltage will change  
the voltage drift by approximately 0.008ppm/°C per mV of  
trimmed voltage. In the circuit in Figure 3, any mismatch in  
TCR between the two sections of the potentiometer will also  
affect drift, but the effect of the TCR is reduced by a factor  
of five by the internal resistor divider. A high quality  
potentiometer, with good mechanical stability, such as a  
cermet, should be used. The circuit in Figure 3 has a  
minimum trim range of ±300mV. The circuit in Figure 4 has  
less range but provides higher resolution. The mismatch in  
TCR between RS and the internal resistors can introduce  
some slight drift. This effect is minimized if RS is kept  
significantly larger than the 50kinternal resistor. A TCR  
of 100ppm/°C is normally sufficient.  
Since the shape of the actual drift curve is not known, the  
vertical position of the box is not exactly known either. It is,  
however, bounded by VUPPER BOUND and VLOWER BOUND (see  
Figure 1). Figure 1 uses the REF102CM as an example. It  
has a drift specification of 2.5ppm/°C maximum and a  
specification temperature range of –25°C to +85°C. The  
“box” height, V1 to V2, is 2.75mV.  
REF102BM VUPPER BOUND  
+10.00275  
V
1
2.75mV  
VNOMINAL  
V+  
Worst-case  
VOUT for  
REF102CM  
+10.0000  
+
1µF  
Tantalum  
2
V
2
VOUT  
6
+9.99725  
REF102BM VLOWER BOUND  
+10V  
REF102  
VTRIM  
5
20kΩ  
–25  
0
+25  
+50  
+85  
Output  
Voltage  
Adjust  
Temperature (°C)  
4
FIGURE 1. REF102CM Output Voltage Drift.  
Minimum range (±300mV) and minimal  
degradation of drift.  
FIGURE 3. REF102 Optional Output Voltage Adjust.  
®
6
REF102  
APPLICATIONS INFORMATION  
V+  
High accuracy, extremely low drift, outstanding stability,  
and low cost make the REF102 an ideal choice for all  
instrumentation and system reference applications. Figures 6  
through 14 show a variety of useful application circuits.  
+
1µF  
Tantalum  
2
VOUT  
6
+10V  
REF102  
VTRIM  
5
RS  
20kΩ  
V+ (1.4V to 26V)  
2
Output  
Voltage  
Adjust  
1MΩ  
4
6
REF102  
1.4mA < (5V –IL ) < 5.4mA  
RS  
Higher resolution, reduced range (typically ±25mV).  
4
FIGURE 4. REF102 Optional Output Voltage Fine Adjust.  
–10V Out  
IL  
RS  
OPTIONAL NOISE REDUCTION  
V+ (1.4V to 26V)  
–15V  
2
The high-frequency noise of the REF102 is dominated by  
the zener diode noise. This noise can be greatly reduced by  
connecting a capacitor between the Noise Reduction pin and  
ground. The capacitor forms a low pass filter with R6 (refer  
to the figure on the first page of the data sheet) and attenu-  
ates the high-frequency noise generated by the zener. Figure  
5 shows the effect of a 1µF noise reduction capacitor on the  
high frequency noise of the REF102. R6 is typically 7kso  
the filter has a –3dB frequency of about 22Hz. The result is  
a reduction in noise from about 800µVp-p to under 200µ  
Vp-p. If further noise reduction is required, use the circuit in  
Figure 14.  
a) Resister Biased –10V Reference  
R1  
2kΩ  
REF102  
10V  
6
C1  
1000pF  
4
–10V Out  
OPA27  
b) Precision –10V Reference.  
See AB-004 for more detail  
FIGURE 6. –10V Reference Using a) Resistor or b) OPA27.  
NO CN  
CN = 1µF  
FIGURE 5. Effect of 1µF Noise Reduction Capacitor on  
Broadband Noise (f–3dB = 1MHz).  
®
7
REF102  
V+  
V+  
V+  
2
220Ω  
OPA27  
+10V  
2N2905  
6
2
2
IL  
+
REF102  
R1 = VCC – 10V  
IL (TYP)  
6
+10V  
IL  
6
REF102  
REF102  
+10V  
4
IL  
4
4
a) –20mA < IL < +20mA  
(OPA27 also improves transient immunity)  
b) –5mA < IL < +100mA  
c) I L (MAX) = I L (TYP) +10mA  
I L (MIN) = I L (TYP) –5mA  
FIGURE 7. +10V Reference With Output Current Boosted to: a) ±20mA, b) +100mA, and c) IL (TYP) +10mA, –5A.  
+15V  
28mA  
357Ω  
1/2W  
2
28.5mA  
6
+5V  
350Strain  
REF102  
Gauge Bridge  
5
4
8
VOUT  
x100  
RG  
INA101  
2
3
+
OPA27  
+
10  
6
–5V  
357Ω  
1/2W  
–15V  
FIGURE 8. Strain Gauge Conditioner for 350Bridge.  
V+  
2
V+  
2
6
REF102  
6
+10V  
REF102  
Out  
2
5
6
–10V  
Out  
R
25kΩ  
25kΩ  
IOUT  
4
OPA111  
4
25kΩ  
25kΩ  
+
LOAD  
3
1
Can be connected  
to ground or –VS .  
INA105  
IOUT = 10V , R 1kΩ  
R
See AB-002 for more details and I Sink Circuit.  
See AB-005 for more details.  
FIGURE 9. ±10V Reference.  
FIGURE 10. Positive Precision Current Source.  
®
8
REF102  
V+  
31.4V to 56V  
2
2
6
+10V  
+30V  
6
REF102  
REF102  
INA105  
2
5
4
4
2
+
6
+5V  
3
+20V  
6
REF102  
1
4
2
REF102  
4
FIGURE 13. +5V and +10V Reference.  
+10V  
6
V+  
2
2kΩ  
6
REF102  
(1)  
VOUT 1  
NOTES: (1) REF102s can be stacked to obtain voltages in multiples of 10V.  
(2) The supply voltage should be between 10n + 1.4 and 10n + 26 where n  
is the number of REF102s. (3) Output current of each REF102 must not  
exceed its rated output current of +10, –5mA. This includes the current  
delivered to the lower REF102.  
R2  
2kΩ  
4
FIGURE 11. Stacked References.  
C2  
V+  
1µF  
OPA27  
2
2
3
V+  
2
2kΩ  
6
+
R1  
1k  
REF102  
(2)  
VOUT 2  
+10V  
VREF  
+5V  
6
C1  
1µF  
Out  
REF102  
2
4
INA105  
4
–5V  
Out  
V+  
2
5
6
+
2kΩ  
6
REF102  
(N)  
V
REF = (VO1 + VO2 ....VOUT  
)
N
VOUT N  
N
eN = 5µVp-p (f = 0.1Hz to 1Mhz)  
N
4
1
3
See AB-003 for more details.  
FIGURE 14. Precision Voltage Reference with Extremely  
Low Noise.  
FIGURE 12. ±5V Reference.  
®
9
REF102  

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