BL9110-100BCBB [BELLING]
1A Low Dropout, Low Quiescent Current High PSRR CMOS Linear Regulator;型号: | BL9110-100BCBB |
厂家: | BELLING |
描述: | 1A Low Dropout, Low Quiescent Current High PSRR CMOS Linear Regulator |
文件: | 总30页 (文件大小:1443K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
BL9110
1A Low Dropout, Low Quiescent Current
High PSRR CMOS Linear Regulator
PCMCIA Cards and Wireless LAN
FEATURES
Electrical appliances such as cameras, VCRS
Up to 1A Output Current
DESCRIPTION
70uA Operating Supply Current
Excellent Line Regulation: 0.05%/V
Low Dropout: 350mV@1A(VOUT=3.3V)
High Power Supply Rejection Ratio
Wide Operating Voltage Range: 2.5V to 6.0V
1V to 5V Factory-Preset Output
The BL9110 is a low-dropout regulator that operates
the input voltage from 2.5V to 6V and delivers 1A
load current. The BL9110 is available in two types,
either fixed or adjustable output voltage. The output
voltage of the fixed types is preset at an internally
trimmed voltage 1V, 1.2V, 1.3V, 1.5V, 1.8V, 2.5V,
2.7V, 2.8V, 2.85V, 3.0V, 3.2V, 3.3V, 5V or can be
made with options of the output range from 1V to 5V
in 50mV increments. The output range of adjustable
types is from 1V to 5V. The BL9110 consists of a
voltage reference, an error amplifier, resistor net for
setting output voltage, a current limit circuit for
over-current and a thermal-shutdown circuit.
High Accuracy: ±1% or ±2%
Built-in Auto Discharge Function
500mA in-rush Current Limit
Fold-back Current Limit Protection
Thermal Shutdown Protection
DFN-6, SOT-89-5, SOT-89-3, SOT-223-5,
SOT-223-3, TO-263-3, TO-220-3, TO-252-3
and TO-252-5 Package
RoHS Compliant and 100% Lead (Pb)-Free
A standby mode with ultra low supply current can be
realized with the chip enable function. Since the
packages for BL9110 are DFN-6, SOT-89-5,
SOT-223-5, SOT-223-3, TO-263-3, TO-220-3,
SOT-89-3, TO-252-3, TO92-3 and TO-252-5 with
high power dissipation, high density mounting of the
IC on board is possible.
APPLICATIONS
Portable Communication Equipment
Battery-Powered Equipment
Laptop, Palmtops, Notebook Computers
Hand-Held Instruments
ORDERING INFORMATION
TYPICAL APPLICATION
Package:
BL9110-VVV X X XX
AA: DFN-6
BA: SOT-89-5-A
CA: TO-252-5
DA: SOT-223-5
EA: TO-252-3-A
FA: SOT-223-3-A
FC: SOT-223-3-C
GA: TO-263-3-A
GC: TO-263-3-C
HA: TO-220-3
IA: SOT-89-3-A
IC: SOT-89-3-C
JA:TO92-3
BB: SOT-89-5-B
VDD
VOUT
VDD
VOUT
EB: TO-252-3-B
FB: SOT-223-3-B
FD: SOT-223-3-D
GB: TO-263-3-B
C1
10uF
C2
2.2uF
Chip
Enable
BL9110
CE
GND
IB: SOT-89-3-B
Features:
P: Standard (default, lead free)
C: Customized
Output Voltage Accuracy
A: ±1%
B: ±2%
Output Voltage
100:1.0V 120:1.2V 130:1.3V 150:1.5V
180:1.8V 250:2.5V 270:2.7V 280:2.8V
285:2.85V 300:3.0V 320:3.2V 330:3.3V
500:5.0V
ADJ: adjustable
PPMIC BU
BL9110 Rev 2.0
04/2016
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BL9110
1A Low Dropout, Low Quiescent Current
High PSRR CMOS Linear Regulator
(Note 1)
Absolute Maximum Rating
Input Supply Voltage (VDD)
-0.3V to +7V
Maximum Junction Temperature
125°C
(Note2)
CE Input Voltage
Output Voltage
Output Current
-0.3V to +7V
-0.3V to VIN+0.3V
1.4A
Operating Temperature Range
Storage Temperature Range
Lead Temperature (Soldering, 10s)
-40°C to 85°C
-65°C to 125°C
300°C
Package Information
DFN-6
TOP VIEW
SOT-89-5
TOP VIEW
SOT-89-5
TOP VIEW
TO-252-5
TOP VIEW
6
5
4
VOUT
VOUT
GND
VDD
VDD
1
2
3
1
2
3
5
4
1
2
3
5
4
NC/ADJ
GND
VOUT
VDD
CE
VOUT
VDD
GND
MARKING
CE
CE
NC/ADJ
3
4
5
1
2
CE
VOUT GND GND
VDD
AA
BA
BB
CA
Part Number
Top Mark
Temp Range
BL9110AA
YWSS VVV (Note3)
BL9110-VVVXXAA
BL9110-VVVXXBA/B
BL9110-VVVXXCA
-40°C to +85°C
BL9110BA/B
-40°C to +85°C
-40°C to +85°C
YWSS VVV
BL9110CA
YWSS VVV
SOT-223-3
TOP VIEW
TO-263-3
TOP VIEW
SOT-223-5
TOP VIEW
MARKING
MARKING
2
MARKING
1
2
3
1
3
FA VOUT
FB GND
FC GND
FD VDD
GND
VOUT
VDD
VDD
VDD
VOUT
VOUT
1
3
4
5
2
GA GND
GB GND
GC VDD
VOUT
VDD
GND
VDD
VOUT
VOUT
GND
VDD
GND ADJ
VOUT
CE
Part Number
BL9110-VVVXXDA
Top Mark
Temp Range
BL9110DA
-40°C to +85°C
PPMIC BU
BL9110 Rev 2.0
04/2016
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BL9110
1A Low Dropout, Low Quiescent Current
High PSRR CMOS Linear Regulator
YWSS VVV
BL9110EA/B
YWSS VVV
BL9110FA/B/C/D
YWSS VVV
BL9110GA/B/C
YWSS VVV
BL9110-VVVXXEA/B
BL9110-VVVXXFA/B/C/D
BL9110-VVVXXGA/B/C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
SOT-89-3
TOP VIEW
TO92
TOPVIEW
DA
MARKING
MARKING
2
3
1
IA GND
IB GND
IC VOUT
VOUT
VDD
GND
VDD
VOUT
VDD
1
2
3
JA
GND
VOUT
VDD
HA
Part Number
Top Mark
Temp Range
BL9110HA
BL9110-VVVXXHA
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
YWSS VVV
BL9110IA/B/C
YWSS VVV
BL9110JA
BL9110-VVVXXI/A/B/C
BL9110-VVVXXJA
YWSS VVV
PPMIC BU
BL9110 Rev 2.0
04/2016
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BL9110
1A Low Dropout, Low Quiescent Current
High PSRR CMOS Linear Regulator
Pin Descriptions
Symbol
VOUT
GND
Description
Output Pin
Ground Pin
CE
VDD
Chip Enable Pin (High active)
Input Pin
ADJ/NC
Adjustable/No Connection
VVV
100
1.0
120
1.2
130
1.3
…
…
285
…
…
495
500
5.0
ADJ
Voltage (V)
2.85
4.95
Adjustable
Y
0
1
2
3
4
…
Year 2010 2011 2012 2013 2014 ……
W
Week
01
A
2
B
…
…
26 27 28
Z
…
…
52
Thermal Resistance (Note 4)
:
Package
DFN-6
ӨJA
ӨJC
95C/W
160C/W
90C/W
160C/W
90C/W
160C/W
65C/W
50C/W
180C/W
10C/W
45C/W
10C/W
20C/W
10C/W
20C/W
7C/W
SOT-89-5
TO-252-5
SOT-223-5
TO-252-3
SOT-223-3
TO-263-3
TO-220-3
SOT89-3
7C/W
50C/W
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired.
Note 2: The BL9110 is guaranteed to meet performance specifications from 0°C to 70°C. Specifications over the –40°C to
85°C operating temperature range are assured by design, characterization and correlation with statistical
process controls.
Note 3: Y: Year of assembly manufacturing
W: Week of assembly manufacturing
SS: Lot ID (the 7th and 8th number of Lot numbers)
VVV: Voltage code (for example 100 stands for 1.0V)
Note 4: Thermal Resistance is specified with approximately 1 square of 1 oz copper.
PPMIC BU
BL9110 Rev 2.0
04/2016
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BL9110
1A Low Dropout, Low Quiescent Current
High PSRR CMOS Linear Regulator
Block Diagram
VDD
Voltage
Reference
-
Voltage
Buffer
EA
ADJ
+
Loop
Compensation
Fold-back
Current Limit
Power Good
Detector
Over
Temperature
Protection
VOUT
Logic
Control
Soft-start
CE
GND
PPMIC BU
BL9110 Rev 2.0
04/2016
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BL9110
1A Low Dropout, Low Quiescent Current
High PSRR CMOS Linear Regulator
Electrical Characteristics (Note 5)
BL9110-1.2V Electrical Characteristics
(VDD=2.5V, VOUT=1.2V, CE=VDD, CIN=2.2F, COUT=2.2F, TA=25°C , unless otherwise noted.)
Parameter
Input Voltage
Output Voltage Accuracy (Note 6)
Symbol
VDD
Conditions
MIN
2.5
-1
-2
1.0
TYP MAX
unit
V
6
+1
IOUT=1mA
%
VOUT
+2
1.3
Current Limit
Short Circuit Current
Quiescent Current
Standby Current
ILIM
ISCC
IQ
A
VOUT=0
IOUT=0mA
VCE=GND, Shutdown
250
70
0.01
mA
uA
uA
120
1
ISTBY
IOUT=300mA
420
715
Dropout Voltage (note 7)
VDROP
mV
IOUT=1A
870 1310
Line Regulation (Note 8)
Load Regulation (Note 9)
ΔVLINE
ΔVLOAD
2.5V≤VDD≤ 6V, IOUT=100mA
1mA≤IOUT≤1A
0.05
20
0.5
%/V
mV
Output Voltage (Note 10)
Temperature Coefficient
IOUT=100mA
-40°C ≤T≤85°C
Shutdown
TCVOUT
±100
ppm/°C
Logic Low
Logic High
VIL
VIH
0.4
V
V
CE
Input Threshold
Start up
1.0
CE Pull-down Resistance
Output Noise Voltage
f=1kHz
RCE
eNO
5
45
MΩ
uVRMS
10Hz to100KHz, IOUT=1mA
70
60
(VOUT≤3.3V)
Power Supply
Rejection Ratio
0.2VP-P Ripple
IOUT=100mA
PSRR
dB
f=1kHz
(VOUT>3.3V)
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
Output Discharge Resistance
TSD
TSDHY
RDSC
Shutdown, Temp increasing
165
30
50
°C
°C
Ω
Note 5: 100% production test at +25°C. Specifications over the temperature range are guaranteed by design and
characterization.
Note 6: This IC includes two kinds of output voltage accuracy versions. A: ±1%, B: ±2%.
Note 7: The required minimum input operating voltage is equal to VOUT+VDROP, and if VOUT+VDROP <2.5V, the required
minimum input operating voltage must be set to 2.5V. VOUT is the normal output voltage, e.g. VOUT=2.8V for 2.8V fixed
output version.
VOUT1 VOUT 2
VDD VOUT
Note 8: Line regulation is calculated by
VLINE
100
Where VOUT1 is the output voltage when VDD1=6.0V, VOUT2 is the output voltage when VDD2= max (VOUT+0.5V, 2.5V).
△VDD=VDD1-VDD2
.
Note 9: Load regulation is calculated by
VLOAD VOUT1 VOUT 2
Where VOUT1 is the output voltage when IOUT1=1mA, and VOUT2 is the output voltage when IOUT2=1A.
VOUT
T VOUT
Note 10: The temperature coefficient is calculated by
TCV
OUT
PPMIC BU
BL9110 Rev 2.0
04/2016
www.belling.com.cn
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Belling Proprietary Information. Unauthorized Photocopy and Duplication Prohibited
© 2011 Belling All Rights Reserved
BL9110
1A Low Dropout, Low Quiescent Current
High PSRR CMOS Linear Regulator
BL9110-1.5V Electrical Characteristics
(VDD=2.5V, VOUT=1.5V, CE=VDD, CIN=2.2F, COUT=2.2F, TA=25°C , unless otherwise noted.)
Parameter
Input Voltage
Output Voltage Accuracy (Note 6)
Symbol
VDD
Conditions
MIN
2.5
-1
-2
1.0
TYP MAX
unit
V
6
+1
IOUT=1mA
%
VOUT
+2
1.3
Current Limit
Short Circuit Current
Quiescent Current
Standby Current
ILIM
ISCC
IQ
A
VOUT=0
IOUT=0mA
VCE=GND, Shutdown
250
70
0.01
mA
uA
uA
120
1
ISTBY
IOUT=300mA
260
445
Dropout Voltage (note 7)
VDROP
mV
IOUT=1A
700 1050
Line Regulation (Note 8)
Load Regulation (Note 9)
ΔVLINE
ΔVLOAD
2.5V≤VDD≤ 6V, IOUT=100mA
1mA≤IOUT≤1A
0.05
20
0.5
%/V
mV
Output Voltage (Note 10)
Temperature Coefficient
IOUT=100mA
-40°C ≤T≤85°C
Shutdown
TCVOUT
±100
ppm/°C
Logic Low
Logic High
VIL
VIH
0.4
V
V
CE
Input Threshold
Start up
1.0
CE Pull-down Resistance
Output Noise Voltage
f=1kHz
RCE
eNO
5
45
MΩ
uVRMS
10Hz to100KHz, IOUT=1mA
70
60
(VOUT≤3.3V)
Power Supply
Rejection Ratio
0.2VP-P Ripple
IOUT=100mA
PSRR
dB
f=1kHz
(VOUT>3.3V)
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
Output Discharge Resistance
TSD
TSDHY
RDSC
Shutdown, Temp increasing
165
30
50
°C
°C
Ω
Note 5: 100% production test at +25°C. Specifications over the temperature range are guaranteed by design and
characterization.
Note 6: This IC includes two kinds of output voltage accuracy versions. A: ±1%, B: ±2%.
Note 7: The required minimum input operating voltage is equal to VOUT+VDROP, and if VOUT+VDROP <2.5V, the required
minimum input operating voltage must be set to 2.5V. VOUT is the normal output voltage, e.g. VOUT=2.8V for 2.8V fixed
output version.
VOUT1 VOUT 2
VDD VOUT
Note 8: Line regulation is calculated by
VLINE
100
Where VOUT1 is the output voltage when VDD1=6.0V, VOUT2 is the output voltage when VDD2= max (VOUT+0.5V, 2.5V).
△VDD=VDD1-VDD2
.
Note 9: Load regulation is calculated by
VLOAD VOUT1 VOUT 2
Where VOUT1 is the output voltage when IOUT1=1mA, and VOUT2 is the output voltage when IOUT2=1.0A.
VOUT
T VOUT
Note 10: The temperature coefficient is calculated by
TCV
OUT
PPMIC BU
BL9110 Rev 2.0
04/2016
www.belling.com.cn
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Belling Proprietary Information. Unauthorized Photocopy and Duplication Prohibited
© 2011 Belling All Rights Reserved
BL9110
1A Low Dropout, Low Quiescent Current
High PSRR CMOS Linear Regulator
BL9110-1.8V Electrical Characteristics
(VDD=2.8V, VOUT=1.8V, CE=VDD, CIN=2.2F, COUT=2.2F, TA=25°C , unless otherwise noted.)
Parameter
Input Voltage
Output Voltage Accuracy (Note 6)
Symbol
VDD
Conditions
MIN
2.5
-1
-2
1.0
TYP MAX
unit
V
6
+1
IOUT=1mA
%
VOUT
+2
1.3
Current Limit
Short Circuit Current
Quiescent Current
Standby Current
ILIM
ISCC
IQ
A
VOUT=0
IOUT=0mA
VCE=GND, Shutdown
250
70
0.01
mA
uA
uA
120
1
ISTBY
IOUT=300mA
180
308
855
0.5
Dropout Voltage (note 7)
VDROP
mV
IOUT=1A
570
0.05
20
Line Regulation (Note 8)
Load Regulation (Note 9)
ΔVLINE
ΔVLOAD
2.5V≤VDD≤ 6V, IOUT=100mA
1mA≤IOUT≤1A
%/V
mV
Output Voltage (Note 10)
Temperature Coefficient
IOUT=100mA
-40°C ≤T≤85°C
Shutdown
TCVOUT
±100
ppm/°C
Logic Low
Logic High
VIL
VIH
0.4
V
V
CE
Input Threshold
Start up
1.0
CE Pull-down Resistance
Output Noise Voltage
f=1kHz
RCE
eNO
5
45
MΩ
uVRMS
10Hz to100KHz, IOUT=1mA
70
60
(VOUT≤3.3V)
Power Supply
Rejection Ratio
0.2VP-P Ripple
IOUT=100mA
PSRR
dB
f=1kHz
(VOUT>3.3V)
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
Output Discharge Resistance
TSD
TSDHY
RDSC
Shutdown, Temp increasing
165
30
50
°C
°C
Ω
Note 5: 100% production test at +25°C. Specifications over the temperature range are guaranteed by design and
characterization.
Note 6: This IC includes two kinds of output voltage accuracy versions. A: ±1%, B: ±2%.
Note 7: The required minimum input operating voltage is equal to VOUT+VDROP, and if VOUT+VDROP <2.5V, the required
minimum input operating voltage must be set to 2.5V. VOUT is the normal output voltage, e.g. VOUT=2.8V for 2.8V fixed
output version.
VOUT1 VOUT 2
VDD VOUT
Note 8: Line regulation is calculated by
VLINE
100
Where VOUT1 is the output voltage when VDD1=6.0V, VOUT2 is the output voltage when VDD2= max (VOUT+0.5V, 2.5V).
△VDD=VDD1-VDD2
.
Note 9: Load regulation is calculated by
VLOAD VOUT1 VOUT 2
Where VOUT1 is the output voltage when IOUT1=1mA, and VOUT2 is the output voltage when IOUT2=1.0A.
VOUT
T VOUT
Note 10: The temperature coefficient is calculated by
TCV
OUT
PPMIC BU
BL9110 Rev 2.0
04/2016
www.belling.com.cn
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Belling Proprietary Information. Unauthorized Photocopy and Duplication Prohibited
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BL9110
1A Low Dropout, Low Quiescent Current
High PSRR CMOS Linear Regulator
BL9110-2.5V Electrical Characteristics
(VDD=3.5V, VOUT=2.5V, CE=VDD, CIN=2.2F, COUT=2.2F, TA=25°C , unless otherwise noted.)
Parameter
Input Voltage
Output Voltage Accuracy (Note 6)
Symbol
VDD
Conditions
MIN
2.5
-1
-2
1.0
TYP MAX
unit
V
6
+1
IOUT=1mA
%
VOUT
+2
1.3
Current Limit
Short Circuit Current
Quiescent Current
Standby Current
ILIM
ISCC
IQ
A
VOUT=0
IOUT=0mA
VCE=GND, Shutdown
250
70
0.01
mA
uA
uA
120
1
ISTBY
IOUT=300mA
140
240
660
0.5
Dropout Voltage (note 7)
VDROP
mV
IOUT=1A
440
0.05
20
Line Regulation (Note 8)
Load Regulation (Note 9)
ΔVLINE
ΔVLOAD
3.0V≤VDD≤ 6V, IOUT=100mA
1mA≤IOUT≤1A
%/V
mV
Output Voltage (Note 10)
Temperature Coefficient
IOUT=100mA
-40°C ≤T≤85°C
Shutdown
TCVOUT
±100
ppm/°C
Logic Low
Logic High
VIL
VIH
0.4
V
V
CE
Input Threshold
Start up
1.0
CE Pull-down Resistance
Output Noise Voltage
f=1kHz
RCE
eNO
5
45
MΩ
uVRMS
10Hz to100KHz, IOUT=1mA
70
60
(VOUT≤3.3V)
Power Supply
Rejection Ratio
0.2VP-P Ripple
IOUT=100mA
PSRR
dB
f=1kHz
(VOUT>3.3V)
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
Output Discharge Resistance
TSD
TSDHY
RDSC
Shutdown, Temp increasing
165
30
50
°C
°C
Ω
Note 5: 100% production test at +25°C. Specifications over the temperature range are guaranteed by design and
characterization.
Note 6: This IC includes two kinds of output voltage accuracy versions. A: ±1%, B: ±2%.
Note 7: The required minimum input operating voltage is equal to VOUT+VDROP, and if VOUT+VDROP <2.5V, the required
minimum input operating voltage must be set to 2.5V. VOUT is the normal output voltage, e.g. VOUT=2.8V for 2.8V fixed
output version.
VOUT1 VOUT 2
VDD VOUT
Note 8: Line regulation is calculated by
VLINE
100
Where VOUT1 is the output voltage when VDD1=6.0V, VOUT2 is the output voltage when VDD2= max (VOUT+0.5V, 2.5V).
△VDD=VDD1-VDD2
.
Note 9: Load regulation is calculated by
VLOAD VOUT1 VOUT 2
Where VOUT1 is the output voltage when IOUT1=1mA, and VOUT2 is the output voltage when IOUT2=1.0A.
VOUT
T VOUT
Note 10: The temperature coefficient is calculated by
TCV
OUT
PPMIC BU
BL9110 Rev 2.0
04/2016
www.belling.com.cn
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Belling Proprietary Information. Unauthorized Photocopy and Duplication Prohibited
© 2011 Belling All Rights Reserved
BL9110
1A Low Dropout, Low Quiescent Current
High PSRR CMOS Linear Regulator
BL9110-3.3V Electrical Characteristics
(VDD=4.3V, VOUT=3.3V, CE=VDD, CIN=2.2F, COUT=2.2F, TA=25°C , unless otherwise noted.)
Parameter
Input Voltage
Output Voltage Accuracy (Note 6)
Symbol
VDD
Conditions
MIN
2.5
-1
-2
1.0
TYP MAX
unit
V
6
+1
IOUT=1mA
%
VOUT
+2
1.3
Current Limit
Short Circuit Current
Quiescent Current
Standby Current
ILIM
ISCC
IQ
A
VOUT=0
IOUT=0mA
VCE=GND, Shutdown
250
70
0.01
mA
uA
uA
120
1
ISTBY
IOUT=300mA
110
188
525
0.5
Dropout Voltage (note 7)
VDROP
mV
IOUT=1A
350
0.05
20
Line Regulation (Note 8)
Load Regulation (Note 9)
ΔVLINE
ΔVLOAD
3.8V≤VDD≤ 6V, IOUT=100mA
1mA≤IOUT≤1A
%/V
mV
Output Voltage (Note 10)
Temperature Coefficient
IOUT=100mA
-40°C ≤T≤85°C
Shutdown
TCVOUT
±100
ppm/°C
Logic Low
Logic High
VIL
VIH
0.4
V
V
CE
Input Threshold
Start up
1.0
CE Pull-down Resistance
Output Noise Voltage
f=1kHz
RCE
eNO
5
45
MΩ
uVRMS
10Hz to100KHz, IOUT=1mA
70
60
(VOUT≤3.3V)
Power Supply
Rejection Ratio
0.2VP-P Ripple
IOUT=100mA
PSRR
dB
f=1kHz
(VOUT>3.3V)
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
Output Discharge Resistance
TSD
TSDHY
RDSC
Shutdown, Temp increasing
165
30
50
°C
°C
Ω
Note 5: 100% production test at +25°C. Specifications over the temperature range are guaranteed by design and
characterization.
Note 6: This IC includes two kinds of output voltage accuracy versions. A: ±1%, B: ±2%.
Note 7: The required minimum input operating voltage is equal to VOUT+VDROP, and if VOUT+VDROP <2.5V, the required
minimum input operating voltage must be set to 2.5V. VOUT is the normal output voltage, e.g. VOUT=2.8V for 2.8V fixed
output version.
VOUT1 VOUT 2
VDD VOUT
Note 8: Line regulation is calculated by
VLINE
100
Where VOUT1 is the output voltage when VDD1=6.0V, VOUT2 is the output voltage when VDD2= max (VOUT+0.5V, 2.5V).
△VDD=VDD1-VDD2
.
Note 9: Load regulation is calculated by
VLOAD VOUT1 VOUT 2
Where VOUT1 is the output voltage when IOUT1=1mA, and VOUT2 is the output voltage when IOUT2=1.0A.
VOUT
T VOUT
Note 10: The temperature coefficient is calculated by
.
TCV
OUT
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BL9110
1A Low Dropout, Low Quiescent Current
High PSRR CMOS Linear Regulator
BL9110-5.0V Electrical Characteristics
(VDD=6.0V, VOUT=5.0V, CE=VDD, CIN=2.2F, COUT=2.2F, TA=25°C , unless otherwise noted.)
Parameter
Input Voltage
Output Voltage Accuracy (Note 6)
Symbol
VDD
Conditions
MIN
2.5
-1
-2
1.0
TYP MAX
unit
V
6
+1
IOUT=1mA
%
VOUT
+2
1.3
Current Limit
Short Circuit Current
Quiescent Current
Standby Current
ILIM
ISCC
IQ
A
VOUT=0
IOUT=0mA
VCE=GND, Shutdown
250
70
0.01
mA
uA
uA
120
1
ISTBY
IOUT=300mA
100
170
510
0.5
Dropout Voltage (note 7)
VDROP
mV
IOUT=1A
340
0.05
20
Line Regulation (Note 8)
Load Regulation (Note 9)
ΔVLINE
ΔVLOAD
5.5V≤VDD≤ 6V, IOUT=100mA
1mA≤IOUT≤1A
%/V
mV
Output Voltage (Note 10)
Temperature Coefficient
IOUT=100mA
-40°C ≤T≤85°C
Shutdown
TCVOUT
±100
ppm/°C
Logic Low
Logic High
VIL
VIH
0.4
V
V
CE
Input Threshold
Start up
1.0
CE Pull-down Resistance
Output Noise Voltage
f=1kHz
RCE
eNO
5
45
MΩ
uVRMS
10Hz to100KHz, IOUT=1mA
70
60
(VOUT≤3.3V)
Power Supply
Rejection Ratio
0.2VP-P Ripple
IOUT=100mA
PSRR
dB
f=1kHz
(VOUT>3.3V)
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
Output Discharge Resistance
TSD
TSDHY
RDSC
Shutdown, Temp increasing
165
30
50
°C
°C
Ω
Note 5: 100% production test at +25°C. Specifications over the temperature range are guaranteed by design and
characterization.
Note 6: This IC includes two kinds of output voltage accuracy versions. A: ±1%, B: ±2%.
Note 7: The required minimum input operating voltage is equal to VOUT+VDROP, and if VOUT+VDROP <2.5V, the required
minimum input operating voltage must be set to 2.5V. VOUT is the normal output voltage, e.g. VOUT=2.8V for 2.8V fixed
output version.
VOUT1 VOUT 2
VDD VOUT
Note 8: Line regulation is calculated by
VLINE
100
Where VOUT1 is the output voltage when VDD1=6.0V, VOUT2 is the output voltage when VDD2= max (VOUT+0.5V, 2.5V).
△VDD=VDD1-VDD2
.
Note 9: Load regulation is calculated by
VLOAD VOUT1 VOUT 2
Where VOUT1 is the output voltage when IOUT1=1mA, and VOUT2 is the output voltage when IOUT2=1.0A.
VOUT
T VOUT
Note 10: The temperature coefficient is calculated by
.
TCV
OUT
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BL9110
1A Low Dropout, Low Quiescent Current
High PSRR CMOS Linear Regulator
Typical Performance Characteristic
(VDD=VOUT+1V, and if VOUT<1.5V, VDD=2.5V CE=VDD, CIN=2.2F, COUT=2.2F, TA=25°C, unless
otherwise noted.)
Output Voltage VS. Input Voltage
Dropout Voltage VS. Output Current
BL9110-1.0V
BL9110-3.3V
1.2
1.0
0.8
0.6
0.4
0.2
0.0
1.2
1.0
0.8
0.6
0.4
0.2
0.0
550
500
450
400
350
300
250
200
150
100
50
-40oC
25oC
85oC
IOUT=1mA
IOUT=99mA
IOUT=300mA
IOUT=1A
0
1
2
3
4
5
6
0
0.0
0.2
0.4
0.6
0.8
1.0
Input Voltage (V)
Output Current (A)
Output Voltage VS. Input Voltage
Output Voltage VS. Temperature
BL9110-3.3V
BL9110-3.3V
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
3.40
3.35
3.30
3.25
3.20
IOUT=1mA
IOUT=100mA
IOUT=1mA
IOUT=99mA
IOUT=300mA
0.0 0.5
1.0
1.5 2.0
2.5
3.0 3.5
4.0 4.5 5.0
5.5 6.0
-40
-20
0
20
40
60
80
Input Voltage (V)
Temperature (oC)
Quiescent Current VS. Input Voltage
Quiescent Current VS. Temperature
BL9110-3.3V
BL9110-3.3V
100
95
90
85
80
75
70
65
60
80
60
40
20
0
-40 -30 -20 -10
0
10
20
30
40
50
60
70
80
3.5
4.0
4.5
5.0
5.5
6.0
Temperature (oC)
Input Voltage (V)
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BL9110
1A Low Dropout, Low Quiescent Current
High PSRR CMOS Linear Regulator
Turn on Transient Response
BL9110-3.3V
Output Voltage VS. Output Current
BL9110-3.3V
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
CH1: EN Pin Voltage (V)
CH4: Output Voltage (V)
CH2: Input Inrush Current (mA)
0.0
0.2
0.4
0.6
0.8
1.0
1.2
Output Current (A)
Turn off Transient Response
Turn off Transient Response
BL9110-3.3V
BL9110-3.3V
100mA, resistive load
No load
CH1: EN Pin Voltage (V)
CH4: Output Voltage (V)
CH1: EN Pin Voltage (V)
CH4: Output Voltage (V)
Load Transient Response
Load Transient Response
BL9110-3.3V
BL9110-3.3V
500mA
100mA
50mA
CH2: Output Current (mA)
CH2: Output Current (mA)
100mA
CH4: Output Voltage (mV)
CH4: Output Voltage (mV)
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BL9110
1A Low Dropout, Low Quiescent Current
High PSRR CMOS Linear Regulator
Line Transient Response
Line Transient Response
BL9110-3.3V
BL9110-3.3V
IOUT=1mA
IOUT=100mA
CH2: Input Voltage (V)
CH2: Input Voltage (V)
CH4: Output Voltage (mV)
CH4: Output Voltage (mV)
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BL9110
1A Low Dropout, Low Quiescent Current
High PSRR CMOS Linear Regulator
Applications Information
The BL9110 is a low dropout CMOS-based
positive voltage regulator that operates the
input voltage from +2.5V to 6.0V. Output
voltages are optional ranging from 1.0V to
5.0V, and can supply current up to 1.0 A.
is to choose R2=20kΩ to set the divider
current at 50uA, and then calculate R1
using Equation as below:
VOUT
R1
1 R2
VREF
Enable Function
A small compensation capacitor C3 placed
between VOUT and ADJ may improve the
stability of the adjustable. The suggested
value of this capacitor is about 10pF to
22pF.
The BL9110 is shutdown by pulling the CE
input low, and turn on by driving the input
high. If this feature is not be used, the CE
input should be floating or tied to VDD to
keep the regulator on at all times.
OUTPUT VOLTAGE
PROGRAMMING GUIDE
OUTPUT
R1
R2
Programming the BL9110 Adjustable
LDO regulator
VOLTAGTE
1.8V
16 kΩ
30 kΩ
51 kΩ
62 kΩ
20 kΩ
20 kΩ
22 kΩ
24 kΩ
2.5V
The BL9110 is available in two types, either
fixed or adjustable output voltage. The
output range of the adjustable types is from
1V to 5V. The output voltage of the BL9110
adjustable regulator is programmed using
an external resistor divider as show in
Figure as below. The output voltage is
calculated using equation as below:
3.3V
3.6V
BL9110 Adjustable LDO regulator
Programming
VOUT
VDD
VDD
VOUT
C1
10uF
C2
2.2uF
R1
R2
C3
GND
BL9110
ADJ
CE
R1
V
OUT VREF 1
R2
Thermal Protection
Where VREF=1V is the internal reference
voltage.
Thermal overload protection limits total
power dissipation in the BL9110. When the
junction temperature exceeds TJ=165°C ,
the OTP circuit starts the thermal shutdown
function and turns the pass element off
allowing the IC to cool. The OTP circuit
turns on the pass element again after IC’s
junction temperature cool by 30°C , result in
a pulsed output during continuous thermal
Resistors R1 and R2 should be chosen for
approximately 50uA divider current. Lower
value resistors can be used for improved
noise performance, but the solution
consumes more power. Higher resistor
values should be avoided as leakage
current at ADJ increases the output voltage
error. The recommended design procedure
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BL9110
1A Low Dropout, Low Quiescent Current
High PSRR CMOS Linear Regulator
overload conditions. Thermal-overloaded
protection is designed to protect the
BL9110 in the event of fault conditions. Do
not exceed the absolute maximum junction
temperature rating of TJ=125°C for
capacitors used with the BL9110 must be
carefully selected for regulator stability and
performance. The BL9110 requires an
output capacitor between the VOUT and
GND pins for phase compensation. Using a
capacitor whose value is ≥1μF on the
BL9110 input and the amount of
capacitance can be increased without limit.
The input capacitor must be located a
distance of not more than 0.5 inch from the
input pin of the IC and returned to a clean
analog ground. Any good quality ceramic or
tantalum can be used for this capacitor.
The capacitor with larger value and lower
continuous
operation.
The
build-in
fold-back current limit protection circuit will
reduce current value as output voltage
drops. When output is shorted to ground,
current limit is reduced to 250mA, avoiding
damaging the device.
Operating Region and Power
Dissipation
ESR
(equivalent
series
resistance)
The maximum power dissipation of BL9110
depends on the thermal resistance of the
case and circuit board, the temperature
difference between the die junction and
ambient air, and the rate of airflow. The
power dissipation across the device is
provides better PSRR and line-transient
response. The output capacitor must meet
both requirements for minimum amount of
capacitance and ESR in all LDO
applications. The BL9110 is designed
specifically to work with low ESR ceramic
output capacitor in space-saving and
performance consideration. In the BL9110,
phase compensation is made with the
output capacitor for securing stable
operation even if the load current is varied.
For this purpose, use a 2.2uF capacitor
between VOUT pin and GND pin as close
as possible.
PD = (VDD−VOUT) ×IOUT + VDD×I Q
The maximum power dissipation is:
PD (MAX) = (TJ (MAX) − TA) /θJA
Where TJ (MAX) is the maximum operation
junction temperature 125°C, TA is the
ambient temperature and the θJA is the
junction to ambient thermal resistance. The
GND pin of the BL9110 performs the dual
function of providing an electrical
connection to ground and channeling heat
away. Connect the GND pin to ground
Load-Transient Considerations
The BL9110 load-transient response
graphs show two components of the output
response: a DC shift from the output
impedance due to the load current change,
and the transient response. The DC shift is
quite small due to the excellent load
regulation of the IC. Typical output voltage
transient spike for a step change in the load
current from 0mA to 50mA is tens of mV,
using a large pad or ground plane.
Capacitor Selection and Regulator
Stability
Like any low-dropout regulator, the external
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BL9110
1A Low Dropout, Low Quiescent Current
High PSRR CMOS Linear Regulator
depending on the ESR of the output
capacitor. Increasing the output capacitor's
value and decreasing the ESR attenuates
the overshoot.
Layout Considerations
To improve AC performance such as PSRR,
output noise, and transient response, it is
recommended that the PCB be designed
with separate ground planes for VDD and
VOUT, with each ground plane connected
only at the GND pin of the device. Make
VDD and GND lines sufficiently wide. If
their impedance is high, noise pickup or
unstable operation may result. Connect a
capacitor C1 between VDD and GND pin,
as close as possible to the pins. Set
external components, especially the output
Input-Output (Dropout) Voltage
A regulator's minimum input-output voltage
differential (or dropout voltage) determines
the lowest usable supply voltage. In
battery-powered
systems,
this
will
determine the useful end-of-life battery
voltage. Because the BL9110 uses a
P-Channel MOSFET pass transistor, the
dropout voltage is
a
function of
capacitor C2, as close as possible to the IC,
and make wiring as short as possible.
drain-to-source on resistance [RDS(ON)
multiplied by the load current.
]
BL9110 SOT89-5 PCB Layout for Reference
Top Layer
Bottom Layer
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BL9110
1A Low Dropout, Low Quiescent Current
High PSRR CMOS Linear Regulator
Package Description
DFN-6
Dimensions In Millimeters
Symbol
Min
NOM
0.75
0.02
0.3
Max
0.8
0.7
A
A1
b
c
D
0.05
0.35
0.25
2.05
1.45
0.25
0.18
1.95
1
0.2
2
D2
e
Nd
E
E2
L
0.65BSC
1.30BSC
2
1.95
0.50
0.25
0.1
2.05
0.85
0.40
0.2
0.30
0.15
h
DFN-6 Surface Mount Package
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BL9110
1A Low Dropout, Low Quiescent Current
High PSRR CMOS Linear Regulator
SOT89-5
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
1.397
0.356
0.406
2.388
3.937
0.787
4.394
1.397
1.600
0.508
0.533
2.591
4.242
1.194
4.597
1.702
0.055
0.014
0.016
0.094
0.155
0.031
0.173
0.055
0.063
0.020
0.021
0.102
0.167
0.047
0.181
0.067
A
b
b1
B
C
C1
D
D1
e
1.500 TYP.
0.060 TYP.
0.356
0.432
0.014
0.017
H
SOT89-5 Surface Mount Package
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BL9110
1A Low Dropout, Low Quiescent Current
High PSRR CMOS Linear Regulator
SOT-223-3
Devices per reel 2500
Package
SOT-223
Unit
mm
Package specification:
MIN NOM MAX
.
A
1.50 1.65 1.80
A1 0.02 0.06 0.10
A2 1.45 1.60 1.75
A3 0.80 0.90 1.00
b
0.67
0.66 0.71 0.75
2.96 3.09
2.95 3.00 3.05
0.30 0.35
0.29 0.30 0.31
6.35 7.05
-
0.80
b1
b2
b3
c
c1
D
-
-
-
D1 6.30 6.50 6.70
6.80 7.00 7.20
E1 3.40 3.50 3.60
E
e
e1
L
L1
L2
θ
2.30BSC
4.60BSC
0.80 1.00 1.20
1.75REF
0.25BSC
0°
-
8°
θ 1 10° 12° 14°
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BL9110
1A Low Dropout, Low Quiescent Current
High PSRR CMOS Linear Regulator
Taping dimension:
Taping reel dimension:
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BL9110
1A Low Dropout, Low Quiescent Current
High PSRR CMOS Linear Regulator
SOT-223-5
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BL9110
1A Low Dropout, Low Quiescent Current
High PSRR CMOS Linear Regulator
TO-252-3
Package
TO252-3
Devices per reel
2500
Taping dimension:
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BL9110
1A Low Dropout, Low Quiescent Current
High PSRR CMOS Linear Regulator
TO-252-5
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BL9110
1A Low Dropout, Low Quiescent Current
High PSRR CMOS Linear Regulator
Dimensions In Millimeters
Symbol
MIN
0.05
2.1
NOM
0.15
2.3
MAX
0.25
2.5
A1
A2
A3
b
b1
c
0.5
0.6
0.7
0.6
0.46
0.45
0.49
0.48
6.3
0.55
0.56
0.52
6.7
0.5
c1
D
0.5
6.5
D1
E1
e
5.30 REF
5.50
1.27BSC
1.50
3.1
1.40BSC
5.30
5.70
L
1.40
3.0
1.60
3.2
L1
L2
Θ
0
8°
TO-263-3
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BL9110
1A Low Dropout, Low Quiescent Current
High PSRR CMOS Linear Regulator
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BL9110
1A Low Dropout, Low Quiescent Current
High PSRR CMOS Linear Regulator
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BL9110
1A Low Dropout, Low Quiescent Current
High PSRR CMOS Linear Regulator
TO-220-3
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BL9110
1A Low Dropout, Low Quiescent Current
High PSRR CMOS Linear Regulator
SOT-89-3
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BL9110
1A Low Dropout, Low Quiescent Current
High PSRR CMOS Linear Regulator
TO92-3
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SI9137LG
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SI9122E
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