BL9180-BBPRB [BELLING]

Dual,300mA Ultra-low Noise CMOS LDO Regulator;


型号：	BL9180-BBPRB
厂家：	BELLING
描述：	Dual,300mA Ultra-low Noise CMOS LDO Regulator
文件：	总13页 (文件大小：905K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

BL9180

Dual,300mA Ultra-low Noise

CMOS LDO Regulator

FEATURES

DESCRIPTION



Up to 300mA Output Current(Each LDO)

The BL9180 dual, low noise, low-dropout regulator

supplying up to 300mA output current at each

channel. The output voltage for each regulator is set

independently by trimming. Voltages are selectable

in 50mV steps within a range of 1.2V to 3.3V by

operating from a 2V to 6V input. The BL9180

includes two independent logic-controlled shutdown

inputs and allows the output of each regulator to be

turned off independently. When both outputs

shutdown simultaneously, the chip will be turn off

and consumes nearly zero operation current which

is suitable for battery-power devices.

Dual Shutdown Pins Control Each Output

90uA Operating supply current per LDO

Excellent Line regulation:0.05%/V

Low Dropout:220mV@300mA

High Power Supply Rejection Ratio

Wide Operating Voltage Range:2.0V to 6.0V

1.2V to 3.3V Factory-Preset Output

High Accuracy: ±1% or ±2%

Internal Pulled down(8 MΩ)resistor

Current Limiting and Thermal Protection

Two LDOs in SOT-23-6 and ESOP-8 Package

RoHS Compliant and 100% Lead(Pb)-Free

The BL9180 includes high accuracy voltage

reference, error amplifier, current limit circuit and

output driver module.

APPLICATIONS



Cellular and Smart Phones

The BL9180 has excellent load and line transient

response and good temperature characteristics,

which can assure the stability of chip and power

system. And it uses trimming technique to

guarantee output voltage accuracy within ±1% or

±2%. The BL9180 is available in SOT-23-6 and

ESOP-8 package which is Lead(Pb)-free.

Battery-Powered Equipment

Laptop, Palmtops, Notebook Computers

Hand-Held Instruments

PCMCIA Cards and Wireless LAN

MP3/MP4/MP5 Players

Portable Information Appliances

ORDERING INFORMATION

TYPICAL APPLICATION

BL9180 XXX RB

BL9180 X X X XX

Package:

RA:SOT-23-6A

RB:SOT-23-6B

EP:ESOP-8

Features:

P:Standard(default, lead free)

C:Customized

Output Voltage Accuracy

A:±1%

B:±2%

Output Voltage

VOUT1

VOUT2

EN1 VOUT1

1uF

VIN

VDD

GND

EN2 VOUT2

BL9180

1uF

A: 1.3V(Output1),2.8V(Output2)

B: 1.5V(Output1),3.0V(Output2)

C: 1.8V(Output1),2.5V(Output2)

D: 1.8V(Output1),2.8V(Output2)

E: 2.5V(Output1),1.8V(Output2)

F: 2.8V(Output1),1.8V(Output2)

G: 2.8V(Output1),3.0V(Output2)

H: 2.8V(Output1),3.3V(Output2)

I: 3.0V(Output1),1.5V(Output2)

J: 3.3V(Output1),2.8V(Output2)

K: 3.3V(Output1),3.3V(Output2)

L:2.8V(Output1),1.2V(Output2)

M:1.8V(Output1),3.3V(Output2)

N:1.5V(Output1),3.3V(Output2)

O: 1.2V(Output1),3.3V(Output2)

1uF

Application hints:

Output capacitor (C_OUT≥2.2uF) is recommended

in BL9180 applications to assure the circuit’s

stability for output voltage ≤ 1.8V.

P: 1.2V(Output1),1.8V(Output2)

PPMIC BU

BL9180 Rev 2.2

8/2013

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BL9180

Dual,300mA Ultra-low Noise

CMOS LDO Regulator

(Note 1)

Absolute Maximum Rating

Input Supply Voltage (V_IN)

-0.3V to +7V

Maximum Junction Temperature

Operating Temperature Range

Storage Temperature Range

125°C

(Note2)

EN Input Voltage

Output Voltage

Output Current

-0.3V to +V_IN

-0.3V to V_IN+0.3V

400mA

-40°C to 85°C

-65°C to 125°C

300°C

Lead Temperature (Soldering, 10s)

Package Information

SOT-23-6A

TOP VIEW

SOT-23-6B

TOP VIEW

ESOP-8

TOP VIEW

VOUT1

VIN1

EN1

GND

EN2

VOUT1

VDD

EN1

GND

EN2

EN1

VDD

EN2

VOUT1

GND

VOUT2

VIN2

VOUT2

Part Number

Top Mark

Temp Range

(Note3)

BL9180-XXXRA

BL9180-XXXRB

-40°C to +85°C

EVYW

BL9180

VYWEP

BL9180-XXXEP

-40°C to +85°C

(Note3)

Thermal Resistance ^{(Note 4)}

Pin Description

Package

SOT23-6

ESOP-8

Ө_JA

250C/W

50C/W

Ө_JC

130°C/W

10C/W

Name

Function

VOUT1

VDD

LDO1 Output Pin

Input Pin

VOUT2

EN2

LDO2 Output Pin

LDO2 Enable Pin

Ground Pin

GND

EN1

LDO1 Enable Pin1

Input Pin1

VIN1

VIN2

Input Pin2

Year

2009

2010

2011

2012

2013

Week

…

Product Classification

Output

Voltage

Accuracy

Package

Type

Product

Name

Package

Type

Product

Name

Package

Type

Product

Name

Code

1.3V/2.8V

1.5V/3.0V

1.8V/2.5V

1.8V/2.8V

2.5V/1.8V

±2%

SOT-23-6A

BL9180-ABPRA

BL9180-BBPRA

BL9180-CBPRA

BL9180-DBPRA

BL9180-EBPRA

SOT-23-6B

BL9180-ABPRB

BL9180-BBPRB

BL9180-CBPRB

BL9180-DBPRB

BL9180-EBPRB

ESOP-8

BL9180-ABPEP

BL9180-BBPEP

BL9180-CBPEP

BL9180-DBPEP

BL9180-EBPEP

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BL9180 Rev 2.2

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BL9180

Dual,300mA Ultra-low Noise

CMOS LDO Regulator

2.8V/1.8V

2.8V/3.0V

2.8V/3.3V

3.0V/1.5V

3.3V/2.8V

3.3V/3.3V

2.8V/1.2V

1.8V/3.3V

1.5V/3.3V

1.2V/3.3V

1.2V/1.8V

±2%

SOT-23-6A

BL9180-FBPRA

BL9180-GBPRA

BL9180-HBPRA

BL9180-IBPRA

BL9180-JBPRA

BL9180-KBPRA

BL9180-LBPRA

BL9180-MBPRA

BL9180-NBPRA

BL9180-OBPRA

BL9180-PBPRA

SOT-23-6B

BL9180-FBPRB

BL9180-GBPRB

BL9180-HBPRB

BL9180-IBPRB

BL9180-JBPRB

BL9180-KBPRB

BL9180-LBPRB

BL9180-MBPRB

BL9180-NBPRB

BL9180-OBPRB

BL9180-PBPRB

ESOP-8

BL9180-FBPEP

BL9180-GBPEP

BL9180-HBPEP

BL9180-IBPEP

BL9180-JBPEP

BL9180-KBPEP

BL9180-LBPEP

BL9180-MBPEP

BL9180-NBPEP

BL9180-OBPEP

BL9180-PBPEP

Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired.

Note 2: The BL9180 is guaranteed to meet performance specifications from 0°C to 70°C. Specifications over the –40°C to

85°C operating temperature range are assured by design, characterization and correlation with statistical

process controls.

Note 3: E: BL9180 with RA package E: BL9180 with RB package V: Voltage code Y: Year of wafer manufacturing W:

Week of wafer manufacturing EP: ESOP-8

Note 4: Thermal Resistance is specified with approximately 1 square of 1 oz copper.

Block Diagram

SOT23-6

ESOP-8

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BL9180 Rev 2.2

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BL9180

Dual,300mA Ultra-low Noise

CMOS LDO Regulator

Electrical Characteristics ^{(Note 5)}

(V_IN=3.6V, EN1=EN2=V_IN,C_IN=C_OUT=1F, T_A=25°C , unless otherwise noted.)

Parameter

Symbol

Conditions

MIN

TYP

MAX

unit

Input Voltage

V_IN

Output Voltage Accuracy

-1

-2

V_IN=3.6V,

I_OUT=1mA

V_OUT

(Note 6)

Current Limit

Quiescent Current

I_LIM

I_Q

400

430

180

A

R_LOAD=1

V_EN>1.2V, I_OUT=0mA

I_OUT=200mA,

V_OUT=2.8V

I_OUT=300mA,

V_OUT=2.8V

V_IN=3.6V to 5.5V

I_OUT=1mA

260

180

130

210

0.05

Dropout Voltage

V_DROP

300

Line Regulation^{(Note 7)}

Load Regulation^{(Note 8)}

ΔV_LINE

ΔV_LOAD

TC_VOUT

0.17

%/V

%/A

1mA<I_OUT<300mA

Output Voltage^{(Note 9)}

Temperature Coefficient

Standby Current

I_OUT=1mA

±60

ppm/°C

I_STBY

I_IBSD

V_EN=GND,Shutdown

V_EN=GND or V_IN

V_IN=3V to 5.5V,

Shutdown

0.01

100

A

EN Input Bias Current

Logic Low

Logic High

V_IL

V_IH

0.4

Input

V_IN=3V to 5.5V,

Start up

Threshold

1.2

10Hz to100KHz,

I_OUT=200mA

Output Noise

Voltage

e_NO

100

V_RMS

C_OUT=1uF

Power

Supply

Rejection

Ratio

f=217Hz

-73

-70

-50

f=1KHz

PSRR

I_OUT=100mA

f=10KHz

Thermal Shutdown

Temperature

Thermal Shutdown

Hysteresis

Shutdown, Temp

increasing

T_SD

165

°C

T_SDHY

Note 5: 100% production test at +25°C. Specifications over the temperature range are guaranteed by design and

characterization.

Note 6: This IC includes two kinds of output voltage accuracy versions. A: ±1%, B: ±2%.





V_OUT1V_{OUT 2}

V_INV_{OUT (normal)}

Note 7: Line regulation is calculated by

V_LINE



100









Where V_OUT1is the output voltage when V_IN=5.5V, and V_OUT2is the output voltage when V_IN=3.6V,

△V_IN=1.9V. V_OUT(normal)=2.8V.





V_OUT1V_{OUT 2}

I_OUTV_{OUT (normal)}

Note 8: Load regulation is calculated by

V_LOAD



100









Where V_OUT1is the output voltage when I_OUT=1mA, and V_OUT2is the output voltage when I_OUT=300mA. △I_OUT=0.299A,

V_OUT(normal)=2.8V.

V_OUT

T V_OUT

Note 9: The temperature coefficient is calculated by

TC_V



OUT

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BL9180 Rev 2.2

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BL9180

Dual,300mA Ultra-low Noise

CMOS LDO Regulator

Typical Performance Characteristics

Output Voltage Vs. Temperature

IQ Vs.VIN(BL9180-HBPRB)

220

215

210

205

200

195

3.0

CIN=1uF

COUT1=1uF,COUT2=1uF

No Load

=3.6V

=1uF

2.9

2.8

2.7

2.6

2.5

OUT

3.50

3.75

4.00

4.25

4.50

4.75

5.00

5.25

5.50

-50

-25

100

125

Input Voltage(V)

Temperaute(C)

Dropout Voltage Vs. Load Current

PSRR(VOUT1)

300

250

200

150

100

C_IN=C_OUT=1uF

VOUT=2.8V

CIN=COUT1=COUT2=1uF

VOUT1=2.8V VOUT2=3.0V

-10

-20

-30

-40

-50

-60

-70

-80

1mA Load

100mA Load

200mA Load

TJ=85C

TJ=25C

TJ=-40C

100

150

200

250

300

100

1000

10000

100000

1000000

Load Current(mA)

Frequency(Hz)

VOUT Vs. VIN(BL9180-HBPRB)

EN Pin Shutdown Threshold Vs. Temperature

1.05

3.4

3.2

3.0

2.8

2.6

2.4

2.2

2.0

1.8

1.6

1.4

1.2

1.0

V_IN=3.6V

1.00

0.95

0.90

0.85

0.80

0.75

C_IN=C_OUT=1uF

CIN=1uF

COUT1=COUT2=1uF

IOUT1=IOUT2=100mA

VOUT1(2.8V)

VOUT2(3.3V)

1.5

2.0

2.5

3.0

3.5

4.0

4.5

5.0

5.5

-50

-25

100

125

Input Voltage(V)

Temperature(C)

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BL9180 Rev 2.2

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BL9180

Dual,300mA Ultra-low Noise

CMOS LDO Regulator

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BL9180 Rev 2.2

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BL9180

Dual,300mA Ultra-low Noise

CMOS LDO Regulator

VOUT Vs.VIN

3.0

2.9

2.8

2.7

2.6

2.5

2.4

2.3

2.2

2.1

2.0

1.9

1.8

1.7

1.6

1.5

1.4

1.3

1.2

1.1

1.0

CIN=COUT=1uF

ILoad=1mA

ILoad=100mA

ILoad=300mA

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

5.0

5.5

6.0

Input Voltage(V)

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BL9180

Dual,300mA Ultra-low Noise

CMOS LDO Regulator

Applications Information

protection.

The BL9180 is integrated with two low

noise, low dropout and low quiescent

current linear regulators designed primarily

for battery applications. Output voltages

are optional ranging from 1.2V to 3.3V, and

each channel can supply current up to 300

mA.

Operating Region and Power

Dissipation

The maximum power dissipation of BL9180

depends on the thermal resistance of the

case and circuit board, the temperature

difference between the die junction and

ambient air, and the rate of airflow. The

power dissipation across the device is

Enable Function

The BL9180 is shutdown by pulling the EN

input low, and turn on by driving the input

high. If this feature is not be used, the EN

input should be tied to VIN to keep the

regulator on at all times.

P_D= (V_IN−V_OUT) ×I_OUT+ V_IN×I _Q

The maximum power dissipation is:

P_D(MAX) = ( T_J(MAX) − T_A) /θ_JA

Current Limit and Thermal Protection

Where T_J(MAX) is the maximum operation

junction temperature 125°C, T_Ais the

ambient temperature and the θ_JAis the

junction to ambient thermal resistance. The

GND pin of the BL9180 performs the dual

function of providing an electrical

connection to ground and channeling heat

away. Connect the GND pin to ground

using a large pad or ground plane.

The BL9180 includes two independent

current limit structure which monitor and

control each pass transistor’s gate voltage

limiting the guaranteed maximum output

current to 300mA. Thermal overload

protection limits total power dissipation in

the

BL9180.

When

the

junction

temperature exceeds T_J=165°C , the OTP

circuit starts the thermal shutdown function

turn the pass element off and allowing the

IC to cool. The OTP circuit turn on the pass

Capacitor Selection and Regulator

Stability

element

again

after

IC’s

junction

temperature cool by 30°C , result in a

pulsed output during continuous thermal

overload conditions. Thermal-overloaded

protection is designed to protect the

BL9180 in the event of fault conditions. Do

not exceed the absolute maximum junction

temperature rating of T_J=125°C for

continuous operation. The output can be

shorted to ground for an indefinite amount

of time without damaging the part by

cooperation of current limit and thermal

Like any low-dropout regulator, the external

capacitors used with the BL9180 must be

carefully selected for regulator stability and

performance. The BL9180 requires an

output capacitor between the VOUT and

GND pins for phase compensation. Using a

capacitor whose value is > 1μF on the

BL9180 input and the amount of

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BL9180 Rev 2.2

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BL9180

Dual,300mA Ultra-low Noise

CMOS LDO Regulator

capacitance can be increased without limit.

The input capacitor must be located a

distance of not more than 0.5 inch from the

input pin of the IC and returned to a clean

analog ground. Any good quality ceramic or

tantalum can be used for this capacitor.

The capacitor with larger value and lower

impedance due to the load current change,

and the transient response. The DC shift is

quite small due to the excellent load

regulation of the IC. Typical output voltage

transient spike for a step change in the load

current from 0mA to 50mA is tens of mV,

depending on the ESR of the output

capacitor. Increasing the output capacitor's

value and decreasing the ESR attenuates

the overshoot.

ESR

(equivalent

series

resistance)

provides better PSRR and line-transient

response. The output capacitor must meet

both requirements for minimum amount of

capacitance and ESR in all LDOs

applications. The BL9180 is designed

specifically to work with low ESR ceramic

output capacitor in space-saving and

Input-Output (Dropout) Voltage

A regulator's minimum input-output voltage

differential (or dropout voltage) determines

the lowest usable supply voltage. In

performance consideration. Using

battery-powered

systems,

this

will

ceramic capacitor whose value is at least

1μF with ESR is > 5mΩ on the BL9180

output ensures stability. The BL9180 still

works well with output capacitor of other

types due to the wide stable ESR range.

Output capacitor of larger capacitance can

reduce noise and improve load transient

response, stability, and PSRR. The output

capacitor should be located not more than

0.5 inch from the VOUT pin of the BL9180

and returned to a clean analog ground.

determine the useful end-of-life battery

voltage. Because the BL9180 uses a

P-Channel MOSFET pass transistor, the

dropout voltage is

drain-to-source on resistance [R_DS(ON)

function of

]

multiplied by the load current.

Layout Considerations

To improve ac performance such as PSRR,

output noise, and transient response, it is

recommended that the PCB be designed

with separate ground planes for V_INand

V_OUT, with each ground plane connected

only at the GND pin of the device.

Load-Transient Considerations

The BL9180 load-transient response

graphs show two components of the output

response: a DC shift from the output

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BL9180

Dual,300mA Ultra-low Noise

CMOS LDO Regulator

BL9180 Layout Circuit

VIN

VOUT1

VOUT2

EN1 VOUT1

VIN

VDD

GND

EN2 VOUT2

BL9180

VIN

Top Layer Layout

Bottom Layer Layout

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BL9180 Rev 2.2

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Dual,300mA Ultra-low Noise

CMOS LDO Regulator

Package Description

PPMIC BU

BL9180 Rev 2.2

8/2013

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BL9180

Dual,300mA Ultra-low Noise

CMOS LDO Regulator

PPMIC BU

BL9180 Rev 2.2

8/2013

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BL9180

Dual,300mA Ultra-low Noise

CMOS LDO Regulator

ESOP-8

Dimensions In Millimeters

NOM

Symbol

Min

Max

b 1

c 1

1.77

0.28

1.6

0.75

0.48

0.43

0.26

0.21

5.1

0.08

1.2

0.18

1.4

0.65

0.55

0.39

0.38

0.21

0.19

4.7

0.41

0.2

4.9

5.8

6.2

3.7

3.9

1.27BSC

0.65

4.1

0.5

0.8

8°

1.05BSC

3.30REF

2.40REF

ESOP-8 Surface Mount Package

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BL9180-BBPRB [BELLING]

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