BL919318AACURN [BELLING]

300mA Ultra-low Noise, Ultra-Fast CMOS LDO Regulator;


型号：	BL919318AACURN
厂家：	BELLING
描述：	300mA Ultra-low Noise, Ultra-Fast CMOS LDO Regulator
文件：	总14页 (文件大小：911K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

BL9193

300mA Ultra-low Noise, Ultra-Fast

CMOS LDO Regulator

Hand-Held Instruments

PCMCIA Cards

MP3/MP4/MP5 Players

Portable Information Appliances

FEATURES

Ultra-low Noise for RF Application

Ultra-Fast Response in Line/Load

Transient

DESCRIPTION

Quick Start-Up (Typically 50µS)

<0.01µA

Standby

Current

When

Shutdown.

The BL9193 is designed for portable RF and

wireless applications with demanding perfor-

mance and space requirements. The BL9193

performance is optimized for battery-powered

systems to deliver ultra low noise and low

quiescent current. A noise bypass pin is

available for further reduction of output noise.

Regulator ground current increases only

slightly in dropout, further prolonging the

battery life. The BL9193 also works with low-

Low Dropout:210mV@300mA

Wide Operating Voltage Ranges:2V to

TTL-logic-Controlled Shutdown Input

Low Temperature Coefficient

Current Limiting Protection

Thermal Shutdown Protection

Only 1µF Output Capacitor Required for

Stability

ESR ceramic capacitors, reducing

the

High Power Supply Rejection Ratio

Custom Voltage Available

Fast output discharge

Available in 5-Lead SOT-23 andSC-70

Package

amount of board space necessary for power

applications, critical in hand-held wireless

devices. The BL9193 consumes less than

0.01µA in shutdown mode and has fast turn-

on time less than 50µs. The other features

include ultra low dropout voltage, high output

accuracy, current limiting protection, and high

ripple rejection ratio. Available in the 5-lead of

SC-70, SOT-23 packages.

APPLICATIONS

Cellular and Smart Phones

Battery-Powered Equipment

Laptop, Palmtops,Notebook Computers

ORDERING INFORMATION

TYPICAL APPLICATION

BL9193 XX X X X XXX

VIN

VOUT

VIN

1uF

Package:

RN: SOT-23-5

URN: SC-70-5

1uF

GND

BL9193

Chip

Enable

Features

P: Standard (default, lead free)

C: Customized

22nF

Enable Option:

A: active high with internal 8 MΩ pulldown

B: active high with external pull down

C: active low with internal 2 MΩ pull up

D: active low with external pullup

Application hints:

Output capacitor (C2 2.2uF) is recommended

in BL9193-1.2V BL9193-1.5V BL9193-

1.8V application to assure the stability of circuit.

Output Voltage Accuracy

A: ±1%

B: ±2%

Output Voltage:

12:1.2V 15:1.5V 18:1.8V 25:2.5V

28:2.8V 30:3.0V 33:3.3V

CT: custom fixed output (50mV step)

AD: Adjustable

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BL9193 Rev 2.4

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BL9193

300mA Ultra-low Noise, Ultra-Fast

CMOS LDO Regulator

Absolute Maximum Rating ^{(Note 1)}

Maximum Junction Temperature

125°C

Input Supply Voltage (V_CC)

EN Input Voltage

Output Voltage

-0.3V to +6V

(Note2)

-0.3V to +V_in

-0.3V to Vin+0.3V

-0.3V to +6V

300mA

Operating Temperature Range

Storage Temperature Range

Lead Temperature (Soldering, 10s)

-40°C to 85°C

-65°C to 125°C

300°C

BP Voltage

Output Current

Thermal Resistance ^(Note4)

Ө_JC

Package Information

Ө_JA

SOT23-5/SC70-5

TOP VIEW

Package

SOT23-5

SC70-5

130°C/W

170°C/W

250°C/W

333°C/W

VIN

GND

VOUT

BP/FB

Part Number

BL9193-12BA

Top Mark

Temp Range

(Note3)

-40°C to +85°C

C A Y W

BL9193-15BA

BL9193-18BA

BL9193-25BA

BL9193-28BB

BL9193-30BA

BL9193-33BA

BL9193-12BB

BL9193-28BA

C B Y W

C C Y W

C D Y W

C E Y W

C F Y W

C G Y W

C H Y W

C I Y W

-40°C to +85°C

BL9193-ADBA

C J Y W

Year

ꢀ

2014

2015

2016

2020

2021

Week

ꢀ

Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired.

Note 2: The BL9193 is guaranteed to meet performance specifications from 0°C to 70°C. Specifications over the –40°C

to 85°C operating temperature range are assured by design, characterization and correlation withstatistical

process controls.

Note 3: Y: Year of manufacturing W: Week ofmanufacturing

Note 4: Thermal Resistance is specified with approximately 1 square of 1 ozcopper.

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BL9193 Rev 2.4

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BL9193

300mA Ultra-low Noise, Ultra-Fast

CMOS LDO Regulator

Pin Description

NAME

VIN

GND

FUNCTION

Power Input Voltage.

Ground.

Chip Enable Pin with four options.

A: active high with internal 8 MΩ pull down

B: active high with external pull down

C: active low with internal 2 MΩ pull up

D: active low with external pull up

Reference Noise Bypass. FB pin for adjustable version.

Output Voltage.

BP/FB

VOUT

Block Diagram

VIN

Quick

Start

Quick

Start

Error

Amplifier

VOUT

CurrentLimit

And

Thermal

Protection

Current Limit

And

Thermal

Protection

VREF

GND

BL9193 XX XA

BL9193 XX XC

VIN

Quick

Start

Quick

Start

Error

Amplifier

Error

Amplifier

VOUT

Current Limit

And

Thermal

Protection

Current Limit

And

Thermal

Protection

VREF

GND

BL9193 XX XB

BL9193 XX XD

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BL9193 Rev 2.4

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BL9193

300mA Ultra-low Noise, Ultra-Fast

CMOS LDO Regulator

Electrical Characteristics ^{(Note 5)}

(V_IN=3.6V, EN=V_IN,C_IN=C_OUT=1µF, C_BP=22nF, T_A=25 , unless otherwise noted.)

Parameter

Input Voltage

Symbol

Conditions

MIN

TYP

MAX

unit

V_IN

-1

-2

V_IN=3.6V,

I_OUT=1mA

V_IN=3.4V,

I_OUT=300mA

R_LOAD=1Ω

Output Voltage Accuracy

∆V_OUT

(Note 6)

-2.5

400

+2.5

I_LIM

I_Q

Current Limit

Quiescent Current

430

µA

130

180

V_EN>1.2V, I_OUT=0mA

I_OUT=200mA,

V_OUT=2.8V

I_OUT=300mA,

V_OUT=2.8V

V_IN=3.6V to 5.5V

130

210

0.05

Dropout Voltage

V_DROP

300

Line Regulation^{(Note 7)}

Load Regulation^{(Note 8)}

∆V_LINE

∆V_LOAD

TC_VOUT

0.17

%/V

%/A

I_OUT=1mA

1mA<I_OUT<300mA

Output Voltage^{(Note 9)}

Temperature Coefficient

Standby Current

ppm/

I_OUT=1mA

±60

I_STBY

I_IBSD

0.01

100

V_EN=GND,Shutdown

V_EN=GND or V_IN

V_IN=3V to 5.5V,

Shutdown

µA

EN Input Bias Current

Logic Low

Logic High

V_IL

V_IH

0.4

Input

Threshold

V_IN=3V to 5.5V,

Start up

1.2

10Hz to100KHz,

I_OUT=200mA

Output Noise

Voltage

e_NO

100

µV_RMS

C_OUT=1uF

Power

Supply

Rejection

Ratio

f=217Hz

-80

-78

-65

Cout=1uF,

Iout=100mA

f=1KHz

PSRR

f=10KHz

Thermal Shutdown

Temperature

Shutdown, Temp

increasing

T_SD

165

Thermal Shutdown

Hysteresis

T_SDHY

Note 5: 100% production test at +25°C. Specifications over the temperature range are guaranteed by design and

characterization.

Note 6: This IC includes two kinds of output voltage accuracy versions.A: ±1%, B: ±2%.





V_OUT

−V_OUT

Note 7:Line regulation is calculated by

×100





LINE

∆





∆

V_IN×V_OUT

(normal

)





Where V_OUT1is the output voltage when V_IN=5.5V, and V_OUT2is the output voltage when V_IN=3.6V,

V_IN=1.9V .V_OUT(normal)=2.8V.













V_OUT

−V_OUT

1 2

Note 8: Load regulation is calculated by

×100

LOAD

∆V





∆I_OUT×V_{OUT (normal )}

Where V_OUT1is the output voltage when I_OUT=1mA, and V_OUT2is the output voltage when I_OUT=300mA. I_OUT=0.299A,

V_OUT(normal)=2.8V.

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BL9193 Rev 2.4

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BL9193

300mA Ultra-low Noise, Ultra-Fast

CMOS LDO Regulator

∆V_OUT

Note 9:The temperature coefficient is calculated by

TC_V

OUT

∆T ×V_OUT

Typical Performance Characteristics

OutputVoltagevs.Temperature

Quiescent Current vs. Temperature

140

130

120

110

3.0

IN=3.6V

=3.6V

=1uF

OUT

=1uF

2.9

2.8

2.7

2.6

2.5

OUT

100

-50

-25

100

125

-50

-25

100

125

Temperature(°C)

Temperaute(

°C)

DropoutVoltagevs.LoadCurrent

PSRR

-10

-20

300

250

200

150

100

IN=3.6V

BP=22nF

IN=1uF,COUT=1uF

=1uF

OUT

-30

-40

-50

-60

-70

-80

-90

TJ=85

TJ=25

OUT=100mA

OUT=200mA

TJ=-40°C

100

150

200

250

300

100

1000

10000

100000

1000000

Frequency(Hz)

Load Current(mA)

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BL9193 Rev 2.4

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BL9193

300mA Ultra-low Noise, Ultra-Fast

CMOS LDO Regulator

EN Pin Shutdown Threshold vs. Temperature

1.05

V_IN=3.6V

1.00

C_IN=C_OUT=1uF

0.95

0.90

0.85

0.80

0.75

-50

-25

100

125

Temperature(

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BL9193 Rev 2.4

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BL9193

300mA Ultra-low Noise, Ultra-Fast

CMOS LDO Regulator

larger capacitance can reduce noise and

improve load transient response, stability,

and PSRR. The output capacitor should be

located not more than 0.5 inch from the

Applications Information

Like any low-dropout regulator, the ex-

ternal capacitors used with the BL9193

must be carefully selected for regulator

stability and performance. Using a capac-

itor whose value is > 1µF on the BL9193

input and the amount of capacitance can

be increased without limit. The input cap-

acitor must be located a distance of not

more than 0.5 inch from the input pin of the

IC and returned to a clean analog ground.

Any good quality ceramic or tantalum can

be used for this capacitor. The capacitor

with larger value and lower ESR (equi-

valent series resistance) provides better

PSRR and line-transient response. The

output capacitor must meet both requi-

rements for minimum amount of capa-

citance and ESR in all LDOs application.

The BL9193 is designed specifically to

work with low ESR ceramic output capa-

citor in space-saving and performance

consideration. Using a ceramic capacitor

whose value is at least 1µF with ESR is >

25mΩ on the BL9193 output ensures

stability. The BL9193 still works well with

output capacitor of other types due to the

wide stable ESR range. Output capacitor of

OUT pin of the BL9193 and returned to a

clean analog ground.

Bypass Capacitor and Low Noise

Connecting a 22nF between the BP pin

and GND pin significantly reduces noise on

the regulator output, it is critical that the

capacitor connection between the BP pin

and GND pin be direct and PCB traces

should be as short as possible. There is a

relationship between the bypass capacitor

value and the LDO regulator turn on time.

DC leakage on this pin can affect the LDO

regulator output noise and voltage regul-

ation performance.

Enable Function

The BL9193 features an LDO regulator en-

able/disable function. To assure the LDO

regulator will switch on; the EN turn on

control level must be greater than 1.2 volts.

The LDO regulator will go into the shut-

down mode when the voltage on the EN

pin falls below 0.4 volts. For to protect the

PPMIC BU

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BL9193 Rev 2.2

1/2011

BL9193

300mA Ultra-low Noise, Ultra-Fast

CMOS LDO Regulator

system, the BL9193 have a quick dis-

charge function. If the enable function is

not needed in a specific application, it may

be tied to VIN to keep the LDO regulator in

a continuously on state.

OUTPUT

VOLTAGTE

1.8V

13.9 kΩ 30.1 kΩ

31.6 kΩ 30.1 kΩ

51 kΩ

59 kΩ

22pF

2.5V

3.3V

3.6V

30.1 kΩ

Programming the BL9193 Adjustable

LDO regulator

BL9193 Adjustable LDO regulator

Programming

The output voltage of the BL9193

adjustable regulator is programmed using

an external resistor divider as show in

Figure as below. The output voltage is

calculated using equation as below:

VIN

VOUT

VIN

VOUT

1uF

GND

BL9193 -ADJ

EN FB





OUT = VREF × 1+









Thermal Considerations

Where:

V_REF=1.23V typ (the internal

reference voltage)

Thermal protection limits power dissipation

in BL9193. When the operation junction

temperature exceeds 165°C, the OTP

circuit starts the thermal shutdown function

turn the pass element off. The pass

element turns on again after the junction

temperature cools by 30°C.

Resistors R1 and R2 should be chosen for

approximately 50uA divider current. Lower

value resistors can be used for improved

noise performance, but the solution

consumes more power. Higher resistor

values should be avoided as leakage

For continue operation, do not exceed

absolute maximum operation junction

temperature 125°C. The power dissipation

definition in device is:

current into/out of FB across

R1/R2

creates an offset voltage that artificially

increases/decreases the feedback voltage

and thus erroneously decrease/increases

P_D= (V_IN−V_OUT) ×I_OUT+ V_IN×I_Q

_OUT.The recommended design procedure

is to choose R2=30.1kΩ to set the divider

current at 50uA, C1=22pF for stability, and

then calculate using Equation as below:



The maximum power dissipation depends

on the thermal resistance of IC package,

PCB layout, the rate of surroundings

airflow and temperature difference betw-

een junction to ambient. The maximum

power dissipation can be calculated by

following formula：

VOUT



−1 × R2

R1=







VREF



In order to improve the stability of the

adjustable version, it is suggested that a

small compensation capacitor be placed

between OUT and FB. The suggested

value of this capacitor for several resistor

ratios is shown in the table below.

P_D(MAX) = ( T_J(MAX) − T_A)/θ_JA

Where T_J(MAX) is the maximum operation

junction temperature 125°C, T_Ais the

OUTPUT VOLTAGE

PROGRAMMING GUIDE

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BL9193 Rev 2.4

3/2017

BL9193

300mA Ultra-low Noise, Ultra-Fast

CMOS LDO Regulator

ambient temperature and the θ_JAis the

junction to ambient thermal resistance. For

recommended operating conditions spe-

cification of BL9193, where T_J(MAX) is the

maximum junction temperature of the die

(125°C) and T_Ais the maximum ambient

temperature. The junction to ambient the-

rmal resistance (θ_JAis layout dependent)

for SOT-23-5 package is 250°C/W, SC-70-

T_J=T_A+P_D×θ_JA=40°C+0.15W×250°C/W

=40°C+37.5°C=77.5°C<T_J(MAX) =125°C

For this operating condition, T_Jis lower

than the absolute maximum operating

junction temperature,125°C, so it is safe to

use the BL9193 in this configuration.

5 package is 333°C/W, on

standard

Layout considerations

JEDEC 51-3 thermal test board. The max-

imum power dissipation at T_A= 25°C can

be calculated by following formula:

To improve ac performance such as PSRR,

output noise, and transient response, it is

recommended that the PCB be designed

with separate ground planes for V_INand

V_OUT, with each ground plane connected

only at the GND pin of the device. In

addition, the ground connection for the

bypass capacitor should connect directly to

the GND pin of the device.

P_D(MAX) = (125°C−25°C)/333 = 300mW

(SC-70-5)

P_D(MAX) = (125°C−25°C)/250 = 400mW

(SOT-23-5)

The maximum power dissipation depends

on operating ambient temperature for fixed

T_J(MAX) and thermal resistance θ_JA. It is

also useful to calculate the junction of

temperature of the BL9193 under a set of

BL9193-2.8V Layout Circuit

VIN

VOUT

VIN

VOUT

1uF

BL9193

GND

1uF

specific conditions. In this example let the

1uF

Input voltage V_IN=3.3V, the output current

Io=300mA and the case temperature

VIN

22nF

T_A=40°C measured by a thermal couple

during operation. The power dissipation for

the Vo=2.8V version of the BL9193 can be

calculated as:

P_D= (3.3V−2.8V) ×300mA+3.6V×100uA

=150mW

And the junction temperature, T_J, can be

calculated as follows:

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BL9193 Rev 2.4

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BL9193

300mA Ultra-low Noise, Ultra-Fast

CMOS LDO Regulator

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BL9193 Rev 2.4

3/2017

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BL9193

300mA Ultra-low Noise, Ultra-Fast

CMOS LDO Regulator

Package Description

Dimensions In Millimeters

Dimensions In Inches

Symbol

Min

Max

Min

Max

0.800

0.000

1.150

0.150

1.800

1.100

0.100

1.350

0.400

2.450

2.250

0.031

0.000

0.045

0.006

0.071

0.044

0.004

0.054

0.016

0.096

0.089

0.650

0.026

0.080

0.210

0.260

0.460

0.003

0.008

0.010

0.018

SC-70-5 Surface Mount Package

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BL9193 Rev 2.4

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BL9193

300mA Ultra-low Noise, Ultra-Fast

CMOS LDO Regulator

Package type

SC70-5

Number of devices per reel

3000

Tape dimension

Taping reel dimension

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BL9193 Rev 2.4

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BL9193

300mA Ultra-low Noise, Ultra-Fast

CMOS LDO Regulator

Dimensions In Millimeters

Dimensions In Inches

Symbol

Min

Max

Min

Max

0.889

0.000

1.397

0.356

2.591

2.692

0.838

0.080

0.300

1.295

0.152

1.803

0.559

2.997

3.099

1.041

0.254

0.610

0.035

0.000

0.055

0.014

0.102

0.106

0.033

0.003

0.012

0.051

0.006

0.071

0.022

0.118

0.122

0.041

0.010

0.024

SOT-23-5 Surface Mount Package

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BL9193 Rev 2.4

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BL9193

300mA Ultra-low Noise, Ultra-Fast

CMOS LDO Regulator

Package type

SOT23-5

Number of devices per reel

3000

Tape dimension Default: Type I

Type I

Type II

Taping reel dimension

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BL9193 Rev 2.4

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BL919318AACURN [BELLING]

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