FDF1302M [BEL]

DC-DC Regulated Power Supply Module, 1 Output, 1.5W;


型号：	FDF1302M
厂家：	BEL FUSE INC.
描述：	DC-DC Regulated Power Supply Module, 1 Output, 1.5W
文件：	总6页 (文件大小：122K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

FD-Family

Switching Regulators, PCB + Chassis

Benign Environment

TOKO Switching Regulators

FD-Family

No input to output isolation

Single output of 3.3, 5, 12, 15 or 30 V DC/0.5...1.5 W

Double output of ±12 or ±15 V DC/0.5...3 W

Input voltage from 4.5 V up to 17 V DC

• Miniature size

• Surface mounting type

• High power density

• High efficiency

• Excellent line/load regulation

• Parallel operation

• Inhibit function available

• High reliability

Table of Contents

Page

Type Survey .............................................................. 4 - 84

Description ................................................................ 4 - 85

Safety and Installation Instructions ........................... 4 - 85

Electrical Input and Output Data ............................... 4 - 86

Immunity to Environmental Conditions...................... 4 - 88

Mechanical Data ....................................................... 4 - 88

Type Key and Product Marking ................................. 4 - 89

Type Survey

Table 1a: Survey of step-down type FDD

Nominal

output

voltage

U_{o nom}

Nominal

output

current

I_o

Input

voltage

range

U_i

Nominal

input

voltage

U_{i nom}

Efficiency

Type

designation

Rated

output

power

P_{o max}

(typ)

(Master or Slave)

FDD 1106

3.3 V

120...600 mA

5...12 V

6...17 V

8 V

84%

82%

87%

2 W

12 V

FDD 1206

5 V

FDD 1203

3 W

Table 1b: Survey of flyback type FDB and FDF

Nominal

output

voltage

U_{o nom}

Nominal

output

current

I_o

Input

voltage

range

U_i

Nominal

input

voltage

U_{i nom}

Efficiency

Type

designation

Rated

output

power

P_{o max}

(typ)

(Master or Slave)

FDF 1103

FDB 1001

FDF 1301

FDB 1002

FDF 1302

FDF 1105

FDF 1205

FDB 2001

FDF 2301

FDB 2002

FDF 2302

5 V

100...250 mA

45...115 mA

70...125 mA

40...90 mA

70...100 mA

10...30 mA

5...12 V

4.5...5.5 V

9...17 V

8 V

5 V

77%

70%

71%

70%

71%

79%

80%

72%

73%

72%

1.25 W

1.4 W

1.5 W

1.35 W

1.5 W

0.9 W

12 V

5 V

15 V

30 V

4.5...5.5 V

9...17 V

12 V

8 V

5...12 V

6...17 V

12V

5 V

±12 V

±15 V

±22.5...±57.5 mA

±35...±62.5 mA

±20...±45 mA

±35...±50 mA

4.5...5.5 V

9...17 V

1.4 W

1.5 W

1.35 W

1.5 W

12 V

5 V

4.5...5.5 V

9...17 V

12 V

4 - 84

Edition 2/96 - © Melcher AG

MELCHER

The Power Partners.

Benign Environment

Switching Regulators, PCB + Chassis

FD-Family

Description

The FD-Family features very compact designed switching

regulators in a miniature size case for surface mount,

hence, these converters have an extremely high power

density.With a high efficiency of up to 87%, very stable out-

put voltages as well as high reliability, the FD-family be-

comes a perfect choice for the supply of LCD's, non-volatile

memories, voltage distribution in 5 V logical circuits and

CCD applications. Furthermore, a special master-slave

connection allows safe parallel operation of two or more

units. For a wide variety of filtering circuits for smooth out-

put voltages, a full range of optional choke coils are avail-

able.

Safety and Installation Instructions

Safety for Step Down Types

Safety for Step Up Types

If the output circuit of a switching regulator is operator-ac-

cessible according to the IEC 950 related safety standards,

it shall be an SELV circuit (Safety Extra Low Voltage circuit,

i.e. a circuit, separated from mains by at least basic insula-

tion, that is so designed and protected that under normal

and single fault conditions, the voltage between any two

conductors and between any conductor and earth does not

exceed DC 60 V).

If the output circuit of a switching regulator is operator-ac-

cessible according to the IEC 950 related safety standards,

it shall be an SELV circuit (Safety Extra Low Voltage circuit,

i.e. a circuit, separated from mains by at least basic insula-

tion, that is so designed and protected that under normal

and single fault conditions, the voltage between any two

conductors and between any conductor and earth does not

exceed DC 60 V).

In the following statement an interpretation is provided of

the IEC 950 safety standard with respect to the safety sta-

tus of the output circuit.However, it is the sole responsibility

of the installer or user to assure the compliance with the

relevant and applicable safety standards:

In the following statement an interpretation is provided of

the IEC 950 safety standard with respect to the safety sta-

tus of the output circuit. However, it is the sole responsibility

of the installer or user to assure the compliance with the

relevant and applicable safety standards:

If the input circuit of a switching regulator is an SELV circuit,

it’s output is considered to be an SELV circuit.

If the input circuit of a switching regulator is an SELV circuit

and the output is protected against overvoltages higher

than 60 V by external means, e.g. an overvoltage suppres-

sor diode, the output is considered to be an SELV circuit.

Filtering Recommendations

Circuit design by means of adding input and output capaci-

tors in order to reduce ripple and noise to a moderate value.

n.c.

Vo–

GND

Vo+

C₂

C₁

GND

Vo+

C₂

PDR

GND

PDR

Fig. 1

Fig. 2

External circuitry for 2 output units

External circuitry for 1 output step down units

Table 2b: Recommended external capacitors

Table 2a: Recommended external capacitors

C₁

I_{i ripple}

Type

I_{o ripple}

C₂

C₁

I_{i ripple}

Type

I_{o ripple}

C₂

(mA_rms

)

(mA_rms

)

(mA_rms

)

(mA_rms

100

105

135

245

215

125

105

)

OS-CON

3.3 µF/20 V

in parallel

Al-Chip

245

240

260

250

475

FDF 1301

FDF 1302

FDF 2301

FDF 2302

FDF 1103

205

same as C₁

OS-CON

535

490

575

450

FDD 1106

FDD 1206

FDD 1203

FDB 1001

FDB 1002

FDB 2001

FDB 2002

SP Cap

22 µF/8 V

10 µF/20 V

180

in parallel

135

Al-Chip

33 µF/25 V

130

same as C₁

33 µF/25 V

OS-CON

10 µF/20 V

in parallel

Al-Chip

395

SP Cap

22 µF/8 V

in parallel

Al-Chip

425

415

OS CON

3.3 µF/20 V

in parallel

Al-Chip

33 µF/25 V

295

270

FDF 1105

FDF 1205

Al-Chip

10 µF/50 V

2 in parallel

33 µF/25 V

Remarks:

Smoothing capacitors should be connected within 15 mm

from the converter pins.

It is recommended to use low impedance smoothing ca-

pacitors with high frequency rating. Refer to the table above

for recommended external capacitors.

Edition 2/96 - © Melcher AG

4 - 85

MELCHER

The Power Partners.

FD-Family

Switching Regulators, PCB + Chassis

Benign Environment

Parallel Connection

Notes:

– For parallel operation the master parallel drive signal out-

put is connected to the slave parallel drive signal input.

Vo–

– Up to 5 units can be operated in parallel.

FDF 2301M

GND

Master

– The converters should be placed close to each other.

Soldering Directions

Best results can be achieved with a soldering temperature

of 215°C for 10 seconds using a reflow soldering system

after a pre-heating period of 80 seconds at 135°C. The

switching regulator should not be exposed to the heat for

more than 30 seconds. Solder temperatures exceeding

240°C may damage the device.

FDF 2301S

GND

Slave

Drive signal

for parallel

operation

PDR

FDF 2301S

GND

Vo+

Slave

Fig. 3

Parallel connection

Electrical Input and Output Data

General Condition; T_A= 25°C

Table 3a: Input and output data FDD single channel

Characteristics

Conditions

FDD 1106

FDD 1206

FDD 1203

Unit

min

typ

max

min

typ

max

min

typ

max

Output

U_o

Output voltage

U_{i min}…U_{i max}

3.2

3.3

3.4

3.2

3.3

360

3.4

4.85

120

5.0 5.15

mV_pp

I_{o nom}

u_o

Output current

U_{i min}…U_{i max}

120 360

600

120

600

360

600

Output ripple

U_{i min}, I_{o max}

∆U_{o U}

∆U_{o I}

Static line regulation

Static load regulation

U_{i min}...U_{i max}

±1.5

±1

±1.5

±1

U_{i nom,}I_{o min}...I_{o max}

U_{i nom}, I_{o min}...I_{o max}

±1

∆U_o/∆T Thermal coefficient

±0.5

Input

U_i

Efficiency

Input voltage

I_{o min}...I_{o max}

V DC

U_{i nom}, I_{o nom}

Table 3b: Input and output data FDB single channel

Characteristics

Conditions

FDB 1001

FDB 1002

Unit

min

typ

max

min

typ

max

Output

U_o

Output voltage

U_{i min}…U_{i max}

11.64 12 12.36

14.55 15 15.45

mV_pp

I_{o nom}

u_o

Output current

U_{i min}…U_{i max}

115

Output ripple

U_{i min}, I_{o max}

∆U_{o U}

∆U_{o I}

Static line regulation

Static load regulation

U_{i min}...U_{i max}

±1.5

±1

±1.5

±1

U_{i nom,}I_{o min}...I_{o max}

U_{i nom}, I_{o min}...I_{o max}

∆U_o/∆T Thermal coefficient

±0.5

Input

U_i

Input voltage

I_{o min}...I_{o max}

4.5

5.5

4.5

5.5

V DC

Efficiency

U_{i nom}, I_{o nom}

4 - 86

Edition 2/96 - © Melcher AG

MELCHER

The Power Partners.

Benign Environment

Switching Regulators, PCB + Chassis

FD-Family

General condition: T_A= 25°C

Table 3c: Input and output data FDF single channel

Characteristics

Conditions

FDF 1103

FDF 1105

FDF 1205

Unit

min

typ

max

min

typ

max

min

typ

max

Output

U_o

Output voltage

U_{i min}…U_{i max}

4.85

5.15

250

29.1

30.9

29.1

30.9

mV_pp

I_{o nom}

u_o

Output current

U_{i min}…U_{i max}

100 175

Output ripple

U_{i min}, I_{o max}

∆U_{o U}

∆U_{o I}

Static line regulation

Static load regulation

U_{i min}...U_{i max}

±1.5

±1

±1.5

±1

±1.5

±1

U_{i nom,}I_{o min}...I_{o max}

U_{i nom}, I_{o min}...I_{o max}

∆U_o/∆T Thermal coefficient

±0.5

Input

U_i

Efficiency

Input voltage

I_{o min}...I_{o max}

V DC

U_{i nom}, I_{o nom}

Table 3d: Input and output data FDF single channel

Characteristics

Conditions

FDF 1301

FDF 1302

Unit

min

typ

max

min

typ

max

Output

U_o

Output voltage

U_{i min}…U_{i max}

11.64 12 12.36

14.55 15 15.45

mV_pp

I_{o nom}

u_o

Output current

U_{i min}…U_{i max}

100

125

100

Output ripple

U_{i min}, I_{o max}

∆U_{o U}

∆U_{o I}

Static line regulation

Static load regulation

U_{i min}...U_{i max}

±1.5

±1

±1.5

±1

U_{i nom,}I_{o min}...I_{o max}

U_{i nom}, I_{o min}...I_{o max}

∆U_o/∆T Thermal coefficient

±0.5

Input

U_i

Efficiency

Input voltage

I_{o min}...I_{o max}

V DC

U_{i nom}, I_{o nom}

Table 3e: Input and output data FDB double channel

Characteristics

Conditions

FDB 2001

FDB 2002

Unit

min

typ

max

min

typ

max

Output

U_o

Output voltage

U_{i min}…U_{i max}

+11.64 +12 +12.36 +14.55 +15 +15.45

–12.72 –12 –11.28 –15.90 –15 –14.10

I_{o nom}

u_o

Output current

U_{i min}…U_{i max}

U_{i min}, I_{o max}

U_{i min}...U_{i max}U_o+

U_o–

±22.5 ±40 ±57.5

±20 ±32.5 ±45

mV_pp

Output ripple

±1.5

±3.0

±1

±1.5

±3.0

±1

∆U_{o U}

Static line regulation

∆U_{o I}

Static load regulation

U_{i nom}

U_o+

I_{o min}...I_{o max}U_o–

U_{i nom}, I_{o min}...I_{o max}

±2

∆U_o/∆T Thermal coefficient

±0.5

Input

U_i

Input voltage

I_{o min}...I_{o max}

4.5

5.5

4.5

5.5

V DC

Efficiency

U_{i nom}, I_{o nom}

4 - 87

MELCHER

The Power Partners.

FD-Family

Switching Regulators, PCB + Chassis

Benign Environment

General condition: T_A= 25°C

Table 3f: Input and output data FDF double channel

Characteristics

Conditions

FDF 2301

FDF 2302

Unit

min

typ

max

min

typ

max

Output

U_o

Output voltage

U_{i min}…U_{i max}

+11.64 +12 +12.36 +14.55 +15 +15.45

–12.72 –12 –11.28 –15.90 –15 –14.10

I_{o nom}

u_o

Output current

U_{i min}…U_{i max}

U_{i min}, I_{o max}

U_{i min}...U_{i max}U_o+

U_o–

±35 ±50 ±62.5

±35 ±42.5 ±50

mV_pp

Output ripple

±1.5

±3.0

±1

±1.5

±3.0

±1

∆U_{o U}

Static line regulation

∆U_{o I}

Static load regulation

U_{i nom}

U_o+

I_{o min}...I_{o max}U_o–

U_{i nom}, I_{o min}...I_{o max}

±2

∆U_o/∆T Thermal coefficient

±0.5

Input

U_i

Efficiency

Input voltage

I_{o min}...I_{o max}

V DC

U_{i nom}, I_{o nom}

Immunity to Environmental Conditions

Table 4: Temperature specifications

Temperature

Operating

Storage

Characteristics

Conditions

min

–10

max

min

max

Unit

T_A

Ambient temperature

U_{i min}...U_{i max}

I_{o min}...I_{o max}

–40

°C

r.H. Relative humidity

14.7 max.

Mechanical Data

Dimensions in mm.

European

Projection

Fig. 4

6.75

Mechanical dimensions

Table 5: Pin assignments

Type of regulator

Pin no. 1

Pin no. 2

Pin no. 3

PDR

Pin no. 4

Vo+

Pin no. 5

GND

Pin no. 6

n.c.

Master

Slave

1 output step down

2 outputs

Vi+

PDR

Vo+

GND

Vo–

1 output step down

2 outputs

n.c.

PDR

Vo+

GND

n.c.

PDR

Vo+

GND

Vo–

n.c. = not connected, SD = Control signal ON/OFF (low = ON, Vi+ or floating = OFF), PDR = Parallel drive signal

MELCHER

The Power Partners.

Benign Environment

Switching Regulators, PCB + Chassis

FD-Family

Type Key and Product Marking

Type Key

FDD 1 1 0 6 M

Family ...................................................... FDD, FDB, FDF

Channel........................................................................ 1, 2

Nominal input voltage

5 V ............................................ 0

9 V ............................................ 1

6...17 V ..................................... 2

9...15 V ..................................... 3

Nominal output voltage

12 V .......................................... 1

15 V .......................................... 2

5 V ............................................ 3

3.3 V ......................................... 6

Master/Slave type

Master ..................................... M

Slave ........................................ S

Product Marking

Main face: Part number, output voltage and lot number.

4 - 89

MELCHER

The Power Partners.

FDF1302M [BEL]

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