AMMC-6408 [BOARDCOM]
6-18 GHz 1W Power Amplifier;
| 型号： | AMMC-6408 |
| 厂家： | 
Broadcom Corporation. |
| 描述： | 6-18 GHz 1W Power Amplifier |
| 文件： | 总12页 (文件大小：589K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
AMMC-6408
6-18 GHz 1W Power Amplifier
Data Sheet
Chip Size: 2000 x 2000 µm (78.5 x 78.5 mils)
Chip Size Tolerance: ꢀ0 µm ( 0.4 mils)
Chip Thickness: ꢀ00 ꢀ0 µm (4 0.4 mils)
Pad Dimensions: ꢀ00 x ꢀ00 µm (4 0.4 mils)
Description
Features
The AMMC-6408 MMIC is a broadband 1W power
amplifier in a surface mount package designed for use
in transmitters that operate in various frequency bands
between 6GHz and 18GHz. At 8GHz, it provides 29 dBm
•ꢀ Wide Frequency Range 6-18GHz
•ꢀ Highly linear: OIP3=38dBm
•ꢀ Integrated RF power detector
of output power (P-1dB) and 20dB of small-signal gain •ꢀ ESD protection (40V MM, and 200V HBM)
from a small easy-to-use device. This MMIC is optimized
for linear operation with an output third order intercept
point (OIP3) of 38dBm.
•ꢀ Input port partially matched (For narrowband
applications, customer may obtain optimum
matching and gain with an additional matching
circuit)
Applications
•ꢀ Specifications (Vdd=5V, Idq=650mA)
•ꢀ Microwave Radio systems
•ꢀ Frequency range 6 to 18 GHz
•ꢀ Satellite VSAT, DBS Up/Down Link
•ꢀ Small signal Gain of 18dB
•ꢀ LMDS & Pt-Pt mmW Long Haul
•ꢀ Return loss: Input: -3 dB, Output: -9 dB
•ꢀ Broadband Wireless Access (including 802.16 and
•ꢀ High Power: @ 8 GHz, P-1dB = 29 dBm
802.20 WiMax)
•ꢀ WLL and MMDS loops
Attention: Observe Precautions for
handling electrostatic sensitive devices.
ESD Machine Model (Class A)
ESD Human Body Model (Class0)
Refer to Avago Application Note A0040R:
Electro Discharge Damage and Control.
Note: This MMIC uses depletion mode pHEMT devices.
Negative supply is used for the DC gate biasing.
Absolute Maximum Ratings
Symbols
Vd-Vg
Vd
Parameters
Units
V
Minimum
Maximum
8
Notes
Drain to Gate Voltage
Positive Supply Voltage
Gate Supply Voltage
Drain Current
V
5.5
Vg
V
-2.5
0.5
Id
mA
W
TBD
2
PD
Power Dissipation
3.5
2 and 3
Pin
CW Input Power
dBm
°C
20
2
4
Tch
Operating Channel Temp
Storage Case Temp.
Maximum Assembly Temp (30 sec max)
+150
-65 to +155
+320
Tstg
Tmax
Notes:
°C
°C
1. Operation in excess of any one of these conditions may result in permanent damage to this device. Functional operation at or near these
limitations will significantly reduce the lifetime of the device.
2. Dissipated power PD is in any combination of DC voltage, Drain Current, input power and power delivered to the load.
3. When operated at maximum PD with a base plate temperature of 85 °C, the median time to failure (MTTF) is significantly reduced.
4. These ratings apply to each individual FET. The operating channel temperature will directly affect the device MTTF. For maximum life, it is
recommended that junction temperatures (Tj) be maintained at the lowest possible levels. See MTTF vs. Tchannel Temperature Table.
DC Specifications/ Physical Properties
Symbol
Parameters and Test Conditions
Units
Value
Idq
Drain Supply Current
(Vdd=5 V, Vg set for Id Typical)
mA
650
Vg
Gate Supply Operating Voltage
(Id(Q) = 650 (mA))
V
-1.1
22
Rθjc
Thermal Resistance[6]
(Channel-to-Base Plate)
°C/W
°C
Tch
Channel Temperature
150.6
Notes:
6. Channel-to-backside Thermal Resistance (θch-b) = 10°C/W at Tchannel (Tc) = 107°C as measured using infrared microscopy. Thermal Resistance
at backside temperature (Tb) = 25°C calculated from measured data.
Thermal Properties
Parameter
Test Conditions
Value
Maximum Power Dissipation
Tbaseplate = 85°C
PD = 3.5W
Tchannel = 150°C
Thermal Resistance (qjc)
Vd = 5V
qjc = 22°C/W
Tchannel = 146°C
Id = 650mA
PD = 3.25W
Tbaseplate = 75°C
Thermal Resistance (qjc)
Under RF Drive
Vd = 5V
qjc = 22°C/W
Tchannel = 147°C
Id = 810mA
Pout = 29dBm
Pd = 3.3W
Tbaseplate = 85°C
2
MTTF vs. Tchannel Temperature
Operation
Tj
60% Confidence Level
90% Confidence Level
Point Data R=
λ (ФIT)
3511
1298
456
152
48
MTTF (hrs)
2.8E+05
7.7E+05
2.2E+06
6.6E+06
2.1E+07
7.0E+07
2.5E+08
9.9E+08
4.2E+09
1.9E+10
9.6E+10
λ (ФIT)
8822
3260
1147
382
120
36
MTTF (hrs)
λ (ФIT)
3831
1416
498
166
52
MTTF (Yrs)
2.6E+05
7.1E+05
2.0E+05
6.0E+06
1.9E+06
6.5E+07
2.3E+08
9.1E+08
3.8E+09
1.7E+10
8.8E+10
150
140
130
120
110
100
90
1.1E+05
3.1E+05
8.7E+05
2.6E+06
8.3E+06
2.8E+07
1.0E+08
3.9E+08
1.7E+09
7.6E+09
3.8E+10
14
15
4
10
4
80
1
3
1
70
0
1
0
60
0
0
0
50
0
0
0
[7,8,9]
RF Specifications
T = 25°C, V = 5V, I
= 650mA, Z =50Ω
o
A
dd
d(Q)
Symbol
Freq
Parameters and Test Conditions
Operational Frequency
Units
GHz
dB
Minimum
Typical
Maximum
6
18
Gain
Small-signal Gain S21[9,10]
16
26
19
29
P-1dB
Output Power at 1dB [9,10]
Gain Compression[8]
dBm
P-3dB
OIP3
RLin
Output Power at 3dB
Gain Compression[9]
dBm
dBm
29.5
38
Third Order Intercept Point;
∆f=10MHz; Pin=-20dBm
Input Return Loss[8]
Output Return Loss[8]
Reverse Isolation
dB
dB
dB
3
RLout
9
Isolation
Notes:
45
7. Small/Large -signal data measured in packaged form on a 2.4mm connecter based evaluation board at TA = 25°C.
8. This final package part performance is verified by a functional test correlated to actual performance at one or more frequencies
9. Pre-assembly into package performance verified 100% on-wafer published specifications at Frequencies=8, 12, and 17GHz
3
Typical Performances
Data obtained from 3.5-mm connector based test fixture, and this data is including connecter loss, and board loss.
(TA = 25°C, Vdd =5 V, Idq = 650 mA, Zin = Zout = 50Ω)
40
35
30
25
20
15
10
5
0
0
S21[dB]
S12[dB]
-20
-5
-10
-40
-60
-80
-15
-20
S11[dB]
S22[dB]
0
2
4
6
8
10
12
14 16
18
20
22
2
4
6
8
10 12 14 16 18 20 22
Frequency [GHz]
Frequency [GHz]
Figure ꢀ. Typical Gain and Reverse Isolation
Figure 2. Typical Return Loss (Input and Output)
10
8
35
30
25
20
15
10
5
6
4
2
0
P-1 (dBm)
PAE[%]@P-1
P-3[dBm]
PAE[%]@P-3
0
6
7
8
9
10 11 12 13 14 15 16 17 18
Frequency [GHz]
4
6
8
10
12
14
16
18
20
Frequency [GHz]
Figure 3. Typical Output Power (@P-ꢀ, P-3) and PAE and Frequency
Figure 4. Typical Noise Figure
40
-24
-28
-32
-36
-40
-44
1000
Pout(dBm)
35
PAE[%]
30
900
Id(total)
25
20
800
15
10
700
5
0
600
4
6
8
10
12
14
16
18
20
-15
-10
-5
0
5
10
15
Pin [dBm]
Frequency [GHz]
Figure 5. Typical Output Power, PAE, and Total Drain Current versus
Input Power at 8GHz
Figure 6. Typical IM3 level vs. Frequency at +20dBm output single
carrier level (SCL)
4
0
-10
-20
-30
-40
-50
-60
-70
-80
900
850
800
750
700
650
600
550
500
0
-10
-20
-30
-40
-50
-60
-70
-80
900
850
800
750
700
650
600
550
500
IM3[dBc]
Ids[mA]
IM3[dBc]
Ids[mA]
4
6
8
10 12 14 16 18 20 22 24 26
SCL [dBm]
4
6
8
10 12 14 16 18 20 22 24 26
SCL [dBm]
Figure 7. Typical IM3 level and Ids vs. single carrier output level at 6GHz
Figure 8. Typical IM3 level and Ids vs. single carrier output level at 8GHz
0
-10
-20
-30
-40
-50
-60
-70
-80
900
850
800
750
700
650
600
550
500
0
-10
-20
-30
-40
-50
-60
-70
-80
900
850
800
750
700
650
600
550
500
IM3[dBc]
Ids[mA]
IM3[dBc]
Ids[mA]
4
6
8
10 12 14 16 18 20 22 24 26
SCL [dBm]
4
6
8
10 12 14 16 18 20 22 24 26
SCL [dBm]
Figure 9. Typical IM3 level and Ids vs. single carrier output level at ꢀ2GHz
Figure ꢀ0. Typical IM3 level and Ids vs. single carrier output level at ꢀ4GHz
0
-10
-20
-30
-40
-50
-60
-70
-80
900
850
800
750
700
650
600
550
500
0
-10
-20
-30
-40
-50
-60
-70
-80
900
850
800
750
700
650
600
550
500
IM3[dBc]
Ids[mA]
IM3[dBc]
Ids[mA]
4
6
8
10 12 14 16 18 20 22 24 26
SCL [dBm]
4
6
8
10 12 14 16 18 20 22 24 26
SCL [dBm]
Figure ꢀꢀ. Typical IM3 level and Ids vs. single carrier output level at ꢀ6GHz
Figure ꢀ2. Typical IM3 level and Ids vs. single carrier output level at ꢀ8GHz
5
25
20
15
10
5
0
-5
-10
-15
S11_20
S11_-40
S11_85
S21_20
S21_-40
S21_85
-20
-25
0
5
10
15
20
25
4
6
8
10
12
14
16
18
20
Frequency[GHz]
Frequency[GHz]
Figure ꢀ3. Typical Sꢀꢀ over temperature
Figure ꢀ4. Typical Gain over temperature
32
30
28
26
0
-5
-10
-15
S22_20
24
P- 1_85deg
S22_-40
-20
P- 1_20deg
22
P- 1_-40deg
S22_85
-25
20
4
6
8
10
12
14
16
18
20
0
5
10
15
20
25
Frequency[GHz]
Frequency[GHz]
Figure ꢀ5. Typical S22 over temperature
Figure ꢀ6. Typical P-ꢀ over temperature
6
[ꢀ]
Typical Scattering Parameters ,
(TA = 25°C, V =5 V, I = 650mA, Z = Z = 50Ω)
dd
dq
in
out
Sꢀꢀ
S2ꢀ
Mag
Sꢀ2
S22
Freq
[GHz] dB
Mag
0.89
0.84
0.83
0.79
0.76
0.76
0.76
0.78
0.83
0.87
0.85
0.73
0.50
0.27
0.17
0.37
0.62
0.69
0.26
0.47
0.68
0.77
0.84
0.92
0.94
Phase
dB
Phase
dB
Mag
Phase
dB
Mag
0.92
0.89
0.83
0.86
0.61
0.36
0.56
0.57
0.49
0.41
0.29
0.31
0.49
0.45
0.29
0.08
0.22
0.28
0.41
0.80
0.85
0.85
0.85
0.85
0.88
Phase
-51.38
-106.38
-148.41
149.67
102.57
101.45
91.13
1
-0.98
-80.89 -26.63 0.05
-142.21 -12.58 0.23
173.02 -13.18 0.22
-149.73
117.14
-55.39
109.98
-10.22
-132.19
120.64
33.98
-66.01 5.01E-04 82.37
-54.78 1.82E-03 -62.88
-56.68 1.47E-03 73.25
-57.34 1.36E-03 -176.84
-56.51 1.49E-03 82.87
-54.26 1.94E-03 -4.69
-53.94 2.01E-03 -93.95
-53.73 2.06E-03 -175.11
-52.62 2.34E-03 112.21
-50.54 2.97E-03 55.24
-48.56 3.73E-03 -2.84
-45.36 5.40E-03 -66.52
-44.34 6.06E-03 -135.27
-44.63 5.87E-03 150.30
-43.78 6.47E-03 70.74
-43.20 6.92E-03 -13.73
-43.60 6.61E-03 -101.77
-45.33 5.41E-03 141.97
-42.29 7.68E-03 -60.99
-48.32 3.84E-03 177.93
-58.04 1.25E-03 133.54
-60.28 9.69E-04 -167.20
-53.26 2.17E-03 152.87
-52.33 2.42E-03 100.99
-55.59 1.66E-03 64.13
-0.74
-1.05
-1.66
-1.30
-4.28
-8.91
-5.09
-4.94
-6.24
-7.78
-10.88
-10.09
-6.12
-6.84
-10.65
-21.50
-13.30
-11.09
-7.67
-1.90
-1.44
-1.43
-1.43
-1.40
-1.09
2
-1.53
-1.65
-2.03
-2.34
-2.35
-2.36
-2.14
-1.63
-1.22
-1.36
-2.70
-6.06
-11.40
-15.19
-8.74
-4.18
-3.28
-11.87
-6.57
-3.36
-2.30
-1.56
-0.68
-0.50
3
4
136.42 -7.96
112.17 10.21
0.40
3.24
7.48
8.66
8.19
7.58
7.41
8.25
9.62
9.88
9.40
8.87
8.15
7.00
6.26
3.79
0.34
5
6
91.21
74.67
60.18
44.98
25.72
1.75
17.48
18.75
18.27
17.60
17.40
18.33
7
8
62.98
9
-40.91
-108.19
-174.84
109.90
28.25
45.08
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
32.69
28.56
-26.91 19.67
-57.44 19.89
-98.95 19.46
174.48 18.96
103.71 18.22
54.94
37.90
-52.18
-134.19
138.55
45.40
8.18
-14.37
-6.63
54.74
0.17
16.91
15.93
72.25
-57.17
147.53
26.24
34.37
-103.07 11.58
42.09 -9.31
109.95
48.19
-19.76 -24.98 0.06
-75.71 -26.16 0.05
-136.88 -31.52 0.03
171.66 -44.35 0.01
135.92 -54.20 0.00
49.50
12.31
-0.95
-20.28
-60.80
-112.04
-165.45
-94.80
154.42
113.23
Note:
1. This data represents package part performances, and does not contain test fixture losses.
7
Biasing and Operation
The recommended quiescent DC bias condition for
The differential voltage between the Det-Ref and Det-Out
pads can be correlated with the RF power emerging from
the RF output port. The detected voltage is given by,
optimum efficiency, performance, and reliability is V =5
dd
volts with V set for I =650 mA. Minor improvements in
g
dd
performance are possible depending on the application.
The drain bias voltage range is 3 to 5V. A single DC gate
supply connected to Vg will bias all gain stages. Muting
can be accomplished by setting Vgg to the pinch-off
V = (V - V ) - V
ofs
ref
det
where V is the voltage at the DET_R port, V is a
ref
det
voltage at the DET_O port, V and is the zero-input-
power offset voltage. There are three methods to
ofs
voltage V .
p
calculate V
:
A simplified schematic for the AMMC6408 MMIC die is
shown in Figure 17. The MMIC die contains ESD and over
ofs
1. V
can be measured before each detector
ofs
voltage protection diodes for V , Vd1, and Vd2 terminals.
g
measurement (by removing or switching off the
power source and measuring V - V ). This method
In a finalized package form, Vd1 and Vd2 terminals are
ref
det
commonly connected to the V terminal. The bonding
dd
gives an error due to temperature drift of less than
0.01dB/50°C.
diagram for the recommended assembly is shown in
Figure 18. ESD diodes protect all possible ESD or over
2. V
can be measured at
a single reference
ofs
voltage damages between V and ground, V and V ,
gg
gg
dd
temperature. The drift error will be less than 0.25dB.
V
dd
and ground. Typical ESD diode current versus diode
voltage for 11-connected diodes in series is shown in
Figure 19. Under the recommended DC quiescent biasing
condition at V =5V, I =650mA, V =-1V, typical gate
3. V can either be characterized over temperature and
ofs
stored in a lookup table, or it can be measured at two
temperatures and a linear fit used to calculate V at
ds
ds
gg
ofs
terminal current is approximately 0.3mA. If an active
biasing technique is selected for the AMMC6408 MMIC
PA DC biasing, the active biasing circuit must have more
than 10-times higher internal current that the gate
terminal current.
any temperature. This method gives an error close to
the method #1.
The RF ports are AC coupled at the RF input to the first
stage and the RF output of the final stage. No ground
wires are needed since ground connections are made
with plated through-holes to the backside of the device.
An optional output power detector network is also
provided.
A
typical measured detector voltage
versus output power at 18GHz is shown Figure 20.
8
50
Vd1
Vg
DQ
Vd 2
DET_O
50
50
800 μm
50
800μm
6.5μm
10K
200
1K
RFin
RFout
50
50
800μm
10K
800μm
200
50
6.5μm
DQ
DET_R
Vd 2
50
Vd1
Vg
Figure ꢀ7. Simplified schematic for the MMIC die
9
Figure ꢀ8. AMMC-6408 Bonding Pad Locations
20
0.45
0.4
1
|Icomp(I_METER.AMP1,0)| (mA)
Diode_current
18
16
0.35
0.3
14
12
10
0.25
0.2
0.1
8
6
0.15
0.1
0.05
0
4
2
0
0.01
5
5.5
6
6.5
7
7.5
8
5
10
15
20
25
30
35
Pout[dBm]
Voltage (V)
Figure ꢀ9. Typical ESD diode current versus diode voltage for ꢀꢀ-connected
diodes in series
Figure 20. Typical Detector Voltage and Output Power, Freq=ꢀ8GHz
10
5nH = ~ 10 mil length gold wire bond (0.7 to 1 mil diameter)
Figure 2ꢀ. AMMC-6408 Bonding Diagram
Ordering Information:
AMMC-6408-W10 = 10 devices per tray
AMMC-6408-W50 = 50 devices per tray
11
Names and Contents of the Toxic and Hazardous Substances or Elements in the Products
Toxic and Hazardous Substances or Elements
Part Name
Mercury
(Hg)
Hg
Cadmium
(Cd)
Cd
Hexavalent
(Cr(VI))
Polybrominated
biphenyl (PBB)
PBB
Lead
(Pb)
(Pb)
Polybrominated
diphenylether (PBDE)
PBDE
Cr(VI)
100pF capacitor
: indicates that the content of the toxic and hazardous substance in all the homogeneous materials of the part is
below the concentration limit requirement as described in SJ/T 11363-2006.
: indicates that the content of the toxic and hazardous substance in at least one homogeneous material of the part
exceeds the concentration limit requirement as described in SJ/T 11363-2006.
(The enterprise may further explain the technical reasons for the “x” indicated portion in the table in accordance with
the actual situations.)
SJ/T 11363-2006
SJ/T 11363-2006
“×”
Note: EU RoHS compliant under exemption clause of “lead in electronic ceramic parts (e.g. piezoelectronic devices)”
For product information and a complete list of distributors, please go to our web site: www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.
Data subject to change. Copyright © 2005-2011 Avago Technologies. All rights reserved.
AV02-0667EN - December 16, 2011
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SI9137LG
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SI9122E
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