TISP44095M3BJR-S [BOURNS]
Trigger Device;
| 型号： | TISP44095M3BJR-S |
| 厂家： | 
BOURNS ELECTRONIC SOLUTIONS |
| 描述： | Trigger Device |
| 文件： | 总12页 (文件大小：627K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
T
TISP4070M3BJ THRU TISP4115M3BJ,
TISP4125M3BJ THRU TISP4220M3BJ,
TISP4240M3BJ THRU TISP4400M3BJ
N
A
I
L
P
M
O
C
S
H
o
R
*
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
TISP4xxxM3BJ Overvoltage Protector Series
ITU-T K.20/21/44/45 rating ................ 4 kV 10/700, 100 A 5/310
SMBJ Package (Top View)
Ion-Implanted Breakdown Region
Precise and Stable Voltage
Low Voltage Overshoot under Surge
T(A)
2
R(B) 1
V
V
DRM
(BO)
Device
V
V
MDXXBGE
‘4070
‘4080
‘4095
‘4115
‘4125
‘4145
‘4165
‘4180
‘4200
‘4220
‘4240
‘4250
‘4265
‘4290
‘4300
‘4350
‘4360
‘4395
‘4400
58
65
75
90
70
80
95
Device Symbol
T
115
125
145
165
180
200
220
240
250
265
290
300
350
360
395
400
100
120
135
145
155
160
180
190
200
220
230
275
290
320
300
SD4XAA
R
T
erminals T and R correspond to the
alternative line designators of A and B
I
TSP
A
Wave Shape
Standard
2/10 µs
8/20 µs
GR-1089-CORE
IEC 61000-4-5
FCC Part 68
300
220
120
100
75
10/160 µs
10/700 µs
10/560 µs
10/1000 µs
Low Differential Capacitance ................................. 39 pF max.
ITU-T K.20/21/45
FCC Part 68
®
............................................ UL Recognized Component
GR-1089-CORE
50
Description
These devices are designed to limit overvoltages on the telephone line. Overvoltages are normally caused by a.c. power system or lightning
flash disturbances which are induced or conducted on to the telephone line. A single device provides 2-point protection and is typically used
for the protection of 2-wire telecommunication equipment (e.g. between the Ring and Tip wires for telephones and modems). Combinations of
devices can be used for multi-point protection (e.g. 3-point protection between Ring, Tip and Ground).
The protector consists of a symmetrical voltage-triggered bidirectional thyristor. Overvoltages are initially clipped by breakdown clamping until
the voltage rises to the breakover level, which causes the device to crowbar into a low-voltage on state. This low-voltage on state causes the
current resulting from the overvoltage to be safely diverted through the device. The high crowbar holding current prevents d.c. latchup as the
diverted current subsides.
How To Order
Order As
Embossed Tape Reeled TISP4xxxM3BJR-S
Device
Package
Carrier
TISP4xxxM3BJ BJ (J-Bend DO-214AA/SMB)
Insert xxx value corresponding to protection voltages of 070, 080, 095, 115, etc.
*RoHS Directive 2002/95/EC Jan 27 2003 including Annex
NOVEMBER 1997 - REVISED MAY 2007
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP4xxxM3BJ Overvoltage Protector Series
Description (continued)
The TISP4xxxM3BJ range consists of nineteen voltage variants to meet various maximum system voltage levels (58 V to 320 V). They are
guaranteed to voltage limit and withstand the listed international lightning surges in both polarities. These medium (M) current protection
devices are in a plastic package SMBJ (JEDEC DO-214AA with J-bend leads) and supplied in embossed tape reel pack. For alternative
voltage and holding current values, consult the factory. For higher rated impulse currents in the SMB package, the 100 A 10/1000
TISP4xxxH3BJ series is available.
Absolute Maximum Ratings, T = 25 °C (Unless Otherwise Noted)
A
Rating
Symbol
Value
± 58
Unit
‘4070
‘4080
‘4095
‘4115
‘4125
‘4145
‘4165
‘4180
‘4200
‘4220
‘4240
‘4250
‘4265
‘4290
‘4300
‘4350
‘4360
‘4395
‘4400
± 65
± 75
± 90
±100
±120
±135
±145
±155
±160
±180
±190
±200
±220
±230
±275
±290
±320
±300
Repetitive peak off-state voltage, (see Note 1)
V
V
DRM
Non-repetitive peak on-state pulse current (see Notes 2, 3 and 4)
2/10 µs (GR-1089-CORE, 2/10 µs voltage wave shape)
300
220
120
110
100
100
100
75
8/20 µs (IEC 61000-4-5,combination wave generator, 1.2/50 voltage, 8/20 current)
10/160 µs (FCC Part 68, 10/160 µs voltage wave shape)
5/200 µs (VDE 0433, 10/700 µs voltage wave shape)
0.2/310 µs (I3124, 0.5/700 µs voltage wave shape)
5/310 µs (ITU-T K.20/21/45, K.44 10/700 µs voltage wave shape)
5/310 µs (FTZ R12, 10/700 µs voltage wave shape)
10/560 µs (FCC Part 68, 10/560 µs voltage wave shape)
10/1000 µs (GR-1089-CORE, 10/1000 µs voltage wave shape)
Non-repetitive peak on-state current (see Notes 2, 3 and 5)
20 ms (50 Hz) full sine wave
I
A
TSP
50
30
32
16.7 ms (60 Hz) full sine wave
I
A
TSM
1000 s 50 Hz/60 Hz a.c.
2.1
Initial rate of rise of on-state current, Exponential current ramp, Maximum ramp value < 100 A
Junction temperature
di /dt
300
A/µs
°C
T
T
-40 to +150
-65 to +150
J
Storage temperature range
T
°C
stg
NOTES: 1. See Applications Information and Figure 11 for voltage values at lower temperatures.
2. Initially,the TISP4xxxM3BJ must be in thermal equilibrium with T = 25 °C.
J
3. The surge may be repeated after the TISP4xxxM3BJ returns to its initial conditions.
4. See Applications Information and Figure 12 for current ratings at other temperatures.
5. EIA/JESD51-2 environment and EIA/JESD51-3 PCB with standard footprint dimensions connected with 5 A rated printed wiring
track widths. See Figure 9 for the current ratings at other durations. Derate current values at -0.61 %/°C for ambient temperatures
above 25 ° C.
NOVEMBER 1997 - REVISED MAY 2007
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP4xxxM3BJ Overvoltage Protector Series
Electrical Characteristics, T = 25 °C (Unless Otherwise Noted)
A
Parameter
Test Conditions
Min
Typ
Max
±5
Unit
Repetitive peak off-
state current
T = 25 °C
A
I
V
= V
DRM
µA
DRM
D
T = 85 °C
±10
A
‘4070
‘4080
‘4095
‘4115
‘4125
‘4145
‘4165
‘4180
‘4200
‘4220
‘4240
‘4250
‘4265
‘4290
‘4300
‘4350
‘4360
‘4395
±70
±80
±95
±115
±125
±145
±165
±180
±200
±220
±240
±250
±265
±290
±300
±350
±360
±395
±400
±78
V
Breakover voltage
dv/dt = ±250 V/ms,
R
= 300 Ω
SOURCE
V
(BO)
‘4400 ±342
‘4070
‘4080
‘4095
‘4115
‘4125
‘4145
‘4165
‘4180
‘4200
‘4220
‘4240
‘4250
‘4265
‘4290
‘4300
‘4350
‘4360
‘4395
‘4400
±0.15
±88
±102
±122
±132
±151
±171
±186
±207
±227
±247
±257
±272
±298
±308
±359
±370
±405
±410
±0.6
±3
dv/dt ≤ ±1000 V/µs, Linear voltage ramp,
Maximum ramp value = ±500 V
Impulse breakover
voltage
V
V
(BO)
di/dt = ±20 A/µs, Linear current ramp,
Maximum ramp value = ±10 A
I
Breakover current
On-state voltage
Holding current
dv/dt = ±250 V/ms,
R
= 300 Ω
SOURCE
A
V
A
(BO)
V
I
I
= ±5 A, t = 100 µs
W
= ±5 A, di/dt = +/-30 mA/ms
T
T
T
I
±0.15
±5
±0.35
H
Critical rate of rise of
off-state voltage
Off-state current
dv/dt
Linear voltage ramp, Maximum ramp value < 0.85V
kV/µs
DRM
I
V
= ±50 V
T = 85 °C
±10
µ
A
D
D
A
NOVEMBER 1997 - REVISED MAY 2007
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP4xxxM3BJ Overvoltage Protector Series
Electrical Characteristics, T = 25 °C (Unless Otherwise Noted)
A
Parameter
Test Conditions
f = 1 MHz, V = 1 V rms, V = 0,
Min
Typ
83
62
50
78
56
45
72
52
42
36
26
19
21
15
Max
100
74
60
94
67
54
87
62
50
44
31
22
25
18
Unit
4070 thru ‘4115
‘4125 thru ‘4220
‘4240 thru ‘4400
‘4070 thru ‘4115
‘4125 thru ‘4220
‘4240 thru ‘4400
‘4070 thru ‘4115
‘4125 thru ‘4220
‘4240 thru ‘4400
‘4070 thru ‘4115
‘4125 thru ‘4220
‘4240 thru ‘4400
‘4125 thru ‘4220
‘4240 thru ‘4400
d
D
f = 1 MHz, V = 1 V rms, V = -1 V
d
D
f = 1 MHz, V = 1 V rms, V = -2 V
d
D
C
Off-state capacitance
pF
off
f = 1 MHz, V = 1 V rms, V = -50 V
d
D
f = 1 MHz, V = 1 V rms, V = -100 V
d
D
(see Note 6)
NOTE 6: To avoid possible voltage clipping, the ‘4125 is tested with V = -98 V.
D
Thermal Characteristics
Parameter
Test Conditions
EIA/JESD51-3 PCB, I = I
Min
Typ
Max
Unit
,
TSM(1000)
T
115
T = 25 °C, (see Note 7)
A
RθJA
Junction to free air thermal resistance
°C/W
265 mm x 210 mm populated line card,
4-layer PCB, I = I , T = 25 °C
52
T
TSM(1000)
A
NOTE 7: EIA/JESD51-2 environment and PCB has standard footprint dimensions connected with 5 A rated printed wiring track widths.
NOVEMBER 1997 - REVISED MAY 2007
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP4xxxM3BJ Overvoltage Protector Series
Parameter Measurement Information
+i
Quadrant I
Switching
ITSP
Characteristic
ITSM
IT
V
(BO)
VT
I(BO)
IH
IDRM
ID
VDRM
VD
+v
-v
ID
VD
VDRM
IDRM
IH
I(BO)
VT
V(BO)
IT
ITSM
I
Quadrant III
ITSP
Switching
Characteristic
-i
PMXXAAB
Figure 1. Voltage-Current Characteristic for T and R Terminals
All Measurements are Referenced to the R Terminal
NOVEMBER 1997 - REVISED MAY 2007
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP4xxxM3BJ Overvoltage Protector Series
Typical Characteristics
NORMALIZED BREAKOVER VOLTAGE
OFF-STATE CURRENT
vs
JUNCTION TEMPERATURE
vs
JUNCTION TEMPERATURE
TC4MAF
TCMAG
1.10
100
VD = ±50 V
10
1.05
1
0·1
1.00
0·01
0.95
0·001
-25
0
25
50
75
100 125 150
-25
0
25
50
75
100
125
150
TJ - Junction Temperature - °C
T - JunctionTemperature- °C
J
Figure 3.
Figure 2.
ON-STATE CURRENT
vs
ON-STATE VOLTAGE
NORMALIZED HOLDING CURRENT
vs
JUNCTION TEMPERATURE
TC4MAD
2.0
1.5
TC4MACA
100
70
TA = 25 °C
tW = 100 µs
50
40
30
20
15
1.0
0.9
10
7
0.8
0.7
'4125
THRU
'4200
5
4
0.6
0.5
3
'4240
THRU
'4400
'4070
THRU
'4115
2
1.5
0.4
1
0.7
-25
0
25
50
75
100 125 150
1
1.5
2
3 1
4
5
7
10
T - Junction Temperature - °C
J
VT - On-State Voltage - V
Figure 5.
Figure 4.
NOVEMBER 1997 - REVISED MAY 2007
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP4xxxM3BJ Overvoltage Protector Series
Typical Characteristics
DIFFERENTIAL OFF-STATE CAPACITANCE
NORMALIZED CAPACITANCE
vs
vs
RATED REPETITIVE PEAKOFF-STATE VOLTAGE
OFF-STATE VOLTAGE
TC4MABB
TCMAEB
1
40
0.9
T =
25 °C
J
0.8
0.7
Vd = 1 Vrms
35
0.6
0.5
∆C = Coff(-2V) - Coff (-50 V)
'4070 THRU '4115
30
0.4
0.3
'4125 THRU '4220
25
20
'4240 THRU '4400
0.2
0.5
1
2
3
5
10
20 30 50 100 150
50 60 70 80 90 100
150
200 250 300 350
VD - Off-state Voltage - V
VDRM - Repetitive Peak Off-StateVoltage - V
Figure 6.
Figure 7.
TYPICAL CAPACITANCE ASYMMETRY
vs
OFF-STATE VOLTAGE
TC4XBB
3
2
1
0
Vd = 10 mVrms, 1 MHz
Vd = 1 Vrms, 1 MHz
0.5 0.7
1
2
3
4 5
7
10
20 30 4050
VD — Off-State Voltage — V
Figure 8.
NOVEMBER 1997 - REVISED MAY 2007
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP4xxxM3BJ Overvoltage Protector Series
Rating and Thermal Information
THERMALIMPEDANCE
vs
NON-REPETITIVE PEAK ON-STATE CURRENT
vs
POWER DURATION
CURRENT DURATION
TI4MAE
TI4MAC
150
30
VGEN = 600 Vrms, 50/60 Hz
RGEN = 1.4*VGEN /ITSM(t)
100
90
20
15
80
EIA/JESD51-2 ENVIRONMENT
EIA/JESD51-3 PCB
TA = 25 °C
70
60
50
40
10
9
30
8
7
6
20
15
5
4
10
9
ITSM(t) APPLIED FOR TIME t
3
EIA/JESD51-2 ENVIRONMENT
EIA/JESD51-3 PCB
TA = 25 °C
8
7
6
5
2
4
0·1
1.5
0·1
1
10
100
1000
1
10
100
1000
t - PowerDuration - s
Figure 10.
t - Current Duration - s
Figure 9.
IMPULSE RATING
vs
AMBIENT TEMPERATURE
VDRM DERATING FACTOR
vs
TC4MAA
MINIMUMAMBIENT TEMPERATURE
TI4MADA
400
1.00
0.99
0.98
0.97
0.96
0.95
0.94
0.93
BELLCORE 2/10
300
250
IEC 1.2/50, 8/20
'4125 THRU '4200
200
150
120
FCC 10/160
100
90
80
ITU-T10/700
FCC 10/560
70
'4070 THRU '4115
60
50
40
'4240 THRU '4400
BELLCORE 10/1000
-40 -30 -20 -10
0
10 20 30 40 50 60 70 80
-40 -35 -30 -25 -20 -15 -10 -5
0
5
10 15 20 25
T - Ambient Temperature - °C
A
TAMIN - Minimum Ambient Temperature - °C
Figure 12.
Figure 11.
NOVEMBER 1997 - REVISED MAY 2007
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP4xxxM3BJ Overvoltage Protector Series
APPLICATIONS INFORMATION
Deployment
These devices are two terminal overvoltage protectors. They may be used either singly to limit the voltage between two conductors (Figure 13)
or in multiples to limit the voltage at several points in a circuit (Figure 14).
Th3
Th1
Th1
Th2
Figure 14. Multi-Point Protection
In Figure 13, protector Th1 limits the maximum voltage between the two conductors to ±V . This configuration is normally used to protect
Figure 13. Two Point Protection
(BO)
circuits without a ground reference, such as modems. In Figure 14, protectors Th2 and Th3 limit the maximum voltage between each conduc-
tor and ground to the ±V of the individual protector. Protector Th1 limits the maximum voltage between the two conductors to its ±V
(BO)
(BO)
value. If the equipment being protected has all its vulnerable components connected between the conductors and ground, then protector Th1
is not required.
Impulse Testing
To verify the withstand capability and safety of the equipment, standards require that the equipment is tested with various impulse wave forms.
The table below shows some common values.
Voltage
Peak Voltage
Setting
V
Peak Current
Current
TISP4XXXM3
25 °C Rating
A
Series
Standard
Value
A
Wave Shape
Resistance
Wave Shape
2500
1000
1500
800
2/10
500
100
200
100
37.5
25
2/10
300
50
GR-1089-CORE
11
10/1000
10/160
10/560
9/720 †
9/720 †
0.5/700
10/1000
10/160
10/560
5/320 †
5/320 †
0.2/310
120
75
2x5.6
FCC Part 68
(March 1998)
3
0
0
0
1500
1000
1500
1500
4000
100
100
100
I3124
37.5
37.5
100
ITU-T K.20/K.21
10/700
5/310
100
0
† FCC Part 68 terminology for the waveforms produced by the ITU-T recommendation K.21 10/700 impulse generator
If the impulse generator current exceeds the protector’s current rating, then a series resistance can be used to reduce the current to the
protector’s rated value to prevent possible failure. The required value of series resistance for a given waveform is given by the following
calculations. First, the minimum total circuit impedance is found by dividing the impulse generator’s peak voltage by the protector’s rated
current. The impulse generator’s fictive impedance (generator’s peak voltage divided by peak short circuit current) is then subtracted from the
minimum total circuit impedance to give the required value of series resistance.
For the FCC Part 68 10/560 waveform, the following values result. The minimum total circuit impedance is 800/75 = 10.7 Ω and the generator’s
fictive impedance is 800/100 = 8 Ω. This gives a minimum series resistance value of 10.7 - 8 = 2.7 Ω. After allowing for tolerance, a 3 Ω ±10%
resistor would be suitable. The 10/160 waveform needs a standard resistor value of 5.6 Ω per conductor. These would be R1a and R1b in
Figure 16 and Figure 17. FCC Part 68 allows the equipment to be non-operational after the 10/160 (conductor to ground) and 10/560 (inter-
conductor) impulses. The series resistor value may be reduced to zero to pass FCC Part 68 in a non-operational mode, e.g. Figure 15. For this
2
2
type of design, the series fuse must open before the TISP4xxxM3 fails. For Figure 15, the maximum fuse i t is 2.3 A s. In some cases, the
equipment will require verification over a temperature range. By using the rated waveform values from Figure 12, the appropriate series resistor
value can be calculated for ambient temperatures in the range of -40 °C to 85 °C.
NOVEMBER 1997 - REVISED MAY 2007
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP4xxxM3BJ Overvoltage Protector Series
AC Power Testing
The protector can withstand currents applied for times not exceeding those shown in Figure 9. Currents that exceed these times must be
terminated or reduced to avoid protector failure. Fuses, PTC (Positive Temperature Coefficient) thermistors and fusible resistors are overcurrent
protection devices which can be used to reduce the current flow. Protective fuses may range from a few hundred milliamperes to one ampere.
In some cases, it may be necessary to add some extra series resistance to prevent the fuse opening during impulse testing. The current versus
time characteristic of the overcurrent protector must be below the line shown in Figure 9. In some cases, there may be a further time limit
imposed by the test standard (e.g. UL 1459 wiring simulator failure).
Capacitance
The protector characteristic off-state capacitance values are given for d.c. bias voltage, V , values of 0, -1 V, -2 V and -50 V. Where possible
D
values are also given for -100 V. Values for other voltages may be calculated by multiplying the V = 0 capacitance value by the factor given in
D
Figure 6. Up to 10 MHz, the capacitance is essentially independent of frequency. Above 10 MHz, the effective capacitance is strongly
dependent on connection inductance. In many applications, such as Figure 16 and Figure 18, the typical conductor bias voltages will be about
-2 V and -50 V. Figure 7 shows the differential (line unbalance) capacitance caused by biasing one protector at -2 V and the other at -50 V.
Figure 8 shows the typical capacitance asymmetry; the difference between the capacitance measured with a positive value of V and the
D
capacitance value when the polarity of V is reversed. Capacitance asymmetry is an important parameter in ADSL systems where the
D
protector often has no d.c. bias and the signal level is in the region of ±10 V.
Normal System Voltage Levels
The protector should not clip or limit the voltages that occur in normal system operation. For unusual conditions, such as ringing without the
line connected, some degree of clipping is permissible. Under this condition, about 10 V of clipping is normally possible without activating the
ring trip circuit.
Figure 11 allows the calculation of the protector V
maximum normal system voltages. The TISP4265M3BJ, with a V
DRM
100 V rms of ring on a battery voltage of -58 V (Th2 and Th3 in Figure 18). The peak ring voltage will be 58 + 1.414*100 = 199.4 V. However,
this is the open circuit voltage and the connection of the line and its equipment will reduce the peak voltage. In the extreme case of an
unconnected line, clipping the peak voltage to 190 V should not activate the ring trip. This level of clipping would occur at the temperature
value at temperatures below 25 °C. The calculated value should not be less than the
of 200 V, can be used for the protection of ring generators producing
DRM
when the V
has reduced to 190/200 = 0.95 of its 25 °C value. Figure 11 shows that this condition will occur at an ambient temperature of
DRM
-28 °C. In this example, the TISP4265M3BJ will allow normal equipment operation provided that the minimum expected ambient temperature
does not fall below -28 °C.
JESD51 Thermal Measurement Method
To standardize thermal measurements, the EIA (Electronic Industries Alliance) has created the JESD51 standard. Part 2 of the standard
3
3
(JESD51-2, 1995) describes the test environment. This is a 0.0283 m (1 ft ) cube which contains the test PCB (Printed Circuit Board)
horizontally mounted at the center. Part 3 of the standard (JESD51-3, 1996) defines two test PCBs for surface mount components; one for
packages smaller than 27 mm on a side and the other for packages up to 48 mm. The SMBJ measurements used the smaller 76.2 mm x
114.3 mm (3.0 “ x 4.5 “) PCB. The JESD51-3 PCBs are designed to have low effective thermal conductivity (high thermal resistance) and
represent a worst case condition. The PCBs used in the majority of applications will achieve lower values of thermal resistance, and can
dissipate higher power levels than indicated by the JESD51 values.
NOVEMBER 1997 - REVISED MAY 2007
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP4xxxM3BJ Overvoltage Protector Series
Typical Circuits
MODEM
TIP
RING
WIRE
FUSE
R1a
RING DETECTOR
HOOK SWITCH
D.C. SINK
Th3
Th2
PROTECTED
EQUIPMENT
Th1
E.G. LINE CARD
TISP4350
SIGNAL
R1b
RING
WIRE
AI6XBK
TIP
AI6XBMA
Figure 15. Modem Inter-Wire Protection
R1a
Figure 16. PROTECTION MODULE
Th3
Th2
SIGNAL
Th1
R1b
AI6XBL
D.C.
Figure 17. ISDN Protection
OVER-
CURRENT
PROTECTION
SLIC
PROTECTION
RING/TEST
PROTECTION
TEST
RELAY
RING
RELAY
SLIC
RELAY
TIP
WIRE
S3a
R1a
Th4
Th3
S1a
S2a
SLIC
Th1
Th2
Th5
R1b
RING
WIRE
S3b
TISP6xxxx,
TISPPBLx,
TISP6NTP2
S1b
S2b
VBAT
C1
220 nF
TEST
EQUIP-
MENT
RING
GENERATOR
AI6XBJ
Figure 18. Line Card Ring/Test Protection
NOVEMBER 1997 - REVISED MAY 2007
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP4xxxM3BJ Overvoltage Protector Series
Device Symbolization Code
Devices will be coded as below. As the device parameters are symmetrical, terminal 1 is not identified.
Symbolization
Device
Code
TISP4070M3BJ
TISP4080M3BJ
TISP4095M3BJ
TISP4115M3BJ
TISP4125M3BJ
TISP4145M3BJ
TISP4165M3BJ
TISP4180M3BJ
TISP4200M3BJ
TISP4220M3BJ
TISP4240M3BJ
TISP4250M3BJ
TISP4265M3BJ
TISP4290M3BJ
TISP4300M3BJ
TISP4350M3BJ
TISP4360M3BJ
TISP4395M3BJ
TISP4400M3BJ
4070M3
4080M3
4095M3
4115M3
4125M3
4145M3
4165M3
4180M3
4200M3
4220M3
4240M3
4250M3
4265M3
4290M3
4300M3
4350M3
4360M3
4395M3
4400M3
“TISP” is a trademark of Bourns, Ltd., a Bourns Company, and is Registered in U.S. Patent and Trademark Office.
“Bourns” is a registered trademark of Bourns, Inc. in the U.S. and other countries.
NOVEMBER 1997 - REVISED MAY 2007
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
相关型号：
TISP44115M3BJR-S
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BOURNS
TISP44125F3LM-S
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BOURNS
TISP44125F3LMFR-S
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BOURNS
TISP44145M3BJR-S
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BOURNS
TISP44150F3LM-S
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BOURNS
TISP44150F3LMFR-S
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BOURNS
TISP44165H4BJ-S
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BOURNS
TISP44165M3BJR-S
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BOURNS
TISP44180F3LM-S
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BOURNS
TISP44180F3LMFR-S
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BOURNS
TISP44180F3LMR-S
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BOURNS
TISP44180H4BJ-S
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BOURNS
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