SN74S1051 [CALMIRCO]
12-BIT SCHOTTKY BARRIER DIODE BUS TERMINATOR; 12位肖特基势垒二极管总线端接
| 型号： | SN74S1051 |
| 厂家： | 
CALIFORNIA MICRO DEVICES CORP |
| 描述： | 12-BIT SCHOTTKY BARRIER DIODE BUS TERMINATOR |
| 文件： | 总2页 (文件大小：174K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CALIFORNIA MICRO DEVICES
SN 74S1051
12-BIT SCHOTTKY BARRIER DIODE BUS TERMINATOR
Features
Applications
24 integrated diodes in a single package
offers 12 channel, dual rail clamping action
Provides proper bus termination independent of
external line or card loading conditions
Schottky diode technology; excellent forward
voltage and reverse recovery characteristics
Enhanced performance over existing device
16-pin SOIC package
Local high speed bus termination for all popular
RISC and embedded microprocessor applications
High speed memory and SDRAM memory
bus termination
Product Description
Reflections on high speed data lines lead to undershoot and overshoot disturbances which may result in improper
system operation. Resistor terminations, when used to terminate high speed data lines, increase power consumption
and degrade output (high) levels resulting in reduced noise immunity. Schottky diode termination is the best overall
solution for applications in which power consumption and noise immunity are critical considerations.
This integrated Schottky diode network provides very effective termination performance for high speed data lines
under variable loading conditions. The device supports up to 12 terminated lines per package each of which can
be simultaneously clamped to both ground and power supply rail.
SCHEMATIC CONFIGURATION
VDD
1
VDD
16
D01 D02 D03 D04 D05 D06 D07 D08 D09 D10 D11 D12
10 11 12 13 14 15
2
3
4
5
6
7
8
9
GND
GND
©1998 California Micro Devices Corp. All rights reserved.
P/Active®isaregisteredtrademarkandPACisatrademark of California Micro Devices.
C0220298D
4 / 98
215 Topaz Street, Milpitas, California 95035
Tel: (408) 263-3214
Fax: (408) 263-7846
www.calmicro.com
1
SN 74S1051
CALIFORNIA MICRO DEVICES
STANDARD SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS
Parameter
Supply Voltage
Symbol
VDD
Rating
-0.3V to +7V
±50mA
0OC to 70OC
-65OC to +150OC
625mW, max.
Channel clamp current (continuous)
Operating Temperature
Storage Temperature
Iclamp
Tstg
Package Power Rating
The absolute maximum ratings are limiting values, to be applied individually, beyond which the device may be permanently damaged. Functional
operation under any of these conditions is not guaranteed. Exposing the device to its absolute maximum rating may
affect its reliability.
DIODE CHARACTERISTICS (TA = 0O to 70OC)
Parameter
Conditions
Min
Typ
Max
Diode foward voltage
To VDD
IF = 16 mA
IF = 50 mA
IF = 16 mA
IF = 50 mA
0.55V
0.55V 0.70V
0.50V
0.70V
0.90V
0.65V
0.85V
<400pS
5µA
From GND
0.50V 0.65V
Reverse Recovery Time (See Note 1) IF = 50mA (estimated)
Channel leakage
Input Capacitance
ESD Protection
0 ≤ VIN ≤ VDD
f = 1 MHz, VIN = 2.5V, TA = 25OC, VDD = 5.0V
MIL-STD-883, Method 3015
0.1µA
5pF
4KV
STANDARD PART ORDERING INFORMATION
Package
Pins
Ordering Part Number
Style
Tubes
Tape & Reel
Part Marking
SN 74S1051
16
SOIC Narrow
SN 74S1051/T
SN 74S1051/R
Note 1:
The test circuit depicts the Schottky diodes in their typical application. The impact of a reverse recovery time is measured
using a narrow pulse with 670- pS rise and fall times. This pulse propagates down a 60 cm, 54 ohm strip line fabricated
on a multi-layer, controlled impedance printed circuit board. In testing the ground clamp diode, the negative going edge
of the pulse causes a reflection which forces the diode under test to become forward biased. The positive going edge of
the pulse attempts to pull this diode out of forward conduction. A reverse recovery phenomenon would cause a delay
between the known arrival time of the positive edge and the observed edge due to the time it takes for the forward biased
diode to actually become reversed biased. In this measurement, however, there is no observable difference and therefore
no delay for the positive edge due to the presence of the diode. The waveforms are adjusted to individually test the
ground and VDD clamps. See test circuit.
VDD
ABT16244A
Z0, L
Diode
under
test
Pulse
Generator
Test Circuit. Line length, pulse width and duty cycle are selected such as that only one reflection is involved
in the measurement.
©1998 California Micro Devices Corp. All rights reserved.
4 / 98
2
215 Topaz Street, Milpitas, California 95035
Tel: (408) 263-3214
Fax: (408) 263-7846
www.calmicro.com
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