PC2708TB [CELDUC]

BIPOLAR ANALOG INTEGRATED CIRCUITS;
PC2708TB
型号: PC2708TB
厂家: celduc-relais    celduc-relais
描述:

BIPOLAR ANALOG INTEGRATED CIRCUITS

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DATA SHEET  
BIPOLAR ANALOG INTEGRATED CIRCUITS  
PC2709TB  
5 V, SUPER MINIMOLD SILICON MMIC  
MEDIUM OUTPUT POWER AMPLIFIER  
DESCRIPTION  
The PC2709TB is a silicon monolithic integrated circuits designed as 1st IF amplifier for DBS tuners. This IC is  
packaged in super minimold package which is smaller than conventional minimold.  
The PC2709TB has compatible pin connections and performance to PC2709T of conventional minimold  
version. So, in the case of reducing your system size, PC2709TB is suitable to replace from PC2709T.  
These IC is manufactured using NEC’s 20 GHz fT NESAT™III silicon bipolar process. This process uses silicon  
nitride passivation film and gold electrodes. These materials can protect chip surface from external pollution and  
prevent corrosion/migration. Thus, this IC has excellent performance, uniformity and reliability.  
FEATURES  
High-density surface mounting : 6-pin super minimold package (2.0 1.25 0.9 mm)  
Wideband response  
Medium output power  
Supply voltage  
: fu = 2.3 GHz TYP. @3 dB bandwidth  
: PO (sat) = +11.5 dBm@f = 1 GHz with external inductor  
: VCC = 4.5 to 5.5 V  
Power gain  
: GP = 23 dB TYP. @f = 1 GHz  
: input/output 50  
Port impedance  
APPLICATIONS  
1st IF amplifiers in DBS converters  
RF stage buffer in DBS tuners, etc.  
ORDERING INFORMATION (PB-Free)  
Part Number  
Package  
Marking  
C1E  
Supplying Form  
Embossed tape 8 mm wide.  
PC2709TB-E3-A  
6-pin super minimold  
1, 2, 3 pins face the perforation side of the tape.  
Qty 3 kpcs/reel.  
Remark To order evaluation samples, please contact your local sales office (Part number for sample order:  
PC2709TB-A).  
Caution Electro-static sensitive devices  
The information in this document is subject to change without notice. Before using this document, please confirm  
that this is the latest version.  
Document No. P12653EJ3V0DS00 (3rd edition)  
Date Published November 2000 N CP(K)  
The mark shows major revised points.  
+PC2709TB  
PIN CONNECTIONS  
Pin No.  
Pin Name  
INPUT  
GND  
(Top View)  
(Bottom View)  
1
2
3
4
5
6
3
2
1
4
5
6
4
5
6
3
2
1
GND  
OUTPUT  
GND  
VCC  
PRODUCT LINE-UP OF 5 V-BIAS SILICON MMIC MEDIUM OUTPUT POWER AMPLIFIER  
(TA = +25°C, VCC = Vout = 5.0 V, ZS = ZL = 50 1)  
fu  
PO (sat)  
(dBm)  
GP  
NF  
ICC  
Part No.  
Package  
6-pin minimold  
Marking  
C1D  
(GHz)  
(dB)  
(dB)  
(mA)  
+PC2708T  
+PC2708TB  
+PC2709T  
+PC2709TB  
+PC2710T  
+PC2710TB  
+PC2776T  
+PC2776TB  
6.5  
@f = 1 GHz  
2.9  
2.3  
1.0  
2.7  
+10.0  
+11.5  
+13.5  
+8.5  
15  
23  
33  
23  
26  
25  
22  
25  
6-pin super minimold  
6-pin minimold  
5
C1E  
@f = 1 GHz  
6-pin super minimold  
6-pin minimold  
3.5  
C1F  
@f = 0.5 GHz  
6-pin super minimold  
6-pin minimold  
6.0  
@f = 1 GHz  
C2L  
6-pin super minimold  
Remark Typical performance. Please refer to ELECTRICAL CHARACTERISTICS in detail.  
Caution The package size distinguishes between minimold and super minimold.  
2
Data Sheet P12653EJ3V0DS00  
+PC2709TB  
SYSTEM APPLICATION EXAMPLE  
EXAMPLE OF DBS CONVERTERS  
BS Antenna (DBS ODU)  
IF Amp.  
RF Amp.  
Mixer  
To IDU  
Parabola  
Antenna  
+PC2709TB  
Oscillator  
EXAMPLE OF 900 MHz BAND, 1.5 GHz BAND DIGITAL CELLULAR TELEPHONE  
RX  
I
DEMOD.  
Q
PLL  
PLL  
SW  
I
= 2  
Driver  
0 $  
TX  
PA  
F/F  
90 $  
+PC2709TB  
Q
3
Data Sheet P12653EJ3V0DS00  
+PC2709TB  
PIN EXPLANATION  
Applied  
Voltage  
(V)  
Pin  
Pin  
No.  
Pin  
Name  
Function and Applications  
Internal Equivalent Circuit  
Voltage  
(V)Note  
1
INPUT  
<
1.05  
Signal input pin. A internal  
matching circuit, configured with  
resistors, enables 50 1 connec-  
tion over a wide band.  
A multi-feedback circuit is de-  
signed to cancel the deviations of  
hFE and resistance.  
This pin must be coupled to sig-  
nal source with capacitor for DC  
cut.  
6
4
V
CC  
OUT  
4
6
OUTPUT Voltage  
as same  
<
Signal output pin. The inductor  
must be attached between VCC  
and output pins to supply current  
to the internal output transistors.  
as VCC  
through  
1
IN  
external  
inductor  
VCC  
4.5 to 5.5  
<
<
Power supply pin, which biases  
the internal input transistor.  
This pin should be externally  
equipped with bypass capacitor  
to minimize its impedance.  
3
2
5
GND  
GND  
2
3
5
GND  
0
Ground pin. This pin should be  
connected to system ground with  
minimum inductance. Ground  
pattern on the board should be  
formed as wide as possible.  
All the ground pins must be con-  
nected together with wide ground  
pattern to decrease impedance  
defference.  
Note Pin voltage is measured at VCC = 5.0 V  
4
Data Sheet P12653EJ3V0DS00  
+PC2709TB  
ABSOLUTE MAXIMUM RATINGS  
Parameter  
Supply Voltage  
Symbol  
VCC  
Conditions  
TA = +25°C, Pin 4 and 6  
Ratings  
6
Unit  
V
Total Circuit Current  
Power Dissipation  
ICC  
TA = +25°C  
60  
mA  
mW  
PD  
Mounted on double copper clad 50 = 50 = 1.6 mm  
epoxy glass PWB (TA = +85°C)  
270  
Operating Ambient Temperature  
Storage Temperature  
Input Power  
TA  
Tstg  
Pin  
<40 to +85  
<55 to +150  
+10  
°C  
°C  
TA = +25°C  
dBm  
RECOMMENDED OPERATING RANGE  
Parameter  
Supply Voltage  
Symbol  
VCC  
MIN.  
4.5  
TYP.  
5.0  
MAX.  
5.5  
Unit  
V
Remark  
The same voltage should be applied to pin  
4 and 6.  
Operating Ambient Temperature  
TA  
<40  
+25  
+85  
°C  
ELECTRICAL CHARACTERISTICS (TA = +25°C, VCC = Vout = 5.0 V, ZS = ZL = 50 1)  
Parameter  
Circuit Current  
Symbol  
ICC  
Test Conditions  
MIN.  
19  
21.0  
+9.0  
<
TYP.  
25  
MAX.  
32  
26.5  
<
Unit  
mA  
dB  
No input signal  
f = 1 GHz  
Power Gain  
GP  
23.0  
+11.5  
5.0  
Saturated Output Power  
Noise Figure  
PO (sat)  
NF  
f = 1 GHz, Pin = 0 dBm  
f = 1 GHz  
dBm  
dB  
6.5  
<
Upper Limit Operating Frequency  
Isolation  
fu  
3 dB down below flat gain at f = 0.1 GHz  
f = 1 GHz  
2.0  
26  
7
2.3  
GHz  
dB  
ISL  
31  
<
Input Return Loss  
Output Return Loss  
Gain Flatness  
RLin  
RLout  
6GP  
f = 1 GHz  
10  
<
dB  
f = 1 GHz  
7
10  
<
dB  
f = 0.1 to 1.8 GHz  
<
(1.0  
<
dB  
5
Data Sheet P12653EJ3V0DS00  
+PC2709TB  
TEST CIRCUIT  
VCC  
1 000 pF  
C
3
L
6
50 1  
C1  
C2  
50 1  
OUT  
4
1
IN  
1 000 pF  
1 000 pF  
2, 3, 5  
COMPONENTS OF TEST CIRCUIT FOR  
MEASURING ELECTRICAL CHARACTERISTICS EXAMPLE OF ACTURAL APPLICATION COMPONENTS  
Type  
Value  
Type  
Value  
1 000 pF  
300 nH  
100 nH  
10 nH  
Operating Frequency  
100 MHz or higher  
10 MHz or higher  
100 MHz or higher  
1.0 GHz or higher  
C1 to C2  
Bias Tee  
Capacitor  
Bias Tee  
1 000 pF  
1 000 pF  
1 000 nH  
C1 to C3  
L
Chip capacitor  
Chip inductor  
C3  
L
INDUCTOR FOR THE OUTPUT PIN  
The internal output transistor of this IC consumes 20 mA, to output medium power. To supply current for output  
transistor, connect an inductor between the VCC pin (pin 6) and output pin (pin 4). Select large value inductance, as  
listed above.  
The inductor has both DC and AC effects. In terms of DC, the inductor biases the output transistor with minimum  
voltage drop to output enable high level. In terms of AC, the inductor make output-port impedance higher to get  
enough gain. In this case, large inductance and Q is suitable.  
CAPACITORS FOR THE VCC, INPUT, AND OUTPUT PINS  
Capacitors of 1 000 pF are recommendable as the bypass capacitor for the VCC pin and the coupling capacitors  
for the input and output pins.  
The bypass capacitor connected to the VCC pin is used to minimize ground impedance of VCC pin. So, stable bias  
can be supplied against VCC fluctuation.  
The coupling capacitors, connected to the input and output pins, are used to cut the DC and minimize RF serial  
impedance. Their capacitance are therefore selected as lower impedance against a 50 1 load. The capacitors thus  
perform as high pass filters, suppressing low frequencies to DC.  
To obtain a flat gain from 100 MHz upwards, 1 000 pF capacitors are used in the test circuit. In the case of under  
10 MHz operation, increase the value of coupling capacitor such as 10 000 pF. Because the coupling capacitors are  
determined by equation, C = 1/(2 /Rfc).  
6
Data Sheet P12653EJ3V0DS00  
+PC2709TB  
ILLUSTRATION OF THE TEST CIRCUIT ASSEMBLED ON EVALUATION BOARD  
AMP-2  
Top View  
IN  
C
L
OUT  
C
Mounting direction  
V
CC  
C
COMPONENT LIST  
Value  
Notes  
1. 30 = 30 = 0.4 mm double sided copper clad polyimide board.  
2. Back side: GND pattern  
C
L
1 000 pF  
300 nH  
3. Solder plated on pattern  
4.  
: Through holes  
For more information on the use of this IC, refer to the following application note:  
USAGE AND APPLICATION OF SILICON MEDIUM-POWER HIGH-FREQUENCY AMPLIFIER MMIC (P12152E).  
7
Data Sheet P12653EJ3V0DS00  
+PC2709TB  
TYPICAL CHARACTERISTICS (Unless otherwise specified, TA = +25°C)  
CIRCUIT CURRENT vs.  
OPERATING AMBIENT TEMPERATURE  
CIRCUIT CURRENT vs.  
SUPPLY VOLTAGE  
No input signal  
40  
35  
30  
25  
20  
15  
10  
5
40  
No input signal  
V
CC = 5.0 V  
35  
30  
25  
20  
15  
10  
5
0
0
1
2
3
4
5
6
–60 –40 –20  
0
+20 +40 +60 +80 +100  
Supply Voltage VCC (V)  
Operating Ambient Temperature TA ($C)  
NOISE FIGURE, POWER GAIN  
vs. FREQUENCY  
POWER GAIN vs. FREQUENCY  
8
7
6
5
4
30  
25  
20  
30  
25  
VCC = 5.0 V  
–40$C  
TA = +25$C  
5.0 V  
VCC = 5.5 V  
4.5 V  
GP  
+85$C  
20  
5.5 V  
VCC = 5.0 V  
NF  
15  
10  
15  
10  
4.5 V  
0.1  
0.3  
1.0  
3.0  
0.1  
0.3  
1.0  
3.0  
Frequency f (GHz)  
Frequency f (GHz)  
INPUT RETURN LOSS, OUTPUT  
RETURN LOSS vs. FREQUENCY  
ISOLATION vs. FREQUENCY  
0
–10  
–20  
–30  
0
VCC = 5.0 V  
VCC = 5.0 V  
–10  
RLin  
RLout  
–20  
–30  
–40  
–50  
–40  
–50  
0.1  
0.3  
1.0  
3.0  
0.1  
0.3  
1.0  
3.0  
Frequency f (GHz)  
Frequency f (GHz)  
8
Data Sheet P12653EJ3V0DS00  
+PC2709TB  
OUTPUT POWER vs. INPUT POWER  
OUTPUT POWER vs. INPUT POWER  
+15  
+10  
+5  
+15  
+10  
+5  
V
CC = 5.0 V  
f = 1.0 GHz  
5.5 V  
f = 1.0 GHz  
V
CC = 5.0 V  
+25$C  
TA = –40$C  
4.5 V  
+85$C  
0
0
–5  
–5  
–10  
–10  
–15  
–20  
–15  
–20  
–35 –30 –25 –20 –15 –10 –5  
Input Power Pin (dBm)  
0
+5 +10  
–35 –30 –25 –20 –15 –10 –5  
Input Power Pin (dBm)  
0
+5 +10  
OUTPUT POWER vs. INPUT POWER  
OUTPUT POWER vs. INPUT POWER  
+15  
+10  
+5  
+15  
+10  
+5  
f = 2.0 GHz  
5.5 V  
V
CC = 5.0 V  
f = 0.5 GHz  
f = 1.0 GHz  
V
CC = 5.0 V  
4.5 V  
0
0
f = 2.0 GHz  
–5  
–5  
–10  
–10  
–15  
–20  
–15  
–20  
–35 –30 –25 –20 –15 –10 –5  
Input Power Pin (dBm)  
0
+5 +10  
–35 –30 –25 –20 –15 –10 –5  
Input Power Pin (dBm)  
0
+5 +10  
SATURATED OUTPUT POWER vs.  
FREQUENCY  
3RD ORDER INTERMODULATION DISTORTION  
vs. OUTPUT POWER OF EACH TONE  
60  
20  
18  
16  
14  
12  
10  
8
P
in = 0 dBm  
f
= 1.000 GHz  
f
2
1 = 1.002 GHz  
50  
40  
30  
20  
10  
5.5 V  
V
CC = 5.0 V  
V
CC = 5.0 V  
5.5 V  
4.5 V  
6
4
4.5 V  
2
0
0.1  
0.3  
1.0  
3.0  
–10 –8 –6 –4 –2  
0
+2 +4 +6 +8 +10  
Frequency f (GHz)  
Output Power of Each Tone PO(each) (dBm)  
Remark The graphs indicate nominal characteristics.  
9
Data Sheet P12653EJ3V0DS00  
+PC2709TB  
S-PARAMETERS (TA = +25$C, VCC = Vout = 5.0 V)  
S11-FREQUENCY  
0.1 G  
1.0 G  
3.0 G  
S22-FREQUENCY  
3.0 G  
0.1 G  
2.0 G  
1.0 G  
10  
Data Sheet P12653EJ3V0DS00  
+PC2709TB  
TYPICAL S-PARAMETER VALUES (TA = +25°C)  
VCC = Vout = 5.0 V, ICC = 26 mA  
Frequency  
MHz  
S11  
S21  
S12  
S22  
K
MAG.  
ANG.  
MAG.  
ANG.  
MAG.  
ANG.  
MAG.  
ANG.  
100.0000  
200.0000  
0.227  
0.239  
0.245  
0.244  
0.243  
0.247  
0.265  
0.284  
0.301  
0.305  
0.299  
0.300  
0.314  
0.328  
0.354  
0.359  
0.373  
0.371  
0.379  
0.386  
0.387  
0.374  
0.360  
0.339  
0.338  
0.334  
0.330  
0.311  
0.291  
0.258  
0.240  
0.2  
1.0  
13.698  
13.724  
13.830  
13.998  
14.109  
14.246  
14.538  
14.703  
15.051  
15.331  
15.605  
15.773  
16.152  
16.282  
16.337  
16.370  
16.256  
15.977  
15.529  
15.307  
14.745  
14.212  
13.633  
12.846  
11.990  
11.265  
10.560  
9.942  
–4.5  
–9.6  
0.027  
0.027  
0.026  
0.027  
0.026  
0.027  
0.028  
0.028  
0.028  
0.029  
0.029  
0.029  
0.030  
0.030  
0.032  
0.031  
0.033  
0.032  
0.033  
0.034  
0.033  
0.033  
0.033  
0.032  
0.033  
0.033  
0.033  
0.033  
0.035  
0.035  
0.035  
–1.0  
3.1  
0.196  
0.207  
0.212  
0.223  
0.234  
0.252  
0.270  
0.287  
0.298  
0.309  
0.322  
0.336  
0.353  
0.353  
0.368  
0.370  
0.382  
0.381  
0.378  
0.373  
0.366  
0.363  
0.353  
0.331  
0.318  
0.304  
0.295  
0.282  
0.267  
0.246  
0.225  
0.9  
2.2  
1.37  
1.36  
1.38  
1.32  
1.33  
1.26  
1.20  
1.15  
1.10  
1.05  
1.04  
1.01  
0.95  
0.93  
0.86  
0.86  
0.81  
0.83  
0.83  
0.82  
0.85  
0.90  
0.94  
1.06  
1.11  
1.20  
1.25  
1.36  
1.40  
1.55  
1.64  
300.0000  
2.9  
–14.5  
–19.9  
–25.0  
–30.4  
–35.5  
–41.3  
–47.0  
–53.5  
–60.0  
–66.7  
–74.0  
–81.0  
–89.3  
–96.5  
–104.5  
–112.7  
–120.5  
–128.1  
–135.9  
–143.7  
–151.3  
–158.7  
–165.5  
–172.1  
–177.8  
176.2  
171.3  
166.5  
161.9  
4.7  
4.1  
400.0000  
500.0000  
2.5  
7.8  
9.8  
3.4  
1.5  
2.1  
600.0000  
700.0000  
800.0000  
900.0000  
1000.0000  
1100.0000  
1200.0000  
1300.0000  
1400.0000  
1500.0000  
1600.0000  
1700.0000  
1800.0000  
1900.0000  
2000.0000  
2100.0000  
2200.0000  
2300.0000  
2400.0000  
2500.0000  
2600.0000  
2700.0000  
2800.0000  
2900.0000  
3000.0000  
3100.0000  
–1.5  
11.9  
13.6  
14.9  
17.2  
18.8  
20.9  
22.5  
23.8  
26.1  
25.6  
26.8  
28.0  
29.3  
31.3  
31.0  
32.2  
30.5  
33.9  
35.5  
38.0  
39.1  
40.8  
43.5  
44.9  
47.4  
53.4  
–0.4  
–3.2  
–2.3  
–3.6  
–4.6  
–3.3  
–7.4  
–2.4  
–11.9  
–17.1  
–21.5  
–24.8  
–28.8  
–35.5  
–41.8  
–46.9  
–52.8  
–57.8  
–64.1  
–70.8  
–78.1  
–83.0  
–90.0  
–95.6  
–102.5  
–108.3  
–113.7  
–118.6  
–125.1  
–131.2  
–3.2  
–6.3  
–10.3  
–14.4  
–17.3  
–19.5  
–22.1  
–26.8  
–31.1  
–36.0  
–39.5  
–43.8  
–48.7  
–55.4  
–62.0  
–66.0  
–69.0  
–69.9  
–72.5  
–76.5  
–80.6  
9.432  
8.818  
8.353  
11  
Data Sheet P12653EJ3V0DS00  
+PC2709TB  
PACKAGE DIMENSIONS  
6-PIN SUPER MINIMOLD (UNIT: mm)  
2.1(0.1  
1.25(0.1  
0.1 MIN.  
12  
Data Sheet P12653EJ3V0DS00  
+PC2709TB  
NOTES ON CORRECT USE  
(1) Observe precautions for handling because of electro-static sensitive devices.  
(2) Form a ground pattern as widely as possible to minimize ground impedance (to prevent undesired oscillation).  
All the ground pins must be connected together with wide ground pattern to decrease impedance difference.  
(3) The bypass capacitor should be attached to the VCC pin.  
(4) The inductor (L) must be attached between VCC and output pins. The inductance value should be determined in  
accordance with desired frequency.  
(5) The DC cut capacitor must be attached to input and output pin.  
RECOMMENDED SOLDERING CONDITIONS  
This product should be soldered under the following recommended conditions. For soldering methods and condi-  
tions other than those recommended below, contact your NEC sales representative.  
Soldering Method  
Infrared Reflow  
Soldering Conditions  
Recommended Condition Symbol  
IR35-00-3  
Package peak temperature: 235°C or below  
Time: 30 seconds or less (at 210°C)  
Count: 3, Exposure limit: NoneNote  
VPS  
Package peak temperature: 215°C or below  
Time: 40 seconds or less (at 200°C)  
Count: 3, Exposure limit: NoneNote  
VP15-00-3  
WS60-00-1  
Wave Soldering  
Partial Heating  
Soldering bath temperature: 260°C or below  
Time: 10 seconds or less  
Count: 1, Exposure limit: NoneNote  
Pin temperature: 300°C  
Time: 3 seconds or less (per side of device)  
Exposure limit: NoneNote  
Note After opening the dry pack, keep it in a place below 25°C and 65% RH for the allowable storage period.  
Caution Do not use different soldering methods together (except for partial heating).  
For details of recommended soldering conditions for surface mounting, refer to information document  
SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL (C10535E).  
13  
Data Sheet P12653EJ3V0DS00  

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