MSTM-S3-TR-19016.384M [CONNOR-WINFIELD]
Stratum 3 Timing Module; 第3层定时模块
| 型号： | MSTM-S3-TR-19016.384M |
| 厂家： | 
CONNOR-WINFIELD CORPORATION |
| 描述： | Stratum 3 Timing Module |
| 文件： | 总16页 (文件大小：1128K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MSTM-S3-TR
Stratum 3
Timing Module
2111 Comprehensive Drive
Aurora, Illinois 60505
Phone: 630-851-4722
Fax: 630- 851- 5040
www.conwin.com
Features
Application
• 5V Miniature Timing
Module
The Connor-Winfield MSTM-S3-TR
Simplified Control Timing Module acts as a
complete system clock module for Stratum 3
timing applications in accordance with GR-
1244, Issue 2 and GR-253, Issue 3.
Connor Winfield’s Stratum 3 timing modules
helps reduce the cost of your design by
minimizing your development time and
maximizing your control of the system clock
with our simplified design.
• Redundant
References
• 2 Synchronous
Outputs Available
From 8 kHz to
77.76MHz
• 40 sec., Filtered,
Hold Over History
• Operational Status
Flags
Bulletin
TM027
Page
1 of 16
Revision
P05
Date
02 DEC 02
Issued By
MBatts
Functional Block Diagram
Figure 1
General Description
The Connor-Winfield Stratum 3 Simplified Control Timing Mod-
ule acts as a complete system clock module for general Stratum
3 timing applications. The MSTM is designed to replace similar
units from TF Systems (TF118B) and Raltron (SY0001B).
Full external control input allows for selection and monitoring
of any of four possible operating states: 1) Holdover, 2) External
Reference #1, 3) External Reference #2, and 4) Free Run. Table
#1 illustrates the control signal inputs and corresponding opera-
tional states.
1
2
3
Free Run
Ref #1
CNTL A
CNTL B
Free Run
Ref #2
4
Hold Over
PLL_TVL
Hold Over
Alarm_Out
Tuning
VVoollttaaggee
Monitor
Holdovveerr
FIFO
In the absence of External Control Inputs (A,B), the MSTM
enters the Free Run mode and signals an External Alarm. The
MSTM will enter other operating modes upon application of a
proper control signal. Mode 1 operation (A=1, B=0) results in an
output signal that is phase locked to the External Reference
Input #1. Mode 2 operation (A=0, B=1) results in an output sig-
nal that is phase locked to External Reference Input #2. Hold-
over mode operation (A=1, B=1) results in an output signal at or
near the frequency as determined by the latest (last) locked-
signal input values and the holdover performance of the MSTM.
Free Run ModeFree Run mode operation (A=0, B=0) is a guar-
anteed output of 4.6 ppm of the nominal frequency.
LOL & LOR
Ex Ref 1
Ex Ref 2
Phase
Build Out
Circuit
Ref
Control
DPLL
Stratum3
OOCCXXOO
DAC
Sync_Out
÷N
Opt_Out*
Reference
Clock
*Only one Opt_Out option is available per module
Alarm signals are generated at the Alarm Output during Hold-
over and Free Run operation. Alarm Signals are also generated
by Loss-of-Lock and Loss-of-Reference conditions. A high level
indicates an alarm condition. Real-time indication of the opera-
tional mode is available at unique operating mode outputs on
pins 1-4.
Control loop 0.1 Hz filters effectively attenuate any reference
jitter, smooth out phase transients, comply with wander transfer
and jitter tolerances.
Function ControlTable
Table 1
CNTL
A
CNTL
B
Operational
Mode
Ref 1
Ref 2
Hold Over Free Run
PLL Unlock Alarm Out
0
0
Free Run (Default Mode)
0
0
0
1
0
1
External
Reference
#1
Normal
PLL_Unlock
LOR
1
1
0
0
0
0
0
0
1
0
0
0
0
1
0
0
0
1
1
0
External
Reference
#2
Normal
PLL_Unlock
LOR
0
0
0
1
1
0
0
0
1
0
0
0
0
1
0
0
0
1
0
1
1
1
Hold Over
0
0
1
0
0
1
Absolute Maximum Rating
Table 2
Symbol
VCC
Parameter
Minimum
-0.5
Nominal
Maximum
7.0
Units
Volts
Notes
1.0
Power Supply Voltage
Input Voltage
VI
-0.5
VCC + 0.5
100
Volts
deg. C
1.0
Ts
Storage Temperature
-55
1.0
Data Sheet #: TM027
Page 2 of 16
Rev: P05 Date: 12 / 02 / 02
© Copyright 2001 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
Recommended Operating Conditions
Table 3
Symbol
Vcc
Parameter
Minimum
4.75
4.25
2.0
Nominal
5.00
Maximum
5.25
4.5
Units
Volts
Volts
Volts
Volts
ns
Notes
Power supply voltage
Reset threshold voltage
High level input voltage - TTL
Low level input voltage - TTL
Input signal transition - TTL
Input capacitance
VTH
VIH
VCC
VIL
0
0.8
tIN
250
CIN
15
pF
VOH
High level output voltage,
IOH = -4.0mA, VCC = min.
2.4
5.25
Volts
2.0
VOL
Low level output voltage,
IOL = 12.0 mA, VCC = min.
0.4
70
Volts
tTRANS
Clock output transition time
4.0
ns
ns
tPULSE
8kHz input reference pulse
width( positive or negative)
30
0
TOP
Operating temperature
°C
Specifications
Table 4
Parameter
Specifications
Notes
Frequency Range (Sync_Out)
Frequency Range (Opt_Out)
Supply Current
8 kHz to 77.76 MHz
8 kHz to 77.76 MHz
250 mA typical, 400 mA during warm-up (Maximum)
8 kHz - 19.44 MHz
Timing Reference Inputs
Jitter, Wander and Phase Transient Tolerances
Wander Generation
Wander Transfer
3.0
GR-1244-CORE 4.2-4.4, GR-253-CORE 5.4.4.3.6
GR-1244-CORE 5.3, GR-253-CORE 5.4.4.3.2
GR-1244-CORE 5.4
Jitter Generation
GR-1244-CORE 5.5, GR-253-CORE 5.6.2.3
GR-1244-CORE 5.5, GR-253-CORE 5.6.2.1
GR-1244-CORE 5.6, GR-253-CORE 5.4.4.3.3
4.6 ppm over TOP
Jitter Transfer
Phase Transients
Free Run Accuracy
Hold Over Stability
Inital Offset
0.37 ppm for initial 24 hrs
0.05 ppm
4.0
5.0
Temperature
0.28 ppm
Drift
0.04 ppm
Maximum Hold Over History
Pull-in/ Hold-in Range
Lock Time
40 seconds
13.8 ppm minimum
30 seconds typical
DPLL Bandwidth
< 0.1 Hz
NOTES:
1.0: Stresses beyond those listed under Absolute Maximum Rating may cause damage
to the device. Operation beyond Recommended Conditions is not implied.
4.0: Hold Over stability is the cumulative fractional frequency offset as described by
GR-1244-CORE, 5.2
5.0: Pull-in Range is the maximum frequency deviation from nominal clock rate on the
reference inputs to the timing module that can be overcome to pull into synchronization
with the reference
2.0: Logic is 3.3V CMOS
3.0
GR-1244-CORE 3.2.1
Data Sheet #: TM027
Page 3 of 16
Rev: P05
Date: 12 / 02 / 02
© Copyright 2001 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
Pin Description
Table 5
Pin #
Connection
Hold Over
Ref 1
Description
1
2
Indicator output. High output when Hold Over mode is selected by control pins.
Indicator output. High output when Ref 1 mode is selected by control pins.
Indicator output. High output when Ref 2 mode is selected by control pins.
Indicator output. High output when Free Run mode is selected by control pins.
Ground
3
Ref 2
4
Free Run
GND
5
6
Alarm _Out
CNTL A
Alarm output. High output if module is in Free Run, or Hold Over, or LOR.
Mode control input
7
8
CNTL B
Mode control input
9
PLL_Unlock
Tri-State/GND
Indicates that the PLL is not locked to a reference.
10
0 = Normal operation, 1= Tri-State. Pin is pulled low internally.
Ground pin for normal operation.
11
12
13
Sync_Out
GND
Primary timing output signal. Signal is sychronized to reference.
Ground
Opt_Out
Secondary output signal. Signal is derived from Sync_Out or from an internal
reference clock depending upon the choosen configuration.
14
15
16
17
18
GND
Ground
Ex_Ref_2
GND
External Input Reference #2
Ground
Ex_Ref_1
Vcc
External Input Reference #1
+5V dc supply
Ordering Information
MSTM-S3-TR-(Input Reference Frequency)(Opt_Out Frequency)-(Primary Output)
1= 1.544 MHz
2= 2.048 MHz
8= 8 kHz
9= 19.44 MHz
S= Other
Primary Output ÷ N option:
2= 2.048 MHz
02.048M = 2.048MHz
016.384M = 16.384 MHz
019.44M = 19.44 MHz
032.768M = 32.768 MHz
038.88 M = 38.88 MHz
077.76 M = 77.76 MHz
8= 8 kHz
N= No output
S= Other
Reference Clock Out option:
6= 16.384 MHz
9= 19.44 MHz
Example: MSTM-S3-TR-88-038.88M
Data Sheet #: TM027
Page 4 of 16
Rev: P05 Date: 12 / 02 / 02
© Copyright 2001 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
Typical Application
Figure 2
BITS
System
Signal
Input Select
Line Card 1
S
A
B
CW’s SCG
2000/4000
MUX
A
Clock out
RCV
Y
CW’s STM/MSTM module
Y
MUX
B
S
Line Card N
Timing Card #N
S
A
CW’s SCG
2000/4000
Clock out
RCV
A
MUX
CW’s STM/MSTM module
Y
Y
B
MUX
B
S
System Select
Typical System Test Set-up
Figure 3
G P S o r L O R AN
T im in g S o u rc e
T h is d e vic e s u p p lie s s ys te m tim e
in fo rm a tio n . It c a n b e th o u g h t o f a s
s u p p lyin g "a b s o lu te tim e " re fe re n c e
in fo rm a tio n
S
a
m
p
l
e
M
T
I
E
D
a
t
a
f
o
r
S
T
M
-
S
3
/
M
S
T
M
-
S
3
1
0
0
1
.0
.0
.0
.0
E
E
E
E
-
-
-
-
6
9
9
9
T
y
p
i
c
a
t
l
r
e
s
p
o
n
s
e
-
3
9
0
0
0
s
e
c
o
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d
t
e
s
t
-
J
it
t
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r
a
p
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(
2
U
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@
1
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H
z
)
r
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P
R
2
2
1
9
8
P o s s ib le C h o ic e s In c lu d e
S ta n fo rd R e s e a rc h M o d e l: F S 7 0 0
T ru e tim e M o d e l X X X
k
dh
1
0
1 0
M
T
IE
1
1
1
1
G
2
4
4
4
4
-
-
-
5
.
2
2
6
5
M
M
M
4
a
s
k
k
k
(
(
A
B
)
M H z
2
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4
5
.
.
a
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)
5
R
2
5
3
-
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.
4
3
.
2
1
0
0
.0
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-
3
1
.
0
E
+
0
1
0
.
0
E
+
0
1
0
0
.0
E
+
0
1
.
0
E
+
3
1
d
0
.
0
E
+
3
O
b
s
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r
v
a
t
io
n
T
im
e
(
s
)
C
o
p
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1
9
9
8
C
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r
-
W
in
f
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ld
a
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l
r
i
g
h
t
s
re
s e r ve
T a rg e t S ys te m U n d e r T e s t
E xte rn a l
S ta n d a rd s
R e fe re n c e
D S 1 ra te R Z (1 .5 4 4 M H z), E 1 ra te R Z o r
c lo c k R Z w ith n o is e m o d u la tio n
8 k H z
A rb itra ry
W a v e fo rm
G e n e ra to r
In p u t
C o m p lia n c e
D o c u m e n ts
C lo c k o r B IT S lo g ic le ve l
clo ck in p u t (T T L , C M O S ,
e tc .)
M T IE , T D E V , W a n d e r T ra n s fe r,
a n d W a n d e r G e n e ra tio n P lo ts
S
a
m
p
l
e
W
a
n
d
e
r
G
e
n
e
r
a
t
i
o
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(
T
D
E
V
)
f
o
r
S
T
M
/
M
S
T
M
-
S
3
1 .0 E - 6
T
y
p
i
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a
a
t
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r
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s
p
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s
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-
3
0
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it
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z
)
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A
P
R
2 2 1 9 9 8
k
dh
1 0
1
0
0
.
0
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-
9
M H z
. . . . ...
1
0 .0 E - 9
T
D
E
V
G
G
R
1
1
2
4
4
4
4
-
-
F
F
ig
ig
5
.
1
1 .0 E - 9
R
2
5
-
3
A rb itra ry
W a v e fo rm
G e n e ra to r
[N o is e
1
0
0
.0
E
-
1
1
2
0
.
0
E
-
3
1
0
0
.0
E
-
3
1
.0
E
+
0
1
0
.
0
E
+
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1
0
0
o
.
0
E
+
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r
1 .0 E + 3
C
o
p
y
r
i
g
h
t
1
9
9
8
C
n
n
o
-W in fie ld a lll rig h ts r es e rv e d
I
n
t
e
g
r
a
t
i
o
n
T
i
m
e
( s e c )
E xte rn a l
R e fe re n c e
In p u t
S o u rc e ]
T im e -s ta m p e d e n s e m b le
b a s e d o n a b s o lu te tim e
re fe re n c e (1 0 M H z in p u t)
1 0
M H z
D S 1 ra te [1 .5 4 4 M H z] B IT S B ip o la r
P h a s e E rro r d a ta o u tp u t
D S -1 , O C -3 , O C -1 2 e le c tric a l o r o p tic a l s ig n a ls
E xte rn a l
T e k tro n ix
1 0
R e fe re n ce
H P 5 3 3 1 0 A
S J 3 0 0 E
In p u t
M H z
M o d u la tio n A n a lyze r
/ T im e In te rva l A n a lyze r
W a n d e r A n a lyze r d a ta (IE E E -4 8 8 )
E xte rn a l
R e fe re n c e
In p u t
IE E E -4 8 8 C o n tro lle r
P la tfo rm fo r s o ftw a re
H P 5 3 3 0 5 A P h a s e A n a lyze r
H P E 1 7 4 8 A S yn c
M e a s u re m e n t
T e k tro n ix
W a n d e r A n a lyze r
Data Sheet #: TM027
Page 5 of 16
Rev: P05
Date: 12 / 02 / 02
© Copyright 2001 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
MSTM-S3-TR Typical Current Draw
Figure 4
0.45
0.4
0.35
0.3
0.25
0.2
0.15
0.1
0.05
0
0
10
20
30
40
50
60
TIME (Sec)
Typical Calibrated Wander Transfer TDEV
Figure 5
10000
1000
100
10
TDEV (ns)
GR1244, Fig 5.3
1
Integration Time (Sec.)
Data Sheet #: TM027
Page 6 of 16
Rev: P05 Date: 12 / 02 / 02
© Copyright 2001 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
Typical Wander Generation MTIE
Figure 6
1 0 0 0
1 0 0
1 0
G R 1 2 4 4 , F ig 5 . 2 (A )
G R 1 2 4 4 , F ig 5 . 2 (B )
G R 2 5 3 - 5 . 4 . 4 . 3 . 2 , F ig 5 . 1 7
M T IE ( n s )
O b s e r v a t io n T im e ( s e c .)
Typical Wander Generation TDEV
Figure 7
100
10
1
T D EV (n s)
G R1244, F ig 5.1
0.1
In teg ratio n T im e (sec.)
Data Sheet #: TM027
Page 7 of 16
Rev: P05
Date: 12 / 02 / 02
© Copyright 2001 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
1µs Phase Transient TIE
Figure 8
1200
1000
800
600
400
200
0
-200
0
1
2
3
4
5
6
7
8
9
10
Time (sec)
Typical Phase Transient MTIE
Figure 9
10000
1000
100
10
G R-253, F ig . 5-19, Re q u ire m e n t
M T IE (n s)
1
0.01
0.1
1
10
100
1000
O b servatio n T im e (sec)
Data Sheet #: TM027
Page 8 of 16
Rev: P05 Date: 12 / 02 / 02
© Copyright 2001 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
Entry Into Hold Over
Figure 10
10000
1000
100
G R-1244 O bjective, F ig. 5-8
G R-1244 Requirem ent, F ig. 5-8
G R-253, F ig. 5-19, Requirem ent
Typical M TIE
10
1
0.001
0.01
0.1
1
10
100
1000
O b servatio n T im e (seco n d s)
Return from Hold Over
Figure 11
10000
1000
100
10
G R-1244 Requirem ent, F ig. 5-7
G R-253, F ig. 5-19, Requirem ent
Ty pic al M TIE
1
0.001
0.01
0.1
1
10
100
1000
O b se rva tio n T im e (se c.)
Data Sheet #: TM027
Page 9 of 16
Rev: P05
Date: 12 / 02 / 02
© Copyright 2001 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
MSTM-S3-TR Mode Indicator Delay
Figure 12
Change in
Operational Mode
Operational Mode
Indicator
∆tm
10 usec < ∆tm < 65 usec
m
Data Sheet #: TM027
Page 10 of 16
Rev: P05 Date: 12 / 02 / 02
© Copyright 2001 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
Loss of Reference Timing Diagram
Figure 13
External
Reference
Input
Alarm
tAon
tAoff
125 usec < tAon < 250 usec
tAoff
z
500 msec
Power on Reset Levels
Figure 14
VCC
VTH
Range
Reset
Reset
Normal Operation
Data Sheet #: TM027
Page 11 of 16
Rev: P05
Date: 12 / 02 / 02
© Copyright 2001 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
Solder Clearance
Figure 15
.020" MAX.
.020"
.030"
PIN LAND
ALL SOLDER AND/OR WIRE TAGS
SHALL NOT EXTEND MORE THAN .020"
BELOW PC BOARD BOTTOM SURFACE
Data Sheet #: TM027
Page 12 of 16
Rev: P05 Date: 12 / 02 / 02
© Copyright 2001 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
MECHANICAL OUTLINE:
GROUND AND POWER SUPPLY LINES:
The mechanical outline of the MSTM-S3-TR is
Power specifications will vary depending primarily
shown in Figure 16. The board space required is 2” x on the temperature range. At wider temperature
2”. The pins are .040” in diameter and are .150” in
length. The unit is spaced off the PCB by .030”
shoulders on the pins. Due to the height of the
device it is recommended to have heat sensitive
devices away where the air flow might not be
blocked.
ranges starting at 0 to 70 deg. C., an ovenized
oscillator, OCXO, will be incorporated. The turn-on
current for an OCXO requires a peak current of
about .4A for about a minute. The steady state
current will the vary from 50-150 mA depending on
the temperature. It is suggested to plan for the peak
current in the power and ground traces pin 18 and
pin 5. The other four ground pins 10, 12, 14, and 16
are intended for signal grounds.
PAD ARRAY AND PAD SPACING:
The pins are arranged in a dual-in-line
configuration as shown in Figure 17. There is .2”
space between the pins in-line and each line is
separated by 1.6”. See Figures 16 & 17 and Table
6.
POWER SUPPLY REGULATION:
Good power supply regulation is recommended for
the MSTM-S3-TR The internal oscillators are
regulated to operate from 4.75 - 5.25 volts. Large
jumps within this range may still produce varying
degrees of wander. If the host system is subject to
large voltage jumps due to hot-swapping and the like,
it is suggested that there be some form of external
regulation such as a DC/DC converter.
PAD CONSTRUCTION:
The recommended pad construction is shown in
Figure 17. For the pin diameter of .040” a hole
diameter of .055” is suggested for ease of insertion
and rework. A pad diameter of .150” is also
suggested for support. This leaves a spacing of
.050” between the pads which is sufficient for most
signal lines to pass through.
SOLDERING RECOMMENDATIONS:
Due to the sensitive nature of this part, hand
soldering or wave soldering of the pins is
recommended after reflow processes.
SOLDER MASK:
A solder mask is recommended to cover most the
top pad to avoid excessive solder underneath the
shoulder of the pin to avoid rework damage. See
Table 6 and Figure 18.
WASHING RECOMMENDATIONS:
The MSTM-S3-TR is not in a hermetic enclosure.
It is recommended that the leads be hand cleaned
after soldering. Do not completely immerse the
module.
VIA KEEP OUT AREA:
It is recommended that there be no vias or feed
throughs underneath the main body of the module
between the pins. It is suggested that the traces in
this area be kept to a minimum and protected by a
layer of solder mask. See Figure 17.
MODULE BAKEOUT:
Do not bakeout the MSTM-S3-TR
Data Sheet #: TM027
Page 13 of 16
Rev: P05
Date: 12 / 02 / 02
© Copyright 2001 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
Package Dimensions
Characteristic Measurements
Figure 16
Table 6
Characteristic Item
Pad to Pad Spacing
Measurement (inches)
0.200
0.150
0.055
0.150
0.055
0.070
0.155
1.600
Solder pad top O.D.
Solder pad top I.D.
Solder pad bottom O.D.
Solder pad bottom I.D.
Solder mask top dia.
Solder mask bottom dia.
Pin row to row spacing
Recommended Footprint Dimensions
Side Assembly View
Figure 17
Figure 18
TOP SIDE
SOLDER RESIST
(OVER PAD)
PCB
SIDE VIEW
BOTTOM SIDE
SOLDER RESIST
(UP TO PAD)
Data Sheet #: TM027
Page 14 of 16
Rev: P05 Date: 12 / 02 / 02
© Copyright 2001 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
Revision
P00
Revision Date
7/27/01
Note
Preliminary Release
P01
8/01/01
Added POR figure and Tri-state pin
Added new input frequency
Added Opt_Out information
Updated Pin descriptions
Corrected Table 1
P02
8/14/01
P03
4/9/02
P04
4/9/02
P05
12/2/02
Data Sheet #: TM027
Page 15 of 16
Rev: P05
Date: 12 / 02 / 02
© Copyright 2001 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
2111 Comprehensive Drive
Aurora, Illinois 60505
Phone: 630-851-4722
Fax: 630- 851- 5040
www.conwin.com
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