SCG2020-077.76M [CONNOR-WINFIELD]
Support Circuit, 1-Func,;型号: | SCG2020-077.76M |
厂家: | CONNOR-WINFIELD CORPORATION |
描述: | Support Circuit, 1-Func, ATM 异步传输模式 电信 电信集成电路 |
文件: | 总20页 (文件大小:929K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
SCG2000 Series
Synchronous Clock
Generators
PLL
2111 Comprehensive Drive
Aurora, Illinois 60505
Phone: 630-851-4722
Fax: 630- 851-5040
www.conwin.com
Application
Features
The Connor-Winfield SCG2000 Series
provides high precision phase lock loop
frequency translation for the
• 3.3V High
Precision PLL
• Tri-State Capability
• Active Alarms
telecommunication applications.
SCG2000 Series is well suited for use in
line cards, service termination cards and
similar functions to provide reliable
reference, phase locked, synchronization
and low phase gain for TDM, PDH, SONET
and SDH network equipment. The
SCG2000 Series provides a jitter filtered,
wander following output signal
• Guaranteed Free
Run ±±2ppm
• 1 Sec. Acquisition
Time
synchronized to a superior Stratum or peer
input reference signal.
Bulletin
SG235
Page
1 of ±2
Revision
22
Date
±3 AUG 24
Issued By
MBATTS
General Description
also enter a Free Run state which will guarantee a 20 ppm
accurate output. Additionally the Free Run mode may be
entered manually by asserting a high signal to the Free
Run Enable pin. The outputs, except the oscillator output,
may be put into the tri-state high impedance condition for
external testing purposes by asserting a high signal to the
Tri-State Enable pin.
The SCG2000 Series are 3.3 Volt components that
typically draw less than 100 mA. All models have an
acquisition time of approximately 1.0 second and can be
used in applications that require temperature rating of 0° -
70° C. All models have a 33Ω resistor in series with the
oscillator output. The SCG2000 maximum package
dimensions are .78” x .83” x .35” on a six layer FR4 board
with surface mount pins. Parts are assembled using high
temperature solder to withstand surface mount reflow
process.
The SCG2000 Series provides high precision phase lock loop
frequency translation for the telecommunication applications.
The SCG2000 products generate a CMOS output from an
intrinsically low jitter, voltage controlled crystal oscillator. Most
models provide a jitter attenuated, internal reference that is
connected to a Reference Output pin.
SCG2000 Series is well suited for use in line cards, service
termination cards and similar functions to provide reliable
reference, phase locked, synchronization for TDM, PDH, SONET
and SDH network equipment . The SCG2000 Series provides a
low phase gain (<0.2dB), jitter filtered, wander following output
signal synchronized to a superior Stratum or peer input reference
signal.
The SCG2000 Series include the following features: Free
Run, Tri-state and alarm outputs for Loss-of-Reference, (LOR),
Loss-of-Lock, (LOL). During the LOR alarm, the SCG2000 will
Functional Block Diagram
Figure 1
Tri-State Enable
(Pin 12)
LOL Alarm Output
(Pin 7)
ALARM
LOR Alarm Output
(Pin 6)
DETECTION
Free Run Enable
(Pin 5)
Reference Input
ANALOG
FILTER
FREE RUN
CONTROL
Oscillator Output
(Pin 9)
DIVIDER
DPFD
VCXO
(Pin 8)
Optional Oscillator Output
(Pin 1)
DIVIDER
Reference Output
(Pin 1)
(Not available on
models with optional
oscillator output)
Input Freq. Select A
(Pin 14)
Input Freq. Select B
(Pin 13)
Model Comparison Table
Table 1
Model
Max
Duty
Cycle
Input
Ref Freq
Reference Output
(Pin #1)
Oscillator Output
(Pin #9)
Notes
SCG2000 8-64 kHz
SCG2010 19.44 MHz
SCG2020 19.44 MHz
SCG2030 8-64 kHz
SCG2050 8-64 kHz
SCG2070 19.44 MHz
40/60
40/60
40/60
45/55
40/60
40/60
= Input Ref Freq.
8 kHz
1.544 MHz to 125.0 MHz
19.44 MHz
Basic Model
19.44 MHz
77.76 MHz
= Input Ref Freq.
19.44 MHz
1.544 MHz to 125.0 MHz
77.76 MHz
Tight Duty Cycle
51.84 MHz, 77.76 MHz
51.84 MHz, 77.76 MHz
Ref Output = Osc Output
*Features which differentiate a model from the base model (SCG2000) are highlighted in boldface color and in the notes column.
Data Sheet #: SG235
Page ± of ±2
Rev: 22 Date: 28/±3/24
© Copyright 2004 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
Pin Description
All SCG2000 Models
Table 2
Pin #
Connection
Reference Output
TCK
Description
1
2
3
4
5
Output frequency is dependent on SCG model
JTAG pin that is used only by Connor-Winfield for programming. Do not connect
JTAG pin that is used only by Connor-Winfield for programming. Do not connect
Ground
TMS
Ground
Free Run Enable/TDI
Free Run enable pin. 1 = Free Run at nominal frequency 20ppm. Input is pulled to
GND
6
7
Loss of Reference (LOR)
Loss of Lock (LOL)
Reference Input
Alarm indicator. 1 = The reference has been lost.
Alarm indicator. 1 = Phase lock has been lost
Input reference frequency
8
9
Oscillator Output
Tri-State enable
Output frequency is dependent on SCG model
10
Tri State control for all outputs except Oscillator Output. 1 = Hi-Z, 0 = normal.
Input is pulled to GND.
11
12
13
14
Vcc
3.3V Supply Voltage.
TDO
JTAG pin that is used only by Connor-Winfield for programming. Do not connect
Control pin B used to select input frequency. Input is pulled to GND.
Control pin A used to select input frequency. Input is pulled to GND.
Input Freq. Select B
Input Freq. Select A
Typical Application
Figure 2
BITS
System
Signal
Input Select
Line Card 1
Timing Card #1
S
A
B
CW's SCG
2000/4000
MUX
A
Clock out
RCV
Y
CW's STM/MSTM module
Y
MUX
B
S
Line Card #N
Timing Card #N
S
A
CW's SCG
2000/4000
Clock out
RCV
A
MUX
CW's STM/MSTM module
Y
Y
B
MUX
B
S
System Select
Data Sheet #: SG235
Page 3 of ±2
Rev: 22 Date: 28/±3/24
© Copyright 2004 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
Absolute Maximum Rating
Table 3
All SCG2000 Models
Symbol
Vcc
Parameter
Minimum
-0.5
Nominal
Maximum
Units
Volts
Notes
Power Supply Voltage
Input Voltage
4
V1
-0.5
5.5
150
Volts
Ts
Storage Temperature
-65
deg. C
Specifications
All SCG2000 Models
Table 4
Parameter
Voltage
Specifications
Notes
1.0
3.3V 5ꢀ
Current
100 mA Typical
0 to 70°C
Temperature Range
Input Jitter Tolerance
(Input Jitter Frequencies > 10 Hz)
≥31.25us Typical (SCG2000, SCG2030, SCG2050)
>1 us Typical (SCG2010, SCG2015, SCG2020, SCG2070)
Jitter Bandwidth
Acquisition Time
Capture/Pull-in Range
Output Duty Cycle
Output Rise and Fall Time
Output Load
<15 Hz
Approx 1.0 second
25 ppm Minimum
2.0
40/60 ꢀ Min/Max @ 50ꢀ Level
3 ns @ 20ꢀ to 80ꢀ output level
30 pF
Alarms
LOR, LOL Status on seperate outputs
20 ppm
Free Run Accuracy
Package
Fr4 SM 0.78" x .83" x 0.35" (maximum)
60 ps Typical
TDEV
MTIE
750 ps Typical
Reference Output/Oscillator Output Offset ≤ 8 ns
Static Offset
26 ns Maximum
3.0, 5.0
4.0, 5.0
Dynamic Offset
20 ns Maximum
Input And Output Characteristics
Table 5
All SCG2000 Models
Symbol
VIH
Parameter
Minimum
Nominal
Maximum
Units
V
Notes
High Level Input Voltage
2
0
5.5
0.8
10
VIL
Low Level Input Voltage
V
TIO
I/O to Output Valid
nS
pF
CO
Output Capacitance
10
VHO
VIO
High Level Output Voltage loH = -4mA
Low Level Output Voltage loL = 8mA
Input Reference Signal Pulse Width
2.4
30
Vcc Min.
Vcc Max.
0.4
TIR
nS
NOTES: 1.0: Requires external regulation
2.0: From a 20 ppm offset in reference frequency
3.0: Offset between Reference Input and Reference Output @ room temp.
`
4.0: Offset change between Reference Input and Reference Output over temperature range from room temperature.
5.0: The SCG2015 will maintain an offset/skew, between the reference input and the oscillator output, of X 1ns. X is TBD.
Data Sheet #: SG235
Page 4 of ±2
Rev: 22 Date: 28/±3/24
© Copyright 2004 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
Output Jitter Specifications
Table 6
All SCG2000 Models
Jitter BW 10 Hz - 20 MHz
pS (RMS) m UI
SONET Jitter BW 12 KHz - 20 MHz
Frequency (MHz)
1.544
pS (RMS)
m UI
30 Typ.
30 Typ.
10 Typ.
10 Typ.
10 Typ.
10 Typ.
10 Typ.
10 Typ.
10 Typ.
10 Typ.
10 Typ.
10 Typ.
0.046 Typ.
0.061 Typ.
0.084 Typ.
0.164 Typ.
0.194 Typ.
0.205 Typ.
0.371 Typ.
0.457 Typ.
0.492 Typ.
0.518 Typ.
0.778 Typ.
1.25 Typ.
4 Typ.
0.006
2.048
4 Typ.
0.008
8.448
1 Max., 0.5 Typ.
1 Max., 0.5 Typ.
1 Max., 0.5 Typ.
1 Max., 0.5 Typ.
1 Max., 0.5 Typ.
1 Max., 0.5 Typ.
1 Max., 0.5 Typ.
1 Max., 0.5 Typ.
1 Max., 0.5 Typ.
1 Max., 0.5 Typ.
0.008 Max.
0.016 Max.
0.019 Max.
0.020 Max.
0.037 Max.
0.045 Max.
0.049 Max.
0.052 Max.
0.078 Max.
0.125 Max.
16.384
19.44
20.48
37.056
44.736
49.152
51.84
77.76
125.0
* Note: These jitter specs only apply to version 2 models
Output Programming
Alarm Status
All SCG2000 Models
Table 7
All SCG2000 Models
Table 8
Tristate Free Run Output
LOL Output LOR Output Alarm Output
0
1
0
0
X
1
Locked to reference selected (default)
Hi-Z Tristate condition
0
1
X
0
0
1
No alarm
Loss-of-Lock
Loss-of-Reference
Free run at nominal frequency
Maximum Package Dimensions
Figure 3
Recommended Footprint Dimensions
Figure 4
0.800" [20.32mm]
0.640" [16.26mm]
0.080" [2.03mm]
0.050"
[1.27mm]
0.050"
[1.27mm]
0.650"
[16.51mm]
0.100" [2.54mm]
Data Sheet #: SG235
Page 5 of ±2
Rev: 22 Date: 28/±3/24
© Copyright 2004 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
Tape and Reel Dimensions
Figure 5
Data Sheet #: SG235
Page 6 of ±2
Rev: 22 Date: 28/±3/24
© Copyright 2004 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
SCG±222 Typical TDEV
Figure 6
100.0E-12
10.0E-12
1.0E-3
10.0E-3
100.0E-3
1.0E+0
10.0E+0
Integration Time (τ)
(seconds)
SCG±222 Typical MTIE
Figure 7
1.0E-9
100.0E-12
1.0E-3
10.0E-3
100.0E-3
1.0E+0
10.0E+0
100.0E+0
Observation Window (S)
(seconds)
Data Sheet #: SG235
Page 7 of ±2
Rev: 22 Date: 28/±3/24
© Copyright 2004 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
SCG±222 Switch from Free Run to a new Reference
Figure 8
000.0E+0
-10.0E-6
-20.0E-6
-30.0E-6
-40.0E-6
-50.0E-6
-60.0E-6
0
1
2
3
4
5
6
7
8
Time (sec)
SCG±222 Switch from a Reference to Free Run
Figure 9
2.0E-6
1.0E-6
000.0E+0
-1.0E-6
-2.0E-6
-3.0E-6
-4.0E-6
-5.0E-6
-6.0E-6
-7.0E-6
-8.0E-6
0
1
2
3
4
5
6
7
8
9
10
11
Time (sec)
Data Sheet #: SG235
Page 8 of ±2
Rev: 22 Date: 28/±3/24
© Copyright 2004 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
SCG±222 Step Response due to a -±2ppm Freq. Step
Figure 10
200.0E+0
000.0E+0
-200.0E+0
-400.0E+0
-600.0E+0
-800.0E+0
-1.0E+3
-1.2E+3
-1.4E+3
-1.6E+3
-1.8E+3
4
4.2
4.4
4.6
4.8
5
5.2
5.4
5.6
5.8
6
Time (sec)
SCG±222 1µs Phase Transient Response
Figure 11
1.2E-6
1.0E-6
800.0E-9
600.0E-9
400.0E-9
200.0E-9
000.0E+0
-200.0E-9
4
5
6
7
8
Time (sec)
Data Sheet #: SG235
Page 9 of ±2
Rev: 22 Date: 28/±3/24
© Copyright 2004 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
SCG±222 Jitter Attenuation
Figure 12
Jitter Attenuation vs. Input Frequency
0.0
-5.0
-10.0
-15.0
-20.0
-25.0
-30.0
-35.0
-40.0
-45.0
1
10
100
1000
INPUT Jitter frequency (Hz)
Typical System Test Setup
Figure 13
GPS or LORAN
Timing Source
This devicesupplies system time
information. It can be thought of as
supplying "absolute time" reference
information
PossibleChoice :
Stanford Research Model: FS700
S
am
p
l
e
M
T
IE
D
a
t
f
r
S
T
M
-
S
3/
M
S
T
M
-
S
3
1
0
0
1
.0
.0
.0
.0
E
E
E
-6
-9
-9
T
y
p
ic
a
t
lr
e
e
s
po
R
n
s
e
-
3
9
0
8
0
0
s
ec
o
n
d
t
e
s
t-
J
i
e
r
a
p
p
i
d
(
2
U@I
1
0
H
z)
r
e
fd
a
A
P
2
91
k
d
h
1
0
1
10
MHz
MT
IE
1
1
2
2
4
4
4
4
-5
-5
.
.
2
2
M
M
a
a
s
s
k
k
(
(
A
B
)
)
1
2
4
4
5
-5
3
.
6
5
M
a
4
s
k
.
GR2
-
.4
.
.3
2
E
1
-9
0
0
.0
E
-3
1.
0
E+
0
1
0
.0
E
+0
b s e r vati on Tmi
1
0
.0
0
E+
0
1
n
.
0E
o
+
3
1
d
0
0
+
3
O
e
(
s)
Co
p
y
i
g
t
1
9
9
8
Co
n
r
W
i
n
e
d
l
l
i
h
t
e
s
e
rv
e
Target System Under Test
External
DS1 rateRZ (1.544MHz),E1 rateRZ or 8 kHz
clock RZ withnoise modulation
R e fe r e nc e I n pu t
Arbitrary
Waveform
Generator
Standards
Compliance
Documents
Clock or BITSlogic level clock
input (TTL, CMOS, etc.)
MTIE, TDEV, Wander Transfer,
and Wander Generation Plots
S
amp el Wan
de
rG
e
ne
r at
i
on
(
T
D EV )fo rS TM /M ST M-S3
1
0
.0
.0
E
E
-6
-9
10
T
er
k
yp
f
hd
i
d
ca
ta
l
e
er
A
s
P
p
R
o
n
2
s
-
0
9
0
8
0
s
e
c
o
d
t
s
t
-J
i
t
er
a
p
p
lie
d
(
2
UI
@
0
H
z
2
1
9
MHz
1
0
. . . . ...
1
0
1
.0
.0
E
E
-9
-9
TDEV
G
R
1
2
2
4
4
4
4
-
-
Fig
Fig
5
5
.
1
3
G
R
1
-
Arbitrary
Waveform
Generator
[Noise
1
0
0
.0
E
-1
2
01
.
0E
-
3
1
0
0
.0
E
-
3
.
g
0
.0
E
+
0
1
0
0.
0
E
o
+0
r
1
0
E
+
3
I
n
te1
rE0 a+ 0
t
io
n
Ti
m
e
(
se c)1
Co
p
y
rig
h
t
1
9
8
C
o
n
-
i
i
e
d
a
l
r
ig
h
ts
r
e
es
r
v
ed
External
R e fe r e nc e I n pu t
Source]
Time-stamped ensemble
based onabsolute time
reference(10MHz input)
10
MHz
DS1 rate [1.544MHz] BITSBipolar
DS-1, OC-3, OC-12 electrical or optical signals
Phase Error data output
Tektronix
SJ300E
External
Reference Input
10
HP53310A
Modulation Analyzer / Time Interval Analyzer
MHz
Wander Analyzer data (IEEE-488)
External
R e fe r e nc e I n pu t
IEEE-488 Contr ol ler
Platformfor software
HP53305A Phase Analyzer
HPE1748ASync Measurement
Tektronix Wander Analyzer
Data Sheet #: SG235
Page 12 of ±2
Rev: 22 Date: 28/±3/24
© Copyright 2004 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
Alarm Timing Diagram
Figure 14
Start-up
Region
LOR
Output
4
LOL
Output
2
1
1
Phase
Detector
3
External
Reference
Internal
Reference
2
2
2
2
2
2
2
2
2
2
2
2
2
2
LOR
Output
LOL
Output
5
1
1
1
1
1
Phase
Detector
3
3
External
Reference
Internal
Reference
2
2
2
2
2
2
2
2
2
2
2
2
2
2
19.44 MHz &77.76 MHz
8 kHz Reference Input Units
Reference Input Units
< 1 µsec
< 31.±5 µsec
31.±5 µsec
1
1 µsec
2
3
4
5
> 1 µsec
> 31.±5 µsec
LOR is active when LOL is active
1±5 µsec wide range
Minimum pulse width = ± µsec
Minimum pulse width = 6±.5 µsec
During Start-up, The LOL Alarm will pulse
during the first second of operation
Start-up Region
Data Sheet #: SG235
Page 11 of ±2
Rev: 22 Date: 28/±3/24
© Copyright 2004 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
Solder Profile
Figure 15
250
200
150
Temp
(Deg C)
100
50
0
1
2
3
4
5
6
7
8
Time (minutes)
Recommended Reflow Profile
Peak Temp:
Max Rise Slope:
C/Sec
217 Deg C
1.5 Deg
Time Above 150 C: 100 Sec
Ordering Information
SCG{XXXX}-{FFF.FFF}{M}
XXXX equals a specific model (2000, 2010, 2020, 2030, 2050, 2070)
FFF.FFF equals the Oscillator Output frequency (001.544, 002.048, 008.448, 016.384, 019.44,
020.48, 037.056, 044.736, 049.152, 051.84, 077.76, 125.0)
M equals MHZ and is added to all part numbers
Example: To order an SCG2000 with an Oscillator Output of 77.76 MHz,
Order part number SCG2000-077.76M
Please contact Connor-Winfield for other frequencies that may be available.
Data Sheet #: SG235
Page 1± of ±2
Rev: 22 Date: 28/±3/24
© Copyright 2004 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
SCG±222
The SCG2000 is Connor-Winfield’s base model
SCG±222 Individual Features:
• Four selectable References:
8, 16, 32, and 64 kHz.
for the SCG2000 Series product line. The
SCG2000 can lock to one of four input
reference frequencies from 8 to 64 kHz which is
selectable using two input control pins.
• Oscillator Output Available:
1.544 MHz to 125.0 MHz.
Input Reference Selection
Table 9
SCG2000
Input Sel A
(Pin #14)
Input Sel B
(Pin #13)
Reference Frequency
(Pin #8)
0
1
0
1
0
0
1
1
8 kHz (default)
16 kHz
32 kHz (see note 4.0)
64 kHz (see note 4.0)
Reference and Output Availability
Table 10
SCG2000
Input Reference
(Pin #8)
Oscillator Output
(Pin #9)
Reference Output
(Pin #1)
8 kHz
16 kHz
8 kHz
16 kHz
19.44 MHz
8 kHz
16 kHz
32 kHz
8 kHz
16 kHz
32 kHz
38.88 MHz
8 kHz
8 kHz
16 kHz
32 kHz
64 kHz
16 kHz
32 kHz
64 kHz
1.544, 2.048, 16.384 20.48, 37.056,
44.736, 49.152, 51.84 and 77.76 MHz
8 kHz
125.0 MHz
8 kHz
Notes:
Note 4.2:
Not available with 19.44 MHz output.
Data Sheet #: SG235
Page 13 of ±2
Rev: 22 Date: 28/±3/24
© Copyright 2004 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
SCG±212
The SCG2010 is designed as a clean-up PLL
SCG±212 Individual Features:
• Input References (Pin #8) at 19.44 MHz.
with the input reference frequency (Pin #8)
equal to the oscillator output (Pin #9). The
reference output frequency (Pin #1) is 8 kHz.
The LOL alarm is designed to tolerate 1µs
p-p of jitter on the reference. Jitter greater
than 1µs p-p will result in LOL alarm pulses.
• Oscillator Output (Pin #9) at 19.44 MHz.
• Reference Output (Pin #1) at 8 kHz.
Input Reference Selection
Table 11
SCG2010
Input Sel A
(Pin #14)
Input Sel B
(Pin #13)
Reference Frequency
(Pin #8)
X
X
19.44 MHz (Default)
X= Don’t Care
Reference and Output Availability
Table 12
SCG2010
Input Reference
(Pin #8)
Oscillator Output
(Pin #9)
Reference Output
(Pin #1)
19.44 MHz
19.44 MHz
8 kHz
Data Sheet #: SG235
Page 14 of ±2
Rev: 22 Date: 28/±3/24
© Copyright 2004 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
SCG±2±2
The SCG2020 accepts a 19.44 MHz Input
Reference (Pin #8) and provides a 19.44
MHz Output Reference (Pin #1) and a
77.76 MHz signal output on Output #2.
The LOL alarm is designed to tolerate 1µs
p-p of jitter on the reference. Jitter greater
than 1µs p-p will result in LOL alarm
pulses.
SCG±2±2 Individual Features:
• Input References (Pin #8) at 19.44 MHz.
• Oscillator Output (Pin #9) at 77.76 MHz.
• Reference Output (Pin #1) at 19.44 MHz.
Input Reference Selection
Table 15
SCG2020
Input Sel A
(Pin #14)
Input Sel B
(Pin #13)
Reference Frequency
(Pin #8)
X
X
19.44 MHz (Default)
X= Don’t Care
Reference and Output Availability
Table 16
SCG2020
Input Reference
(Pin #8)
Oscillator Output
(Pin #9)
Reference Output
(Pin #1)
19.44 MHz
77.76 MHz
19.44 MHz
Data Sheet #: SG235
Page 15 of ±2
Rev: 22 Date: 28/±3/24
© Copyright 2004 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
SCG±232
The SCG2030 is similar to the SCG2000
but with a tighter duty cycle of 45/55.
SCG±232 Individual Features:
• Four selectable References:
8, 16, 32, and 64 kHz.
• Oscillator Output Available:
1.544 MHz to 125.0 MHz.
• Tight Duty cycle
Input Reference Selection
Table 17
SCG2030
Input Sel A
(Pin #14)
Input Sel B
(Pin #13)
Reference Frequency
(Pin #8)
0
1
0
1
0
0
1
1
8 kHz (default)
16 kHz
32 kHz (see note 4.0)
64 kHz (see note 4.0)
Reference and Output Availability
Table 18
SCG2030
Input Reference
(Pin #8)
Oscillator Output
(Pin #9)
Reference Output
(Pin #1)
8 kHz
16 kHz
8 kHz
16 kHz
19.44 MHz
8 kHz
16 kHz
32 kHz
64 kHz
1.544, 2.048, 8.448, 16.384,17.408 MHz 8 kHz
1.544, 2.048, 8.448, 20.48, 37.056 MHz 16 kHz
8.448, 16.384, 44.736, 49.152 MHz
8.448, 51.84 and 77.76 MHz
32 kHz
64 kHz
8 kHz
125.0 MHz
8 kHz
Notes:
Note 4.2:
Not available with 19.44 MHz output.
Data Sheet #: SG235
Page 16 of ±2
Rev: 22 Date: 28/±3/24
© Copyright 2004 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
SCG±252
The SCG2050 can use any 1 of 4
SCG±252 Individual Features:
• Four selectable References:
8, 16, 32, and 64 kHz.
selectable Input Reference frequencies
with an Oscillator output of 77.76 MHz and
a Reference Output of 19.44 MHz
• Oscillator Output Available:
77.76 MHz only
Input Reference Selection
Table 19
SCG2050
Input Sel A
(Pin #14)
Input Sel B
(Pin #13)
Reference Frequency
(Pin #8)
0
1
0
1
0
0
1
1
8 kHz (default)
16 kHz
32 kHz
64 kHz
Reference and Output Availability
Table 20
SCG2050
Input Reference
(Pin #8)
Oscillator Output
(Pin #9)
Reference Output
(Pin #1)
8 kHz
16 kHz
32 kHz
64 kHz
77.76 MHz
77.76 MHz
77.76 MHz
77.76 MHz
19.44 MHz
19.44 MHz
19.44 MHz
19.44 MHz
Data Sheet #: SG235
Page 17 of ±2
Rev: 22 Date: 28/±3/24
© Copyright 2004 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
SCG±272
The SCG2070 is designed to provide two
output frequencies that are equal. The
Reference Output is actually a second
Oscillator Output. SCG2070 is available
with either 77.76 MHz outputs or with
51.84 MHz outputs. The LOL alarm is
designed to tolerate 1µs p-p
SCG±272 Individual Features:
• Input References (Pin #8) at 19.44 MHz.
• Oscillator Output (Pin #9) equals Reference
Output (Pin #1)
of jitter on the reference. Jitter greater than
1µs p-p will result in LOL alarm pulses.
Input Reference Selection
Table 21
SCG2070
Input Sel A
(Pin #14)
Input Sel B
(Pin #13)
Reference Frequency
(Pin #8)
X
X
19.44 MHz (Default)
X= Don’t Care
Reference and Output Availability
Table 22
SCG2070
Input Reference
(Pin #8)
Oscillator Output
(Pin #9)
Reference Output
(Pin #1)
19.44 MHz
19.44 MHz
77.76 MHz
51.84 MHz
77.76 MHz
51.84 MHz
Data Sheet #: SG235
Page 18 of ±2
Rev: 22 Date: 28/±3/24
© Copyright 2004 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
Data Sheet #: SG235
Page 19 of ±2
Rev: 22 Date: 28/±3/24
© Copyright 2004 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
2111 Comprehensive Drive
Aurora, Illinois 60505
Phone: 630- 851- 4722
Fax: 630- 851- 5040
www.conwin.com
Revision
Revision Date
Note
00
8/23/04
Final Release
相关型号:
©2020 ICPDF网 联系我们和版权申明