CN813T [CONSONANCE]

Low Power Microprocessor Supervisory Circuits;


型号：	CN813T
厂家：	Shanghai Consonance Electronics Incorporated
描述：	Low Power Microprocessor Supervisory Circuits
文件：	总14页 (文件大小：390K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

CONSONANCE

Low Power Microprocessor Supervisory Circuits

CN705/706/707/708/813

Description：

Features：

CN705/706/707/708/813 series is a family of

microprocessor (uP) supervisory circuit that

monitors microprocessor’s supply voltage and

battery voltage. CN705/706/707/708/813

series integrates uP reset circuit with 200ms

delay, Watchdog, manual reset circuit and a

power fail comparator with 1.22V threshold.

These devices reduce system complexity,

hence improve system reliability.

ꢀ

Guaranteed

_CC=1.15V

reset

valid

ꢀ

Reset threshold can be from 2.6V to

5.0V with 0.1V step.

ꢀ

Low operating current: 52uA @5V

Reset pulse width: 200ms

Independent watchdog timer, 1.6s

timeout(CN705/706/813)

ꢀ

Voltage monitor for power fail or

low battery warning

CN705/706/707/708/813 series has several

functional options. Each device

generates

Pin-to-pin compatible with industry

standard 705/706/707/708/813

Available in DIP8 and SOP8

a reset signal when VCC is lower than reset

threshold. In addition, CN705, CN706 and

CN813 have a watchdog timer whose timeout

period is 1.6s. CN707 and CN708 provide

both active low and active high reset signals,

but have no watchdog function. CN813 are

same as CN705/706 except active high reset is

provided instead of active low.

Pin Assignment:

MR 1

WDO

CN705

CN706

CN813

RESET

(RESET)

VCC

CN705/706/707/708/813 series is ideal for

applications in automotive systems, computers,

controllers and intelligent instruments. All

devices are available in 8 pin DIP and 8 pin

SOP package.

GND

PFI

WDI

PFO

RESET

Applications：

VCC

CN707

CN708

ꢀ

Computers

GND

PFI

Controllers

Intelligent instruments

Automotive systems

PFO

Rev.1

CONSONANCE

Typical Application Circuit:

VCC

MCU

VCC

CN705/6/813

RESET

I/O

RESET

PFI

WDI

WDO

PFO

NMI

INT

GND

Figure 1 Typical Application Circuit

Device Function Reference Table

Reset

Reset active

Watchdog

Function

Yes

Operating

Part No.

threshold

4.65V

4.4V

Low or High

Low

Temperature

－40℃--85℃

CN705

CN707

Low and High

High

CN813L

CN706

Yes

Low

Yes

CN708

4.4V

Low and High

High

CN813M

CN706J

CN708J

CN813J

CN706T

CN708T

CN813T

CN706S

CN708S

CN813S

CN706R

CN708R

CN813R

(CN706P)

4.4V

Yes

4.0V

Low

Yes

4.0V

Low and High

High

4.0V

Yes

3.08V

2.93V

2.63V

Low

Yes

Low and High

High

Yes

Low

Yes

Low and High

High

Yes

Low

Yes

Low and High

2.63V

High

Yes

－40℃--85℃

Note: Please contact our sales office for other reset threshold from 2.6V to 5.0V

Rev.1

CONSONANCE

Ordering Information:

Ordering Code = Part No. + Package Code

P: stands for DIP8

S: stands for SOP8

Refer to Device Function Reference

Table on Page 2

Block Diagram:

WDI

Detector

WDI

Watchdog

Timer

WDO

VCC

OSC

VCC

CN705

CN706

CN813

RESET

Generator

RESET

(RESET)

1.22V

PFI

PFO

( ) for CN813X and CN706P

GND

Figure 2

CN705/706/813 block Diagram

Rev.1

CONSONANCE

VCC

CN707

CN708

RESET

OSC

VCC

RESET

Generator

RESET

PFO

1.22V

PFI

GND

Figure 3 CN707/708 Block Diagram

Rev.1

CONSONANCE

Pin Description：

Pin No.

Name

Function Description

CN705

CN707

CN813X

CN706P

CN706X CN708X

Manual reset input. When voltage at

pulled low, a reset pulse will be triggered. The

active low input has a pull up current. It can be

driven by TTL or CMOS logic as well as

shorted to GND with a switch.

VCC

GND

Positive supply input

Negative supply input

Power fail monitor input. When the voltage at

PFI is below 1.22V，PFO goes low . Connect

PFI to GND or VCC when not used.

PFI

Power fail monitor output. When the voltage at

PFI is less than 1.22V, PFO goes low; otherwise

PFO goes high.

PFO

Watchdog input. If WDI remains high or low

for 1.6s, the on chip watchdog timer runs out

and WDO goes low. Floating WDI or

connecting WDI to high impedance three state

buffer disables watchdog function. The

watchdog timer clears whenever RESET is

asserted, or WDI is three stated, or WDI sees a

rising or falling edge.

WDI

Active low reset output.

stays in low

if VCC is lower than reset threshold; it remains

in low for 200ms after VCC becomes higher

RESET

WDO

than reset threshold or

goes from low to

high.(Figure 5）

Watchdog output. WDO goes low if watchdog

timer finishes its 1.6s count, and will not go

high again until the watchdog timer is cleared.

Whenever VCC is below reset threshold, WDO

stays low, and as soon as VCC rises above reset

threshold, WDO goes high without delay.

Active high reset output. RESET stays in high

if VCC is lower than reset threshold; it remains

in high for 200ms after VCC becomes higher

RESET

than reset threshold or

high.(Figure 5)

goes from low to

Rev.1

CONSONANCE

Absolute Maximum Ratings：

Terminal Voltage(With respect to GND)：

V_CC…………………………-0.3V to 6.0V

Other Inputs ……….………..-0.3V to 6.0V

Terminal Current

Thermal Resistance (DIP8)………120℃/W

Power Dissipation (SOP8)………190℃/W

Maximum Junction Temperature…...150℃

Operating Temperature…...－40℃ to 85℃

Storage Temperature….....－65℃ to 150℃

Lead Temperature(Soldering)……..300℃

ESD Rating(HBM)………………….2KV

V_CC………………………….20mA

GND…………………………20mA

All Input Pins………………..20mA

All Output Pins………………20mA

Stresses beyond those listed under ‘Absolute Maximum Ratings’ may cause permanent damage to the device. These are stress

ratings only and functional operation of the device at these or any other conditions above those indicated in the operational

sections of the specifications is not implied. Exposure to Absolute Maximum Rating Conditions for extended periods may

affect device reliability.

Electrical Characteristics

(V_CC=5V, T_A=－40℃ to 85℃, Typical values are measured at T_A=25℃,unless otherwise noted)

Parameters

Operating Voltage

Range

Symbol Test Conditions

Min

Typ

Max

Unit

1.15

5.5

V_CC

CN705/706X/813X

105

Supply Current

I_VCC

CN707/708X

CN705/707/813L

CN706/708/813M

4.5

4.65

4.4

4.75

4.5

4.25

3.9

CN706J/708J/813J

V_RES

4.0

4.1

Reset Threshold

CN706T/708T/813T

3.0

3.08

2.93

2.63

3.15

3.0

CN706S/708S/813S

2.85

CN706P/706R/708R/813R 2.55

2.70

Reset

Threshold

H_VRES

0.01V

RES

Hysteresis

Reset Pulse Width

140

200

280

t_RES

_SOURCE=800uA

V_CC-1.2

1.0

V_OH1

or RESET

_SOURCE=8uA,V_CC=1.2V

_SINK=3.2mA

Output Voltage

0.3

V_OL1

_SINK=150uA,V_CC=1.2V

Watchdog timeout

period

1.6

2.25

t_WD

t_WP

V_CC=5V

_CC<4.5V

WDI Pulse Width

120

Low

0.16V_CC

WDI

Input

3.5

V_CC=5V

Threshold

High

V_CC<4.5V

0.75V_CC

Rev.1

CONSONANCE

Electrical Characteristics (Continued)

Parameters

Symbol

Test Conditions

Min.

Typ.

Max.

Unit

WDI Pull up

Resistance

125

250

500

KΩ

V_CC>V_RES

WDI Pull down

Resistance

175

350

KΩ

V_CC>V_RES

WDO

Output

V_OH2

V_OL2

I_SOURCE=800uA

I_SINK=3.2mA

V_CC-1.2

Voltage

0.3

600

360

180

105

100

250

152

V_CC=5V

Pull

V_CC=4V

V_CC=3V

V_CC=2.5V

MR=0V

Current

150

500

V_CC=5V

MR Pulse Width

T_MR

V_CC<4.5V

Low

High

Low

High

0.8

V_CC=5V

Input

2.0

Threshold

0.16V_CC

V_CC<4.5V

0.65V_CC

MR’s Delay to

RESET

250

750

V_CC=5V

tMD

V_CC<4.5V

PFI

Input

1.184

1.22

1.256

V_PFI

Threshold

PFI Input Current

I_PFI

PFO

Output

V_OH3

I_SOURCE=800uA

I_SINK=3.2mA

V_CC-1.2

Voltage

0.3

V_OL3

Note : Parts are 100% production tested at 25^oC. Specifications over full temperature range are

guaranteed by 6-sigma statistical process control and by design

Rev.1

CONSONANCE

Typi cal Oper at i ng Char act er i st i cs

CN706 Operating Current

vs. Temperature

CN706 Operating Current

vs. Operating Voltage

VCC=5V

-40 -20

20 40 60 80 100

2.5

3.5

4.5

5.5

Temperature

Operating Voltage(V)

Power- fail Comparator

De-assertion Response Time

Power- fail Comparator

assertion Response Time

+5V

PFI

PFO

+5V

PFO

300pF

PFI

PFO

+1.22V

300pF

+1.22V

+1.30V

PFI

+1.20V

200ns/div

400ns/div

Detailed Description：

CN705/706/707/708/813 series is a microprocessor supervisory circuit that monitors the power supply to

digital circuits such as microprocessor, controller and memory . These devices assert reset during power up,

power down or brownout condition to prevent code execution errors.

RESET output

On power up, once VCC reaches 1.15V, CN705/706/707/708/813 series output a reset signal . As VCC

increases, the reset signal stays valid; When VCC rises above reset threshold, an internal timer releases

RESET (

) after 200ms. RESET (

) becomes valid once VCC dips below reset threshold

during power down or in brownout condition. If brownout occurs in the middle of a previously initiated

Rev.1

CONSONANCE

reset pulse, the pulse will continue for at least another 140ms. On power down , once VCC falls below reset

threshold, RESET stays valid and is guaranteed in the correct logic state until VCC drops below 1.15V

for the whole temperature range. Please refer to Figure 5.

CN705/706 series provide active low

signal；CN707/708 series provide both active high and

active low RESET signals；CN813 series provide active high RESET signal.

Watchdog Timer

CN705/706/813 series have an independent watchdog timer that can monitor uP’s activity. If uP does not

toggle the watchdog input (WDI) within 1.6s and WDI is not three-stated, WDO goes low. As long as

RESET is asserted, or WDI is three-stated, or WDI is left floating, the watchdog timer stays cleared and

will not count, in this case WDO is in high state. When VCC stays below reset threshold, WDO goes low

whether or not the watchdog timer has timed out yet. Please refer to figure 4.

Manual Reset

Manual reset input allows reset signal to be triggered by push button or switch. The push button or switch

is effectively debounced by 140ms minimum reset pulse width.

can be used to force a watchdog timeout to generate a reset pulse in CN705/706/813 series by connecting

WDO to Please refer to Figure 5.

is TTL/CMOS logic compatible.

Power fail Comparator

The power fail comparator can be used for various purpose because its output and noninverting input are

not internally connected. The inverting input is internally connected to a 1.22V reference voltage.

tWD

WDI

WDO

RESET

tRES

RESET

Note 1: RESET (RESET) is triggered by MR

Note 2: RESET is for CN813X and CN706P only

Figure 4 Watchdog Timing

Rev.1

CONSONANCE

VCC

VRES

tMD

RESET

tRES

WDO

Note: Active high RESET is the inverse of the RESET shown

Figure 5 RESET,MR and WDO timing with WDI floating

Application Information

Ensuring a Valid

Output Down to VCC=0V

When VCC falls below 1.15V, the CN705/706/707/708 series

output no longer sinks current, it

becomes an open circuit, hence

added from

output is at undetermined voltage. If a pull-down resistor is

output will be held at low state.

pin to GND as shown in Figure 6, then

The resistor’s value is not critical. it should be about 100KΩ, large enough not to load

, small

enough to pull RESET to ground.

CN705/6/7/8

RESET

Figure 6 RESET Valid to Ground Circuit

Monitoring voltages other than the unregulated DC Input

You can monitor voltages other than the unregulated DC by connecting a voltage divider to PFI and

adjusting the ratio appropriately. If required, add a hysteresis by connecting a resistor (with a value

approximately 10 times the sum of 2 resistors in voltage divider network) between PFI and PFO. A

capacitor between PFI and GND will reduce the power fail circuit’s sensitivity to high-frequency noise on

Rev.1

CONSONANCE

the line being monitored. RESET can be asserted on the other voltage in addition to VCC line by

connecting PFO pin to MR pin, in this case, a RESET pulse will be initiated when PFI drops below 1.22V.

Figure 7 shows CN705/706/707/708 series configured to assert RESET when VCC falls below reset

threshold, or when +12V power supply falls below 10V.

+12V +5V

VCC

To uP

RESET

CN705/6/7/8

PFI

PFO

139K

Figure 7 Monitoring Both +5V and +12V

Monitoring a Negative Voltage

The power fail comparator can also monitor a negative supply rail as shown in Figure 8. When the negative

rail is good (A negative voltage of large magnitude), PFO is low, and when the negative rail is degraded(A

negative voltage of less magnitude), PFO is high. By adding the resistors and transistor as shown, a high

PFO triggers a RESET pulse. As long as PFO remains high, the CN705/706/707/708/813 series will keep

RESET asserted. Note that the circuit’s accuracy depends on the PFI threshold tolerance, the VCC line and

the resistors.

+5V

100K

VCC

CN705/6/7/8

100K

9011

PFO

PFI

To uP

RESET

GND

V-

Figure 8 Monitoring A Negative Voltage

Interfacing to uPs with Bidirectional Reset Pins

uPs with bi-directional reset pins, such as the MOTOROLA 68HC11 series, can contend with

CN705/706/707/708/813 series RESET output. For example, if the RESET output is driven high and uP

wants to pull it low, indeterminate logic levels may result. To correct this, connect a 4.7KΩ resistor

Rev.1

CONSONANCE

between the RESET output and the uP reset I/O as shown in Figure 9. Buffer the RESET output to other

system components.

Buffered RESET to other

system components

VCC

CN705/6/7/8

4.7K

RESET

GND

Figure 9 Interfacing to uPs with Bidirectional Reset I/O

Rev.1

CONSONANCE

Package I nf or mat i on

SOP8 Package Out l i ne Di mensi ons

Rev.1

CONSONANCE

DI P8 Package Out l i ne Di mensi ons

Rev.1

CN813T [CONSONANCE]

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