C2M0040120D_15 [CREE]
N-Channel Enhancement Mode;
| 型号： | C2M0040120D_15 |
| 厂家： | 
CREE, INC |
| 描述： | N-Channel Enhancement Mode |
| 文件： | 总10页 (文件大小：961K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
VDS
ID
RDS(on)
1200 V
60 A
@
25˚C
C2M0040120D
40 mΩ
Silicon Carbide Power MOSFET
C2MTM MOSFET Technology
N-Channel Enhancement Mode
Features
Package
•ꢀ High Blocking Voltage with Low On-Resistance
•ꢀ High Speed Switching with Low Capacitances
•ꢀ Easy to Parallel and Simple to Drive
•ꢀ Avalanche Ruggedness
•ꢀ Resistant to Latch-Up
•ꢀ Halogen Free, RoHS Compliant
TO-247-3
Benefits
•ꢀ HigherꢀSystemꢀEfficiency
•ꢀ Reduced Cooling Requirements
•ꢀ Increased Power Density
•ꢀ Increased System Switching Frequency
Applications
•ꢀ Solar Inverters
•ꢀ Switch Mode Power Supplies
•ꢀ High Voltage DC/DC converters
•ꢀ Battery Chargers
Part Number
Package
TO-247-3
C2M0040120D
•ꢀ Motor Drives
•ꢀ Pulsed Power Applications
Maximum Ratings (TCꢀ=ꢀ25ꢀ˚Cꢀunlessꢀotherwiseꢀspecified)
Symbol
Parameter
Drain - Source Voltage
Value
Unit
Test Conditions
Note
VGS = 0 V, IDꢀ=ꢀ100ꢀμA
1200
-10/+25
-5/+20
60
V
V
V
VDSmax
VGSmax
VGSop
Gate - Source Voltage
Gate - Source Voltage
Absolute maximum values
Recommended operational values
Fig. 19
VGS = 20 V, TC =ꢀ25˚C
VGS = 20 V, TC =ꢀ100˚C
Continuous Drain Current
Pulsed Drain Current
A
A
ID
40
160
330
Fig. 22
Fig. 20
ID(pulse)
PD
Pulse width tP limited by Tjmax
Power Dissipation
W
˚C
˚C
TC=25˚C,ꢀT ꢀ=ꢀ150ꢀ˚C
J
-55 to
+150
Operating Junction and Storage Temperature
Solder Temperature
T , Tstg
J
260
1.6mmꢀ(0.063”)ꢀfromꢀcaseꢀforꢀ10s
TL
1
8.8
Nm
lbf-in
Mounting Torque
M3 or 6-32 screw
Md
1
C2M0040120D Rev. B, 10-2015
Electrical Characteristics (TCꢀ=ꢀ25˚Cꢀunlessꢀotherwiseꢀspecified)
Symbol
Parameter
Min.
1200
2.0
Typ.
Max. Unit
Test Conditions
Note
V(BR)DSS
Drain-Source Breakdown Voltage
V
VGS = 0 V, IDꢀ=ꢀ100ꢀμA
2.6
2.1
1
4
VDS = VGS , ID = 10mA
V
V
VGS(th)
Gate Threshold Voltage
Fig. 11
VDS = VGS , ID = 10mA,TJ = 150 °C
VDS = 1200 V, VGS = 0 V
VGS = 20 V, VDS = 0 V
IDSS
IGSS
Zero Gate Voltage Drain Current
Gate-Source Leakage Current
100
250
52
μA
nA
40
84
VGS = 20 V, ID = 40 A
RDS(on)
Drain-Source On-State Resistance
Transconductance
mΩ
Fig. 4,5,6
Fig. 7
VGS = 20 V, ID = 40 A, TJ = 150 °C
VDS= 20 V, IDS= 40 A
15.1
13.2
gfs
S
VDS= 20 V, IDS= 40 A, TJ = 150 °C
Ciss
Coss
Crss
Eoss
EAS
EON
EOFF
td(on)
tr
Input Capacitance
1893
150
10
VGS = 0 V
Output Capacitance
pF
Fig. 17,18
VDS = 1000 V
Reverse Transfer Capacitance
Coss Stored Energy
f = 1 MHz
AC
V
= 25 mV
82
μJ
Fig 16
Fig. 29
Avalanche Energy, Single Pluse
Turn-On Switching Energy
Turn Off Switching Energy
Turn-On Delay Time
2
J
ID = 40A, VDD = 50V
1.0
0.4
15
VDS = 800 V, VGS = -5/20 V
mJ
ns
Fig. 25
ID = 40A, RG(ext)ꢀ=ꢀ2.5Ω,ꢀL=ꢀ80ꢀμH
VDD = 800 V, VGS = -5/20 V
ID = 40 A
RG(ext)ꢀ=ꢀ2.5ꢀΩ,ꢀꢀRLꢀ=ꢀ20ꢀΩ
Timing relative to VDS
Per IEC60747-8-4 pg 83
Rise Time
52
Fig. 27
td(off)
Turn-Off Delay Time
26
tf
RG(int)
Qgs
Qgd
Qg
Fall Time
34
1.8
28
,
Internal Gate Resistance
Gate to Source Charge
Gate to Drain Charge
Total Gate Charge
Ω
f = 1 MHz VAC = 25 mV
VDS = 800 V, VGS = -5/20 V
ID = 40 A
37
nC
Fig. 12
Per IEC60747-8-4 pg 21
115
Reverse Diode Characteristics
Symbol
Parameter
Typ.
Max.
Unit
Test Conditions
Note
3.3
3.1
V
V
A
VGS = - 5 V, ISD = 20 A, T = 25 °C
J
Fig. 8, 9,
10
VSD
Diode Forward Voltage
VGS = - 5 V, ISD = 20 A, T = 150 °C
J
IS
trr
Continuous Diode Forward Current
Reverse Recovery Time
60
TC= 25 °C
Note 1
54
283
15
ns
nC
A
VGS = - 5 V, ISD = 40 A T = 25 °C
J
VR = 800 V
dif/dt = 1000 A/µs
Qrr
Irrm
Reverse Recovery Charge
Note 1
Peak Reverse Recovery Current
Noteꢀ(1):ꢀWhenꢀusingꢀSiCꢀBodyꢀDiodeꢀtheꢀmaximumꢀrecommendedꢀVGS = -5V
Thermal Characteristics
Symbol
Parameter
Typ.
Max.
Unit
Test Conditions
Note
RθJC
RθJC
Thermal Resistance from Junction to Case
Thermal Resistance from Junction to Ambient
0.34
0.38
40
°C/W
Fig. 21
2
C2M0040120D Rev. B, 10-2015
Typical Performance
100
100
80
60
40
20
0
Conditions:
TJ = -55 °C
tp < 200 µs
Conditions:
TJ = 25 °C
tp < 200 µs
VGS = 20 V
GS = 18 V
VGS = 20 V
V
80
V
GS = 16 V
VGS = 16 V
VGS = 18 V
VGS = 14 V
60
40
20
0
V
GS = 14 V
VGS = 12 V
VGS = 12 V
VGS = 10 V
VGS = 10 V
0.0
0.0
0
2.5
5.0
Drain-Source Voltage, VDS (V)
7.5
10.0
0.0
2.5
5.0
Drain-Source Voltage, VDS (V)
7.5
10.0
Figure 1. Output Characteristics TJ = -55 °C
Figure 2. Output Characteristics TJ = 25 °C
100
80
60
40
20
0
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
Conditions:
TJ = 150 °C
tp < 200 µs
Conditions:
IDS = 40 A
VGS = 20 V
tp < 200 µs
VGS = 14 V
VGS = 16 V
VGS = 18 V
VGS = 20 V
V
GS = 12 V
V
GS = 10 V
-50
-25
0
25
50
75
100
125
150
2.5
5.0
Drain-Source Voltage, VDS (V)
7.5
10.0
Junction Temperature, TJ (°C)
Figure 4. Normalized On-Resistance vs. Temperature
Figure 3. Output Characteristics TJ = 150 °C
140
120
100
80
140
120
100
80
Conditions:
IDS = 40 A
tp < 200 µs
Conditions:
VGS = 20 V
tp < 200 µs
TJ = 150 °C
TJ = 25 °C
VGS = 14 V
VGS = 16 V
60
60
VGS = 18 V
TJ = -55 °C
40
40
VGS = 20 V
20
20
0
0
20
40
60
80
100
-50
-25
0
25
50
75
100
125
150
Drain-Source Current, IDS (A)
Junction Temperature, TJ (°C)
Figure 5. On-Resistance vs. Drain Current
For Various Temperatures
Figure 6. On-Resistance vs. Temperature
For Various Gate Voltage
3
C2M0040120D Rev. B, 10-2015
Typical Performance
60
-6
-5
-4
-3
-2
-1
0
Conditions:
VDS = 20 V
tp < 200 µs
0
Condition:
TJ = -55 °C
tp < 200 µs
VGS = -5 V
50
VGS = 0 V
TJ = 150 °C
-20
-40
-60
-80
-100
40
30
20
10
0
VGS = -2 V
TJ = 25 °C
TJ = -55 °C
0
2
4
6
8
10
12
14
Gate-SourceVoltage, VGS (V)
Drain-Source Voltage, VDS (A)
Figure 7. Transfer Characteristic for
Various Junction Temperatures
Figure 8. Body Diode Characteristic at -55 ºC
-6
-5
-4
-3
-2
-1
0
-6
-5
-4
-3
-2
-1
0
0
0
Condition:
TJ = 150 °C
tp < 200 µs
Condition:
TJ = 25 °C
tp < 200 µs
VGS = -5 V
VGS = -5 V
VGS = 0 V
VGS = 0 V
VGS = -2 V
-20
-40
-60
-80
-100
-20
-40
-60
-80
VGS = -2 V
-100
Drain-Source Voltage, VDS (A)
Drain-Source Voltage, VDS (A)
Figure 9. Body Diode Characteristic at 25 ºC
Figure 10. Body Diode Characteristic at 150 ºC
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
25
Conditions
DS = V
IDS = 10mA
Conditions:
V
GS
I
I
DS = 40 A
GS = 100 mA
20
15
10
5
VDS = 800 V
TJ = 25 °C
0
-5
-50
-25
0
25
50
75
100
125
150
0
20
40
60
80
100
120
140
Junction Temperature TJ (°C)
Gate Charge, QG (nC)
Figure 11. Threshold Voltage vs. Temperature
Figure 12. Gate Charge Characteristics
4
C2M0040120D Rev. B, 10-2015
Typical Performance
-6
-5
-4
-3
-2
-1
0
-6
-5
-4
-3
-2
-1
0
0
0
Conditions:
TJ = -55 °C
tp < 200 µs
Conditions:
TJ = 25 °C
tp < 200 µs
VGS = 0 V
VGS = 0 V
VGS = 5 V
VGS = 5 V
-20
-40
-60
-80
-100
-20
-40
-60
-80
-100
VGS = 10 V
VGS = 10 V
VGS = 15 V
VGS = 15 V
V
GS = 20 V
V
GS = 20 V
Drain-Source Voltage, VDS (V)
Drain-Source Voltage, VDS (V)
Figure 13. 3rd Quadrant Characteristic at -55 ºC
Figure 14. 3rd Quadrant Characteristic at 25 ºC
-6
-5
-4
-3
-2
-1
0
100
80
60
40
20
0
0
Conditions:
TJ = 150 °C
tp < 200 µs
VGS = 5 V
VGS = 0 V
VGS = 10 V
-20
-40
-60
-80
-100
VGS = 15 V
V
GS = 20 V
0
200
400
600
800
1000
1200
Drain-Source Voltage, VDS (V)
Drain to Source Voltage, VDS (V)
Figure 15. 3rd Quadrant Characteristic at 150 ºC
Figure 16. Output Capacitor Stored Energy
10000
1000
100
10
10000
1000
100
10
Conditions:
TJ = 25 °C
AC = 25 mV
f = 1 MHz
Conditions:
TJ = 25 °C
V
Ciss
Ciss
VAC = 25 mV
f = 1 MHz
Coss
Coss
Crss
Crss
1
1
0
50
100
Drain-Source Voltage, VDS (V)
150
200
0
200
400
600
800
1000
Drain-Source Voltage, VDS (V)
Figure 18. Capacitances vs. Drain-Source
Figure 17. Capacitances vs. Drain-Source
Voltageꢀ(0-1000ꢀV)
Voltageꢀ(0-200ꢀV)
5
C2M0040120D Rev. B, 10-2015
Typical Performance
70
60
50
40
30
20
10
0
350
300
250
200
150
100
50
Conditions:
TJ ≤ 150 °C
Conditions:
TJ ≤ 150 °C
0
-55
-5
45
95
145
-55
-5
45
95
145
Case Temperature, TC (°C)
Case Temperature, TC (°C)
Figure 19. Continuous Drain Current Derating vs.
Case Temperature
Figure 20. Maximum Power Dissipation Derating vs.
Case Temperature
1
100E-3
10E-3
1E-3
100.00
10 µs
0.5
0.3
Limited by RDS On
100 µs
1 ms
10.00
0.1
0.05
100 ms
0.02
1.00
0.10
0.01
0.01
SinglePulse
Conditions:
TC = 25 °C
D = 0,
Parameter: tp
100E-6
0.1
1
10
100
1000
1E-6
10E-6
100E-6
1E-3
Time, tp (s)
10E-3
100E-3
1
Drain-Source Voltage, VDS (V)
Figure 21. Transient Thermal Impedance
Figure 22. Safe Operating Area
(Junctionꢀ-ꢀCase)ꢀ
6
5
4
3
2
1
0
4
3.5
3
Conditions:
TJ = 25 °C
Conditions:
TJ = 25 °C
V
R
V
DD = 600 V
G(ext) = 2.5 Ω
GS = -5/+20 V
V
R
V
DD = 800 V
G(ext) = 2.5 Ω
GS = -5/+20 V
FWD = C4D20120A
L = 80 μH
FWD = C4D20120A
L = 80 μH
ETotal
ETotal
2.5
2
EOn
EOn
1.5
1
EOff
EOff
0.5
0
0
10
20
30
40
50
60
70
80
90
0
10
20
30
40
50
60
70
80
90
Drain to Source Current, IDS (A)
Drain to Source Current, IDS (A)
Figure 23. Clamped Inductive Switching Energy vs.
Figure 24. Clamped Inductive Switching Energy vs.
Drain Current (VDDꢀ=ꢀ800V)
Drain Current (VDDꢀ=ꢀ600V)
6
C2M0040120D Rev. B, 10-2015
Typical Performance
3.5
2.5
2.0
1.5
1.0
0.5
0.0
Conditions:
TJ = 25 °C
Conditions:
DS = 40 A
I
V
DD = 800 V
DS = 40 A
GS = -5/+20 V
3.0
2.5
2.0
1.5
1.0
0.5
0.0
V
R
V
DD = 800 V
G(ext) = 2.5 Ω
GS = -5/+20 V
I
V
ETotal
FWD = C4D20120A
L = 80 μH
FWD = C4D20120A
L = 80 µH
ETotal
EOn
EOn
EOff
EOff
0
5
10
15
20
25
30
-50
-25
0
25
50
75
100
125
150
External Gate Resistor RG(ext) (Ohms)
Junction Temperature, TJ (°C)
Figure 26. Clamped Inductive Switching Energy vs.
Temperature
Figure 25. Clamped Inductive Switching Energy vs. RG(ext)
100
Conditions:
TJ = 25 °C
90
80
70
60
50
40
30
20
10
0
V
DD = 800 V
RL = 20 Ω
GS = -5/+20 V
V
tr
tf
td (off)
td (on)
0
4
8
12
16
20
External Gate Resistor, RG(ext) (Ohms)
Figure 27. Switching Times vs. RG(ext)
Figureꢀ28.ꢀSwitchingꢀTimesꢀDefinition
70
60
50
40
30
20
10
0
Conditons:
DD = 50 V
V
0
25
50
75
100
125
150
175
200
Time in Avalanche TAV (us)
Figure 29. Single Avalanche SOA curve
7
C2M0040120D Rev. B, 10-2015
Test Circuit Schematic
C4D20120A
20A, 1200V
SiC Schottky
D1
L=80 uH
VDC
CDC=42.3 uF
D.U.T
C2M0040120D
Q1
Figure 30. Clamped Inductive Switching
Waveform Test Circuit
Q1
VGS= - 5V
L=80
uH
D.U.T
C2M0040120D
CDC=42.3
uF
VDC
Q2
C2M0040120D
Figure 31. Body Diode Recovery Test Circuit
ESD Ratings
ESD Test
Total Devices Sampled
Resulting Classification
ESD-HBM
ESD-MM
ESD-CDM
All Devices Passed 1000V
All Devices Passed 400V
All Devices Passed 1000V
2ꢀ(>2000V)
Cꢀ(>400V)
IVꢀ(>1000V)
8
C2M0040120D Rev. B, 10-2015
Package Dimensions
Inches
Millimeters
Min
POS
Package TO-247-3
Min
.190
.090
.075
.042
.075
.075
.113
.113
.022
.819
.640
.037
.620
.516
.145
.039
.487
Max
.205
.100
.085
.052
.095
.085
.133
.123
.027
.831
.695
.049
.635
.557
.201
.075
.529
Max
5.21
2.54
2.16
1.33
2.41
2.16
3.38
3.13
0.68
21.10
17.65
1.25
16.13
14.15
5.10
1.90
13.43
A
A1
A2
b
4.83
2.29
1.91
1.07
1.91
1.91
2.87
2.87
0.55
20.80
16.25
0.95
15.75
13.10
3.68
1.00
12.38
b1
b2
b3
b4
c
D
D1
D2
E
E1
E2
E3
E4
e
.214 BSC
3
5.44 BSC
N
3
L
.780
.800
.173
.144
.236
.248
11˚
11˚
8˚
19.81
4.10
3.51
5.49
6.04
9˚
20.32
4.40
3.65
6.00
6.30
11˚
11˚
8˚
Pinout Information:
T
U
L1
ØP
Q
.161
.138
.216
.238
9˚
•ꢀ Pin 1 = Gate
•ꢀ Pin 2, 4 = Drain
•ꢀ Pin 3 = Source
S
V
W
T
U
9˚
9˚
V
2˚
2˚
W
2˚
8˚
2˚
8˚
Recommended Solder Pad Layout
Part Number
Package
TO-247-3
Marking
C2M0040120
C2M0040120D
TO-247-3
9
C2M0040120D Rev. B, 10-2015
Notes
•ꢀ RoHSꢀCompliance
The levels of RoHS restricted materials in this product are below the maximum concentration values (also referred to as the
threshold limits) permitted for such substances, or are used in an exempted application, in accordance with EU Directive 2011/65/
EC (RoHS2), as implemented January 2, 2013. RoHS Declarations for this product can be obtained from your Cree representative or
from the Product Documentation sections of www.cree.com.
•ꢀ REAChꢀCompliance
REACh substances of high concern (SVHCs) information is available for this product. Since the European Chemical Agency (ECHA)
has published notice of their intent to frequently revise the SVHC listing for the foreseeable future,please contact a Cree represen-
tative to insure you get the most up-to-date REACh SVHC Declaration. REACh banned substance information (REACh Article 67) is
also available upon request.
•ꢀ This product has not been designed or tested for use in, and is not intended for use in, applications implanted into the human body
nor in applications in which failure of the product could lead to death, personal injury or property damage, including but not limited
toꢀequipmentꢀusedꢀinꢀtheꢀoperationꢀofꢀnuclearꢀfacilities,ꢀlife-supportꢀmachines,ꢀcardiacꢀdefibrillatorsꢀorꢀsimilarꢀemergencyꢀmedicalꢀ
equipment,ꢀaircraftꢀnavigationꢀorꢀcommunicationꢀorꢀcontrolꢀsystems,ꢀairꢀtrafficꢀcontrolꢀsystems.
Related Links
•
•
•
C2M PSPICE Models: http://wolfspeed.com/power/tools-and-support
SiC MOSFET Isolated Gate Driver reference design: http://wolfspeed.com/power/tools-and-support
SiC MOSFET Evaluation Board: http://wolfspeed.com/power/tools-and-support
Cree, Inc.
4600 Silicon Drive
Durham, NC 27703
Copyright © 2014 Cree, Inc. All rights reserved.
The information in this document is subject to change without notice.
Cree, the Cree logo, and Zero Recovery are registered trademarks of Cree, Inc.
USA Tel: +1.919.313.5300
Fax: +1.919.313.5451
www.cree.com/power
10
C2M0040120D Rev. B, 10-2015
相关型号：
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