CGD15HB62LP [CREE]

Optimized for Creeâs High Performance;


型号：	CGD15HB62LP
厂家：	CREE, INC
描述：	Optimized for Creeâs High Performance
文件：	总8页 (文件大小：439K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

CGD15HB62LP

V_Drive

I_G

R_G

+18/-5 V

±14 A

5 Ω

Dual Channel Differential Isolated Gate Driver

Cree CAS325M12HM2 C2M SiC Half Bridge Module Optimized

Features

Package

•

Optimized for Cree’s High Performance

CAS325M12HM2 Half Bridge Power Modules

High-Frequency, Ultra-Fast Switching

Operation

•

On Board 3 W or 6 W Isolated Power Supplies

Configurable UVLO with Hysteresis

Direct Mount Low Inductance Design

On-Board Overcurrent, Overlap, and Reverse

Polarity Protection

•

Differential Inputs for Increased Noise

Immunity

Differential to Single-Ended Daughter Board

Available Upon Request

For Use with Cree Module

•

CAS325M12HM2, 1200 V, 325 A Module Half

Bridge CPM2 Variants for Module Junction

Temperatures up to 175 °C

Part Number

CGD15HB62LP

Package

PCBA

Marking

CGD15HB62LP V3

Applications

•

DC Bus Voltages up to 1000 V

Maximum Ratings

Symbol

Parameter

Value

Unit

Test Conditions

V_DC

V_I

Supply Voltage

Logic Level Inputs

-0.5 to 18

-0.5 to 5.5

±14

I_O

Output Peak Current

T_A= 25 °C

I_O(avg)

F_max

T_op

T_stg

Output Average Current

Maximum Switching Frequency

Ambient Operating Temperature

Storage Temperature

±4

115

kHz 3 W Power Supply + CAS325M12HM2

°C

-50 to 95

-50 to 125

CGD15HB62LP Rev. A, 07-2016

Gate Driver Electrical Characterization

Symbol

Parameter

Supply Voltage

Min.

Typ.

Max.

Unit

Test Conditions

V_DC

+14

+12

Secondary UVLO Inactive Level

Secondary UVLO Active Level

Secondary UVLO Hysteresis

High Level Logic Input Voltage

Low Level Logic Input Voltage

+13.5

+11.2

+14.5

+12.7

V_UVLO

V_IH

V_IL

3.5

5.5

1.5

Single-Ended Inputs

Differential Input Common Mode

Range

Differential Input Threshold

Voltage

V_IDCM

V_IDTH

-7

+12

-50

Differential Inputs

-200

2.2

-125

V_ID= V_Pos-Line– V_Neg-Line

V_ODH

V_ODL

V_OD

Differential Output High Level

Differential Output Low Level

Differential Output Magnitude

3.4

0.2

3.1

+18

-5

I_OD= -20 mA

I_OD= 20 mA

R_L=100 Ω

0.4

V_GATE,HIGHHigh Level Output Voltage

V_GATE,LOWLow Level Output Voltage

V_IOWM

C_ISO

Working Isolation Voltage

Isolation Capacitance

1500

V_RMS

Per Channel

Common Mode Transient

Immunity

Output Resistance¹

CMTI

100

0.62

kV/µs

R_GIC-ON

R_GIC-OFF

0.4

0.3

1.5

1.2

Gate Drive IC

R_GEXT-ONExternal Output Resistance²

4.99

0.67

250

140

External SMD Resistor

External Output Resistance²

Turn-off Diode Forward Voltage

Output Rise Time

R_GEXT-OFF

D_VF-OFF

t_ON

0.82

C_Load= 19 nF

From 10% to 90%

t_OFF

Output Fall Time

t_PHL/PLH

Propagation Delay

Over-current Propagation Delay to

FAULT Signal Low

Soft-Shutdown Resistance³

Does Not Include

Blanking

t_PD

R_SS

30.1

1.5

Output pulled low

through R_SS

t_OFF-SS

Output Fall Time Soft-Shutdown

µs

Output resistance of totem pole IC

²Additional output resistance is added with SMD resistors. A diode is provided to allow control of turn-off separately. The diode makes the effective

turn-off resistance be the parallel combination of the R_GEXT-ONand R_GEXT-OFFwhile the turn-on effective resistance is R_GEXT-ON. Standard value is 4.99 Ω for

both turn-on and turn-off. See Figure 1 for configuration.

Soft-Shutdown Resistor will safely turn off the Gate in the event an over-current is detected by the Desaturation Protection circuit.

CGD15HB62LP Rev. A, 07-2016

Input Connector Information

Number

Name

Description

VDC

Power Supply Input Pin

Common

Positive Line of 5 V Differential High Side PWM Signal Pair.

Terminated Into 250 Ω.

Negative Line of 5 V Differential High Side PWM Signal Pair.

Terminated Into 250 Ω.

HS-P (*)

HS-N (*)

Positive Line of 5 V Differential Low Side PWM Signal Pair.

Terminated Into 250 Ω.

LS-P (*)

Negative Line of 5 V Differential Low Side PWM Signal Pair.

Terminated Into 250 Ω.

LS-N (*)

Positive Line of 5 V Differential Fault Condition Signal Pair.

Drive Strength 20 mA.

Negative Line of 5 V Differential Fault Condition Signal Pair.

Drive Strength 20 mA.

Positive Line of 5 V Temperature Dependent Resistor Output Signal Pair.

Drive Strength 20 mA. Temperature Measurement is Encoded Via PWM.

Negative Line of 5 V Temperature Dependent Resistor Output Signal Pair. Drive

Strength 20mA. Temperature Measurement is Encoded Via PWM.

Pull Down to Disable Power Supply. Pull Up, or Leave Floating to Enable. Gate-

Source will be Connected with 10 kΩ when disabled.

FAULT - P (*)

FAULT - N (*)

RTD-P (*)

RTD-N (*)

PS-Dis

Common

PWM-EN

Common

Pull Down to Disable PWM Input Logic. Pull Up/Leave floating to enable. Gate-

source will be held low through gate resistor if power supplies are enabled.

Common

Over-current Protection Enable. Pull down to disable detection of over-current

fault. PWM and UVLO will continue to function. Pull up or leave floating to

enable detection of over-current fault.

OC-EN

Common

(*) Inputs 3 – 10 are differential pairs.

CGD15HB62LP Rev. A, 07-2016

Block Diagram

12 V

18 V

- 5 V

PS-Disable

MGJ3T12150505

PWM Enable

DC +

V_DSMeasure

Over-current

Enable

IXDD614YI

HS – PWM

ISO7842

HS - Fault

LS - Fault

Fault

18 V

- 5 V

PS-Disable

MGJ3T12150505

PWM Enable

Midpoint

V_DSMeasure

LS - RTD

Over-current Enable

LS – PWM

IXDD614YI

ISO7842

Fig 1. Block Diagram

CGD15HB62LP Rev. A, 07-2016

Driver Interface

JT1

Pin 1

JB1

JT3

JB2

CGD15HB62LP

JT2

Fig 2. Top View

Description

Connector

Name

JT2

Signal Input Description in Input Connection Information

High Side Over-current protection connector

Connect to DC +

Low Side Over-current protection connector

Connect to the Midpoint or populate RT19 with a 0 Ω resistor

Red – Gate

Green – Source

Red – Gate

Green – Source

Blue – RTD

JT1

JT3

JB1

HS-Drain

LS-Drain

HS-GS

LS-GS

JB2

CGD15HB62LP Rev. A, 07-2016

Signal Description

• PWM Signals: High side and low side PWM must be differential signals⁴. The termination impedance of

the differential receiver is 250 Ω. A reference single-ended to differential converter is available as an

optimized companion product. Overlap protection is provided to prevent both the high side and low side

gates from turning on simultaneously. The overlap protection should not be used as a dead time

generator.

• FAULT Signal: The fault signal is a differential output⁴with a maximum drive strength of 20mA. A high

signal (positive line > negative line) means there are no fault conditions for either gate driver channel.

This signal will be low if a UVLO or over-current fault is detected on either channel. See below for further

description for what the individual faults indicate.

• UVLO Fault: The UVLO circuit detects when the output rails of the isolated DC/DC converter falls below

safe operating conditions for the gate driver. A UVLO fault indicates that the potential between the split

output rails has fallen below the UVLO active level. The gate for the channel where the fault occurred will

be pulled low through R_Gfor the duration of the fault regardless of the PWM input signal. The fault will

automatically clear once the potential has risen above the UVLO inactive level. There is hysteresis for

this fault to ensure safe operating conditions, and the inactive and active regions can be configured

through on-board resistors. The UVLO faults for both channels are combined along with the over-current

fault in the FAULT output signal.

• Over-Current Fault: An over-current fault is an indication of an over-current event in the SiC power

module. The over-current protection circuit measures the drain-source voltage, and the fault will indicate

if this voltage has risen above a level corresponding to the safe current limit. A drain sense connection

is provided by quick-connect spade connectors for both high side and low side. The low side drain

connection can optionally be connected on-board to the high side source through jumper RT19. When a

fault has occurred the corresponding gate driver channel will be disabled, and the gate will be pulled

down through a soft-shutdown resistor, R_{SS .}The drain-source limit can be configured through on-board

resistors. The over-current protection is enabled by default, but it can be disabled by pulling the OC-EN

pin low. The gate driver will operate correctly with this protection disabled. The over-current fault is

latched upon detection and must be cleared by the user with a low pulse of at least 2.5 ns on the OC-EN

signal.

• RTD Signal: RTD output is a differential signal⁴that measures the resistance of the RTD integrated into

XAS325M12HM2 modules. The signal is a 50 kHz PWM that encodes the resistance of the RTD. The

minimum and maximum duty cycles are 5% and 95% respectively to guarantee a signal is always present.

The approximate temperature of the module can be determined from this resistance⁵. The module

(

)

temperature can be calculated using the formula, ꢀ_ꢁꢂꢃ= 5.42 ∗ ꢄꢅꢆꢇꢈꢇꢉꢊꢋ − 244 °ꢈ .

• PS-Dis Signal: PS-DIS signal disables the output of the isolated DC/DC converters for the two channels.

It is a single-ended input that must be pulled low to turn off the power supplies. This can be used for

startup sequencing.

A single-ended to differential converter for both input and output is available as an optimized companion product.

See CAS325M12HM2 with Optional RTD Application Note for further description of the RTD measurements.

CGD15HB62LP Rev. A, 07-2016

• PWM-EN Signal: This is a single-ended input that enables the PWM inputs for both channels. When this

signal is pulled down the differential receivers for both channels are disabled and the gates will both be

pulled low through R_G. All protection circuitry and power supplies will continue to operate including FAULT

and RTD outputs.

• Over-Voltage and Reverse Polarity Protection: Power input on pin 1 of connector JT2 features a Zener

diode to protect the gate driver from damage by connecting a power source that exceeds the voltage

rating of the gate driver. If over-voltage protection has occurred power should be removed to allow the

PTC fuse to reset. There is also a diode in-line with the power input to protect against connecting a power

source with positive and negative polarity reversed.

Input Connector

•

SBH11-PBPC-D08-ST-BK

Drain connector for Overcurrent Protection: TE Connectivity 735187-2

Suggested Mating Parts

•

SFH210-PPPC-D08-ID-BK

SFH11-PBPC-D08-ST-BK

SFH11-PBPC-D08-RA-BK

Drain connector for Overcurrent: TE Connectivity 2-520272-2

Power Estimates

The gate driver power required is calculated using the formula below. The gate charge is dependent on the

datasheets of the module being driven. The gate driver voltage (V_GD) is 23V for this gate driver. Once the

required gate driver power is calculated the required input power can be calculated from the

MGJ3T12150505MC and MGJ6T12150505MC efficiency curves on the power supplies datasheet. This

calculation is for one channel of the gate driver.

ꢌ

ꢍꢎ

= ꢏ_ꢐ∗ ꢑ_ꢒꢓ∗ Δꢔ_ꢐꢃ

ꢌ

ꢏ_ꢐ:

ꢑ

ꢒꢓ

gate driver power

total gate charge

switching frequency

ꢍꢎ

Δꢔ_ꢐꢃ

total gate drive voltage (V_GATE,HIGH- V_GATE,LOW)

CGD15HB62LP Rev. A, 07-2016

Dimensions [in(mm)]

CGD15HB62LP

Fig 3. Dimensions

Important Notes

Suitability of this product for any application may depend on product parameters not specified in this

document. Accordingly, buyers are cautioned to evaluate actual products against their needs and not to rely

solely on the data and information presented in this document.

The product described has not been designed or tested for use in, and is not intended for use in, applications

implanted into the human body or in applications in which failure of the product could lead to death, personal

injury or property damage, including but not limited to equipment used in the operation of nuclear facilities,

life-support machines, cardiac defibrillators or similar emergency medical equipment, vehicle navigation,

communication or control systems, or air traffic control systems.

The product described is not eligible for Distributor Stock Rotation or Inventory Price Protection.

Cree, Inc.

4600 Silicon Drive

Durham, NC 27703

The information in this document is subject to change without notice.

Cree, the Cree logo, and Zero recovery are registered trademarks of Cree, Inc.

USA Tel: +1.919.313.5451

www.cree.com/power

CGD15HB62LP Rev. A, 07-2016

CGD15HB62LP [CREE]

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