626L16115I2T [CTS]

LVDS Output Clock Oscillator, 161.1328MHz Nom,;
626L16115I2T
型号: 626L16115I2T
厂家: CTS    CTS
描述:

LVDS Output Clock Oscillator, 161.1328MHz Nom,

机械 输出元件 振荡器
文件: 总10页 (文件大小:813K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Model 626  
Very Low Jitter LVPECL or LVDS Clock  
Features  
. Ceramic Surface Mount Package  
. Very Low Phase Jitter Performance, 500fs Maximum  
. Fundamental or 3rd Overtone Crystal Design  
. Frequency Range 6 – 220MHz *  
. +2.5V or +3.3V Operation [+1.8V LVDS only]  
. Output Enable Standard  
Part Dimensions:  
2.5 × 2.0 × 1.1mm • 14.25852mg  
. Tape and Reel Packaging, EIA-418  
Standard Frequencies  
- 25.00MHz  
- 27.00MHz  
- 50.00MHz  
- 74.1758MHz  
- 74.25MHz  
- 100.00MHz  
- 125.00MHz  
- 155.52MHz  
- 156.25MHz  
- 161.1328MHz  
Applications  
. SerDes  
. PON  
. Storage Area Networking  
. Broadband Access  
. SONET/SDH/DWDM  
. Ethernet/GbE/SyncE  
. Fiber Channel  
. Test and Measurement  
* See Page 9 for additional developed frequencies.  
Check with factory for availability of frequencies not listed.  
Description  
CTS Model 626 is a low cost, high performance clock oscillator supporting differential LVPECL or LVDS outputs.  
Employing the latest IC technology, M626 has excellent stability and very low jitter/phase noise performance.  
Ordering Information  
Model  
Output  
Type  
P
Frequency  
Stability  
4
Temperature  
Supply  
Voltage  
3
Frequency Code  
[MHz]  
Packaging  
T
Range  
I
626  
XXX or XXXX  
Output  
LVPECL - Pin 1 Enable  
LVDS - Pin 1 Enable  
Stability  
Voltage  
Code  
P
L
Code  
Code  
M
2
±20ppm 2  
±25ppm  
±30ppm  
±50ppm  
±100ppm  
+1.8Vdc 4  
+2.5Vdc  
+3.3Vdc  
6
5
4
3
2
3
Frequency  
Product Frequency Code 1  
Temp. Range  
-20°C to +70°C  
-40°C to +85°C  
-40°C to +105°C 3  
Packing  
1k pcs./reel  
Code  
Code  
C
I
Code  
T
G
Notes:  
1] Refer to document 016-1454-0, Frequency Code Tables. 3-digits for frequencies <100MHz, 4-digits for frequencies 100MHz or greater.  
Check factory for availability. Temperature code C only.  
Check factory for availability. Stability codes 2 and 3 only.  
LVDS output only. Consult factory for availability.  
2]  
3]  
4]  
Not all performance combinations and frequencies may be available.  
Contact your local CTS Representative or CTS Customer Service for availability.  
This product is specified for use only in standard commercial applications. Supplier disclaims all express and implied warranties and liability in connection with any use of this  
product in any non-commercial applications or in any application that may expose the product to conditions that are outside of the tolerances provided in its specification.  
DOC# 008-0586-0 Rev. B  
Page 1 of 10  
©2017 CTS® Corporation. Information/product(s) subject to change. No warranty that product(s) will meet the stated specifications for customer specific applications or test  
equipment. Visit www.ctscorp.com for list of applicable patent(s), more information, or to request a quote.  
Model 626  
Very Low Jitter LVPECL or LVDS Clock  
Electrical Specifications  
Operating Conditions  
PARAMETER  
SYMBOL  
CONDITIONS  
-
MIN  
-0.3  
TYP  
-
MAX  
4.0  
UNIT  
V
Maximum Supply Voltage  
VCC  
1.710  
2.375  
3.135  
1.8  
2.5  
3.3  
1.890  
2.625  
3.465  
Supply Voltage  
[Note 1]  
VCC  
±5%  
V
Supply Current  
LVPECL  
-
45  
30  
7
70  
40  
ICC  
VCC = +3.3V or +2.5V @ maximum load  
VCC = +1.8V @ maximum load  
mA  
LVDS  
-
LVDS  
-
20  
-20  
-40  
-40  
-50  
+70  
+85  
+105  
+125  
Operating Temperature  
Storage Temperature  
TA  
-
-
+25  
-
°C  
°C  
TSTG  
Frequency Stability  
PARAMETER  
Frequency Range  
LVPECL  
SYMBOL  
fO  
CONDITIONS  
-
MIN  
TYP  
MAX  
UNIT  
MHz  
6 - 220  
6 - 220  
LVDS  
Frequency Stability  
Δf/fO  
-
20, 25, 30, 50 or 100  
- 5  
±ppm  
ppm  
[Note 2]  
Aging  
Δf/f25  
First Year @ +25°C, nominal VCC  
-5  
1.] LVDS output only for +1.8V option.  
2.] Inclusive of initial tolerance at time of shipment, changes in supply voltage, load, temperature and 1st year aging.  
Output Parameters  
PARAMETER  
Output Type  
Output Load  
SYMBOL  
-
CONDITIONS  
MIN  
TYP  
MAX  
-
UNIT  
-
LVPECL  
-
RL  
Terminated to VCC - 2.0V  
-
50  
Ohms  
VOH  
VCC - 1.025  
VCC - 1.810  
VCC - 1.085  
VCC - 1.830  
45  
-
VCC - 0.880  
VCC - 1.620  
VCC - 0.880  
VCC - 1.555  
55  
PECL Load, -20°C to +70°C  
PECL Load, -40°C to +85°C  
V
V
VOL  
-
-
Output Voltage Levels  
VOH  
VOL  
-
Output Duty Cycle  
Rise and Fall Time  
SYM  
TR, TF  
@ VCC - 1.3V  
-
%
@ 20%/80% Levels, RL = 50 Ohms  
-
0.3  
0.7  
ns  
LVDS  
100  
1.43  
1.10  
-
Output Type  
Output Load  
-
-
-
RL  
Between Outputs  
-
-
-
1.60  
-
Ohms  
VOH  
VOL  
Output Voltage Levels  
LVDS Load  
V
0.90  
45  
Output Duty Cycle  
Differential Output Voltage  
Offset Voltage  
SYM  
VOD  
VOS  
TR, TF  
@ 1.25V  
RL = 100 Ohms  
55  
%
mV  
V
247  
1.125  
-
330  
1.25  
0.4  
454  
1.375  
0.7  
LVDS Load  
Rise and Fall Time  
@ 20%/80% Levels, RL = 100 Ohms  
ns  
DOC# 008-0586-0 Rev. B  
Page 2 of 10  
©2017 CTS® Corporation. Information/product(s) subject to change. No warranty that product(s) will meet the stated specifications for customer specific applications or test  
equipment. Visit www.ctscorp.com for list of applicable patent(s), more information, or to request a quote.  
Model 626  
Very Low Jitter LVPECL or LVDS Clock  
Electrical Specifications  
Output Parameters  
PARAMETER  
SYMBOL  
CONDITIONS  
MIN  
-
TYP  
3
MAX  
10  
UNIT  
ms  
Start Up Time  
TS  
Application of VCC  
Enable Function [Standby]  
Enable Input Voltage  
Disable Input Voltage  
Disable Time  
VIH  
VIL  
Pin 1 Logic '1', Output Enabled  
Pin 1 Logic '0', Output Disabled  
0.7VCC  
-
-
0.3VCC  
200  
15  
V
V
-
-
-
-
-
-
-
TPLZ  
IST  
Pin 1 Logic '0', Output Disabled  
-
ns  
µA  
ms  
fs  
Standby Current  
Enable Time  
Pin 1 Logic '0', Output Disabled  
-
TPLZ  
Pin 1 Logic '1', Output Enabled  
-
300  
-
4
40MHz - 220MHz, Bandwidth 12kHz to 20MHz  
6MHz - 39.999MHz, Bandwidth 12kHz to 5MHz  
500  
<1  
Phase Jitter, RMS  
tjrms  
ps  
Enable Truth Table  
Pin 1  
Logic ‘1’  
Open  
Pin 4 & Pin 5  
Output  
Output  
Logic ‘0’  
High Imp.  
Test Circuit  
LVPECL  
LVDS  
Output Waveform  
LVPECL or LVDS  
DOC# 008-0586-0 Rev. B  
Page 3 of 10  
©2017 CTS® Corporation. Information/product(s) subject to change. No warranty that product(s) will meet the stated specifications for customer specific applications or test  
equipment. Visit www.ctscorp.com for list of applicable patent(s), more information, or to request a quote.  
Model 626  
Very Low Jitter LVPECL or LVDS Clock  
Electrical Specifications  
Performance Data  
Phase Noise [typical]  
100MHz, LVDS, VCC = +2.5V, TA = +25°C  
125MHz, LVDS, VCC = +3.3V, TA = +25°C  
125MHz, LVDS, VCC = +2.5V, TA = +25°C  
133MHz, LVDS, VCC = +3.3V, TA = +25°C  
133MHz, LVDS, VCC = +2.5V, TA = +25°C  
156.25MHz, LVDS, VCC = +3.3V, TA = +25°C  
DOC# 008-0586-0 Rev. B  
Page 4 of 10  
©2017 CTS® Corporation. Information/product(s) subject to change. No warranty that product(s) will meet the stated specifications for customer specific applications or test  
equipment. Visit www.ctscorp.com for list of applicable patent(s), more information, or to request a quote.  
Model 626  
Very Low Jitter LVPECL or LVDS Clock  
Electrical Specifications  
Performance Data  
Phase Noise [typical]  
150MHz, LVPECL, VCC = +2.5V, TA = +25°C  
150MHz, LVPECL, VCC = +3.3V, TA = +25°C  
155.52MHz, LVPECL, VCC = +2.5V, TA = +25°C  
155.52MHz, LVPECL, VCC = +3.3V, TA = +25°C  
156.25MHz, LVPECL, VCC = +2.5V, TA = +25°C  
156.25MHz, LVPECL, VCC = +3.3V, TA = +25°C  
DOC# 008-0586-0 Rev. B  
Page 5 of 10  
©2017 CTS® Corporation. Information/product(s) subject to change. No warranty that product(s) will meet the stated specifications for customer specific applications or test  
equipment. Visit www.ctscorp.com for list of applicable patent(s), more information, or to request a quote.  
Model 626  
Very Low Jitter LVPECL or LVDS Clock  
Electrical Specifications  
Phase Noise Tabulated - LVDS  
Typical, VCC = +2.5V, TA = +25°C  
Typical, VCC = +3.3V, TA = +25°C  
PARAMETER  
SYMBOL  
CONDITIONS  
TYP  
UNIT  
PARAMETER  
SYMBOL  
CONDITIONS  
TYP  
UNIT  
LVDS @ 100.00MHz  
Phase Noise  
LVDS @ 125.00MHz  
Phase Noise  
Single Side Band  
Single Side Band  
@ 10Hz  
-84.20  
-114.15  
-131.57  
-145.73  
-145.76  
-147.14  
-147.92  
@ 10Hz  
-78.38  
-110.33  
-130.56  
-143.21  
-146.13  
-148.44  
-149.28  
@ 100Hz  
@ 1kHz  
@ 100Hz  
@ 1kHz  
-
dBc/Hz  
-
dBc/Hz  
@ 10kHz  
@ 100kHz  
@ 1MHz  
@ 10MHz  
@ 10kHz  
@ 100kHz  
@ 1MHz  
@ 10MHz  
Phase Jitter, RMS  
tjrms  
Integration Bandwidth 12kHz - 20MHz 385.00  
fs  
Phase Jitter, RMS  
tjrms  
Integration Bandwidth 12kHz - 20MHz 270.79  
fs  
PARAMETER  
SYMBOL  
CONDITIONS  
TYP  
UNIT  
PARAMETER  
SYMBOL  
CONDITIONS  
TYP  
UNIT  
LVDS @ 125.00MHz  
Phase Noise  
LVDS @ 133.00MHz  
Phase Noise  
Single Side Band  
Single Side Band  
@ 10Hz  
-78.89  
-111.00  
-129.90  
-144.21  
-145.41  
-147.49  
-148.50  
@ 10Hz  
-78.84  
-108.34  
-130.40  
-146.53  
-146.23  
-148.89  
-149.68  
@ 100Hz  
@ 1kHz  
@ 100Hz  
@ 1kHz  
-
dBc/Hz  
-
dBc/Hz  
@ 10kHz  
@ 100kHz  
@ 1MHz  
@ 10MHz  
@ 10kHz  
@ 100kHz  
@ 1MHz  
@ 10MHz  
Phase Jitter, RMS  
tjrms  
Integration Bandwidth 12kHz - 20MHz 285.73  
fs  
Phase Jitter, RMS  
tjrms  
Integration Bandwidth 12kHz - 20MHz 245.65  
fs  
PARAMETER  
SYMBOL  
CONDITIONS  
TYP  
UNIT  
PARAMETER  
SYMBOL  
CONDITIONS  
TYP  
UNIT  
LVDS @ 133.00MHz  
Phase Noise  
LVDS @ 156.25MHz  
Phase Noise  
Single Side Band  
Single Side Band  
@ 10Hz  
-81.21  
-109.47  
-129.95  
-146.50  
-145.86  
-147.50  
-148.92  
@ 10Hz  
-78.30  
-106.47  
-129.58  
-140.35  
-147.41  
-150.11  
-151.37  
@ 100Hz  
@ 1kHz  
@ 100Hz  
@ 1kHz  
-
dBc/Hz  
-
dBc/Hz  
@ 10kHz  
@ 100kHz  
@ 1MHz  
@ 10MHz  
@ 10kHz  
@ 100kHz  
@ 1MHz  
@ 10MHz  
Phase Jitter, RMS  
tjrms  
Integration Bandwidth 12kHz - 20MHz 254.87  
fs  
Phase Jitter, RMS  
tjrms  
Integration Bandwidth 12kHz - 20MHz 169.71  
fs  
DOC# 008-0586-0 Rev. B  
Page 6 of 10  
©2017 CTS® Corporation. Information/product(s) subject to change. No warranty that product(s) will meet the stated specifications for customer specific applications or test  
equipment. Visit www.ctscorp.com for list of applicable patent(s), more information, or to request a quote.  
Model 626  
Very Low Jitter LVPECL or LVDS Clock  
Electrical Specifications  
Phase Noise Tabulated - LVPECL  
Typical, VCC = +2.5V, TA = +25°C  
Typical, VCC = +3.3V, TA = +25°C  
PARAMETER  
SYMBOL  
CONDITIONS  
TYP  
UNIT  
PARAMETER  
SYMBOL  
CONDITIONS  
TYP  
UNIT  
LVPECL @ 150.00MHz  
Phase Noise  
LVPECL @ 150.00MHz  
Phase Noise  
Single Side Band  
Single Side Band  
@ 10Hz  
-74.74  
-103.86  
-126.34  
-137.18  
-142.50  
-144.07  
-145.87  
@ 10Hz  
-75.47  
-106.54  
-132.10  
-143.62  
-152.08  
-154.14  
-155.81  
@ 100Hz  
@ 1kHz  
@ 100Hz  
@ 1kHz  
-
dBc/Hz  
-
dBc/Hz  
@ 10kHz  
@ 100kHz  
@ 1MHz  
@ 10MHz  
@ 10kHz  
@ 100kHz  
@ 1MHz  
@ 10MHz  
Phase Jitter, RMS  
tjrms  
Integration Bandwidth 12kHz - 20MHz 316.93  
fs  
Phase Jitter, RMS  
tjrms  
Integration Bandwidth 12kHz - 20MHz 383.70  
fs  
PARAMETER  
SYMBOL  
CONDITIONS  
TYP  
UNIT  
PARAMETER  
SYMBOL  
CONDITIONS  
TYP  
UNIT  
LVPECL @ 155.52MHz  
Phase Noise  
LVPECL @ 155.52MHz  
Phase Noise  
Single Side Band  
Single Side Band  
@ 10Hz  
-76.15  
-105.64  
-128.82  
-134.29  
-144.64  
-144.53  
-148.76  
@ 10Hz  
-74.20  
-106.07  
-133.92  
-140.06  
-152.01  
-154.13  
-156.10  
@ 100Hz  
@ 1kHz  
@ 100Hz  
@ 1kHz  
-
dBc/Hz  
-
dBc/Hz  
@ 10kHz  
@ 100kHz  
@ 1MHz  
@ 10MHz  
@ 10kHz  
@ 100kHz  
@ 1MHz  
@ 10MHz  
Phase Jitter, RMS  
tjrms  
Integration Bandwidth 12kHz - 20MHz 261.56  
fs  
Phase Jitter, RMS  
tjrms  
Integration Bandwidth 12kHz - 20MHz 100.50  
fs  
PARAMETER  
SYMBOL  
CONDITIONS  
TYP  
UNIT  
PARAMETER  
SYMBOL  
CONDITIONS  
TYP  
UNIT  
LVPECL @ 156.25MHz  
Phase Noise  
LVPECL @ 156.25MHz  
Phase Noise  
Single Side Band  
Single Side Band  
@ 10Hz  
-76.48  
-106.76  
-128.97  
-133.21  
-143.87  
-143.57  
-147.95  
@ 10Hz  
-78.01  
-107.38  
-133.00  
-142.25  
-152.23  
-154.66  
-157.00  
@ 100Hz  
@ 1kHz  
@ 100Hz  
@ 1kHz  
-
dBc/Hz  
-
dBc/Hz  
@ 10kHz  
@ 100kHz  
@ 1MHz  
@ 10MHz  
@ 10kHz  
@ 100kHz  
@ 1MHz  
@ 10MHz  
Phase Jitter, RMS  
tjrms  
Integration Bandwidth 12kHz - 20MHz 302.33  
fs  
Phase Jitter, RMS  
tjrms  
Integration Bandwidth 12kHz - 20MHz 91.26  
fs  
DOC# 008-0586-0 Rev. B  
Page 7 of 10  
©2017 CTS® Corporation. Information/product(s) subject to change. No warranty that product(s) will meet the stated specifications for customer specific applications or test  
equipment. Visit www.ctscorp.com for list of applicable patent(s), more information, or to request a quote.  
Model 626  
Very Low Jitter LVPECL or LVDS Clock  
Mechanical Specifications  
Package Drawing  
Marking Information  
1. O – Output Type; P or E = LVPECL, L or V = LVDS.  
2. ST – Frequency Stability/Temperature Code.  
[Refer to Ordering Information]  
3. V – Voltage Code; 3 = 3.3V, 2 = 2.5V.  
4. xxxx – Frequency Code.  
626OSTV  
● xxxxD  
3-digits, frequencies below 100MHz  
4-digits, frequencies 100MHz or greater  
[See document 016-1454-0, Frequency Code Tables.]  
5. D – Date Code. See Table I for codes.  
[Note: Manufacturing site code must appear on reel  
and carton labels.]  
Recommended Pad Layout  
Pin Assignments  
Notes  
Pin  
Symbol  
Function  
Enable  
1. JEDEC termination code (e4). Barrier-plating is  
nickel [Ni] with gold [Au] flash plate.  
2. Reflow conditions per JEDEC J-STD-020; +260°C  
maximum, 20 seconds.  
1
EOH  
2
N.C.  
No Connect  
3
GND  
Circuit & Package Ground  
RF Output  
3. MSL = 1.  
4
Output  
Output  
VCC  
5
Complimentary RF Output  
Supply Voltage  
6
Table I - Date Code  
MONTH  
JAN  
FEB  
MAR  
APR  
MAY  
JUN  
JUL  
AUG  
SEP  
OCT  
NOV  
DEC  
YEAR  
2001 2005 2009 2013 2017  
2002 2006 2010 2014 2018  
2003 2007 2011 2015 2019  
2004 2008 2012 2016 2020  
A
N
a
B
P
b
p
C
Q
c
D
R
d
r
E
S
e
s
F
T
f
G
U
g
H
V
h
v
J
W
j
K
X
k
x
L
Y
l
M
Z
m
z
n
q
t
u
w
y
DOC# 008-0586-0 Rev. B  
Page 8 of 10  
©2017 CTS® Corporation. Information/product(s) subject to change. No warranty that product(s) will meet the stated specifications for customer specific applications or test  
equipment. Visit www.ctscorp.com for list of applicable patent(s), more information, or to request a quote.  
Model 626  
Very Low Jitter LVPECL or LVDS Clock  
Packaging - Tape and Reel  
Tape Drawing  
Reel Drawing  
Notes  
1. Device quantity is 1k pieces minimum or 3k pieces maximum per 180mm reel.  
2. Complete CTS part number, frequency value and date code information must appear on reel and carton labels.  
DOC# 008-0586-0 Rev. B  
Page 9 of 10  
©2017 CTS® Corporation. Information/product(s) subject to change. No warranty that product(s) will meet the stated specifications for customer specific applications or test  
equipment. Visit www.ctscorp.com for list of applicable patent(s), more information, or to request a quote.  
Model 626  
Very Low Jitter LVPECL or LVDS Clock  
Addendum  
Additional Developed Frequencies – MHz  
FREQUENCY  
FREQUENCY  
CODE  
FREQUENCY  
FREQUENCY  
CODE  
FREQUENCY  
FREQUENCY  
FREQUENCY  
FREQUENCY  
CODE  
CODE  
10.000000  
19.440000  
40.000000  
44.736000  
77.760000  
133.000000  
150.000000  
156.253900  
156.257812  
156.258750  
100  
156.269530  
156G  
194  
400  
447  
777  
1330  
1500  
156E  
156H  
156J  
Frequency Codes for Cover Page Table – MHz  
FREQUENCY  
CODE  
FREQUENCY  
FREQUENCY  
CODE  
FREQUENCY  
CODE  
FREQUENCY  
FREQUENCY  
FREQUENCY  
FREQUENCY  
CODE  
25.000000  
27.000000  
50.000000  
74.175800  
74.250000  
250  
270  
500  
74A  
742  
100.000000  
125.000000  
155.520000  
156.250000  
161.132800  
1000  
1250  
1555  
1562  
1611  
DOC# 008-0586-0 Rev. B  
Page 10 of 10  
©2017 CTS® Corporation. Information/product(s) subject to change. No warranty that product(s) will meet the stated specifications for customer specific applications or test  
equipment. Visit www.ctscorp.com for list of applicable patent(s), more information, or to request a quote.  

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SI9137

Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

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SI9137DB

Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

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SI9137LG

Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

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SI9122E

500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification Drivers

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