CY22U1LCALGXC-00 [CYPRESS]
Clock Generator, 200MHz, CMOS, 1.70 X 1.70 MM, 0.60 MM HEIGHT, LEAD FREE, QFN-8;型号: | CY22U1LCALGXC-00 |
厂家: | CYPRESS |
描述: | Clock Generator, 200MHz, CMOS, 1.70 X 1.70 MM, 0.60 MM HEIGHT, LEAD FREE, QFN-8 时钟 外围集成电路 晶体 |
文件: | 总15页 (文件大小:474K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
UniClock CY22U1
Single Output, Low Power Programmable
Clock Generator
Single Output, Low Power Programmable Clock Generator
Features
Benefits
■ Small Footprint, 8-pin QFN 1.7 mm × 1.7 mm× 0.6 mm package
■ Low Power and Low Jitter Operation
■ Services digital televisions and displays, set top boxes,
multifunction printers, and a variety of consumer electronics
applications.
■ Multiple Operating Voltages:
❐ CY22U1S: 2.5 V, 3.0 V, or 3.3 V
❐ CY22U1L: 1.8 V
■ Saves PCB space due to small form factor.
■ Enables quick turnaround and flexibility and adaptability to
design changes through programmability.
■ Programmable Single Output Clock Generator Frequency
Range:
❐ 1 to 200 MHz
■ Enables synthesis of highly accurate and stable output clock
frequencies with zero or low ppm error.
■ Enables fine tuning of output clock frequency by adjusting the
crystal load CLoad using programmable internal capacitors.
■ Crystal or External Reference Clock Input Frequency Range:
❐ Fundamental Tuned Crystal: 8 to 48 MHz
❐ External Reference Clock: 1 to 166 MHz
■ Lowers clock solution cost by pairing a high frequency PLL
programmability with a low cost, low frequency crystal.
■ Programmable Capacitor Tuning Array
■ Programmable PD# or OE Control Pin
■ Enables low power during the power down or output disable
function.
■ Programmable Asynchronous or Synchronous OE and PD#
Modes
■ Provides flexibility for system applications through selectable
asynchronous or synchronous output enable and disable.
Logic Block Diagram
Cypress Semiconductor Corporation
Document Number: 001-50320 Rev. *D
•
198 Champion Court
•
San Jose, CA 95134-1709
•
408-943-2600
Revised November 29, 2011
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UniClock CY22U1
Contents
Pinouts ..............................................................................3
Pin Definitions ..................................................................3
Functional Description .....................................................3
Configurable PLL .........................................................3
Input Reference Clock Option .....................................3
Multiple VDD Power Supply Option .............................4
Power Management Feature .......................................4
Crystal Oscillator Tuning Circuit ....................................4
Programmable Features ..................................................5
Programming Support .....................................................5
Absolute Maximum Ratings ............................................5
Recommended Operating Conditions ............................5
DC Electrical Specifications ............................................6
AC Electrical Specifications ............................................7
Recommended Crystal Specifications
Switching Waveforms ......................................................8
Ordering Information ......................................................10
Possible Configurations .............................................10
Ordering Code Definitions .........................................10
Package Drawing and Dimensions ...............................12
Acronyms ........................................................................13
Document Conventions .................................................13
Units of Measure .......................................................13
Document History Page .................................................14
Sales, Solutions, and Legal Information ......................15
Worldwide Sales and Design Support .......................15
Products ....................................................................15
PSoC Solutions .........................................................15
for SMD Package ..............................................................7
Document Number: 001-50320 Rev. *D
Page 2 of 15
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UniClock CY22U1
Pinouts
Figure 1. Pin Diagram – CY22U1 8-pin 1.7 mm × 1.7 mm QFN
8
7
XOUT
1
2
6
5
CLKOUT
NC
CY22U1
XIN/CLKIN
3
4
Pin Definitions
CY22U1 8-pin 1.7 mm × 1.7 mm QFN
Pin Number
Name
XOUT
IO
Description
1
2
3
Output
Input
Input
Crystal output. Float for external clock input.
Crystal or external clock input.
XIN/CLKIN
PD#/OE
Multifunction pin. Active low power down or active high output enable pin. Has weak
internal pull up.
4
5
6
GND
Power
–
Power supply ground.
NC
No connect. Pin has no internal connection.
CLKOUT
Output
Programmable clock output. Output voltage depends on VDD. Has weak internal pull
down.
7
8
NC
–
No connect. Pin has no internal connection.
VDD
Power
Programmable power supply:
CY22U1S: 2.5 V, 3.0 V, 3.3 V (standard voltage)
CY22U1L: 1.8 V (low voltage)
Configurable PLL
Functional Description
The device uses a programmable PLL to generate output
frequencies from 1 to 200 MHz. The high resolution of the PLL
and flexible output dividers provide this flexibility.
The UniClock CY22U1 is a programmable, high accuracy,
PLL-based clock generator device designed to replace crystals
and crystal oscillators and save on cost and board space, while
increasing reliability. The low jitter and accurate outputs makes
this device suitable for use in digital televisions and displays, set
top boxes, multifunction printers, and a variety of consumer
electronics applications.
Input Reference Clock Option
There is an option of a crystal or clock signal for the input
reference clock. The frequency range for crystal (XIN) is 8 MHz
to 48 MHz, while the range for an external reference clock
(CLKIN) is 1 MHz to 166 MHz. A PLL bypass mode enables this
device to be used as a crystal oscillator.
The device has several programmable options listed in the
section Programmable Features on page 5. The entire
configuration is one time programmable.
Document Number: 001-50320 Rev. *D
Page 3 of 15
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UniClock CY22U1
be a full clock when exiting power down in synchronous or
asynchronous mode.
Multiple VDD Power Supply Option
The device has programmable power supply options. The
operating supply voltages are 2.5 V, 3.0 V, or 3.3 V for CY22U1S
and 1.8 V for CY22U1L.
Output Frequency Tuning
The UniClock CY22U1 contains an on-chip oscillator with a built
in programmable capacitor array for fine tuning of the output
frequency. The capacitive load seen by the crystal is adjusted by
programming the memory bits. This feature can compensate for
crystal variations or provide a more accurate synthesized
frequency. Figure 2 shows the crystal oscillator tuning circuit
block diagram.
Power Management Feature
The UniClock CY22U1 offers PD# (active LOW) and OE (active
HIGH) functions. When the power down mode is selected
(PD# = 0), the oscillator and PLL are placed in a low supply
current standby mode and the output is tristated and weakly
pulled LOW. The oscillator and PLL circuits must relock when the
part exits the power down mode. If the output is disabled
(OE = 0), the output is tristated and weakly pulled LOW. In this
mode, the oscillator and PLL circuits continue to operate, which
enables a rapid return to normal operation when the output is
enabled.
Crystal Oscillator Tuning Circuit
Table 1. Crystal Oscillator Tuning Capacitor Values
Cap
C7
C6
C5
C4
C3
C2
C1
C0
Value [1]
5.000
2.500
1.250
0.625
0.313
0.156
0.078
0.039
Unit
pF
pF
pF
pF
pF
pF
pF
pF
In addition, the PD# or OE mode can be programmed to occur
asynchronously or synchronously with respect to the output
signal. When the asynchronous setting is used, entering power
down or disabling the output occurs immediately (enabling logic
delays), regardless of the position in the clock cycle. Similarly,
exiting power down or enabling the output occurs immediately
with no guarantee of full output clock pulses. However, when the
synchronous setting is used, the part waits for a falling edge at
the output before entering power down or disabling the output.
This prevents output glitches. The first output pulse is
guaranteed to be a full clock pulse when enabling outputs with a
synchronous OE pin. The first output pulse is not guaranteed to
Figure 2. Crystal Oscillator Tuning Block Diagram
FXIN, ESR, C0
RF
-R
CPXIN
CXIN
C0
C1
C2
C3
C4
C5
C6
C7
C7
C6
C5
C4
C3
C2
C1
C0
CXOUT
CPXOUT
X0
X1
X2
X3
X4
X5
X6
X7
X7
X6
X5
X4
X3
X2
X1
X0
Note
1. The capacitor values are nominal.
Document Number: 001-50320 Rev. *D
Page 4 of 15
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UniClock CY22U1
Programmable Features
Programming Support
The following list of features can be custom configured:
■ PLL frequency and output divider value
The device is available in factory and field programmable
versions. The CyClockMaker Programming kit
(CY3675-CLKMAKER1) along with CyClockWizard
configuration software is used for field programming the device.
For specific programming needs, contact your local Cypress field
application engineer (FAE) or sales representative.
■ Oscillator tuning (crystal load) capacitance value
■ Direct oscillator output (PLL bypass)
■ High or low power supply voltage operation
■ Power management mode (OE or PD#)
■ Power management timing (synchronous or asynchronous)
Absolute Maximum Ratings
Exceeding maximum ratings may shorten the useful life of the device. User guidelines are not tested.
Table 2. Absolute Maximum Ratings
Parameter [2]
Description
Supply voltage, 2.5 V/3.0 V/3.3 V range
Supply voltage, 1.8 V range
Input voltage
Condition
Min
–0.5
–0.5
–0.5
–55
–40
2000
10
Max
Unit
V
VDD
4.4
2.8
V
VIN
Relative to VSS
Non functional
Non functional
VDD + 0.5
V
TS
Temperature, storage
+125
°C
°C
Volts
Yr.
TJ
Temperature, junction
+125
ESDHBM
DRET
PRCYCLE
UL-94
MSL
ESD protection (human body model)
Data retention at TJ = 125 C
Maximum programming cycle
Flammability rating
JEDEC EIA/JESD22-A114-E
–
–
1
V–0 at 1/8 in.
3
Moisture sensitivity level
Recommended Operating Conditions
Parameter [2]
Description
Supply voltage, 1.8 V operating range for CY22U1L
Min
1.6
2.2
2.7
3.0
0
Typ
–
Max
2.0
2.8
3.3
3.6
70
Unit
V
VDD
Supply voltage, 2.5 V operating range for CY22U1S
Supply voltage, 3.0 V operating range for CY22U1S
Supply voltage, 3.3 V operating range for CY22U1S
Commercial ambient temperature
–
V
–
V
–
V
T
–
°C
°C
ms
AC
T
Industrial ambient temperature
-40
0.05
–
85
AI
T
Power up time for VDD to reach minimum specified voltage (power ramp
must be monotonic)
–
500
PU
T
Minimum pulse width of PD#/OE input
Output load capacitance
100
–
–
–
–
ns
PD
pF
COUT
15
Note
2. Stresses beyond those listed under Table 2 may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these
or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to Absolute Maximum Rated Conditions for
extended periods may affect device reliability or cause permanent device damage.
Document Number: 001-50320 Rev. *D
Page 5 of 15
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UniClock CY22U1
DC Electrical Specifications
Parameter [3]
Description
Test Conditions
Min
Typ
–
Max
Unit
V
VIL1
VIH1
VIL2
Input low voltage of PD#/OE
Input high voltage of PD#/OE
Input low voltage of REFIN
–
0.2 × VDD
0.8 × VDD
–
–
V
CY22U1S
-0.2
–
0.4
V
CY22U1L
-0.2
–
0.4
V
VIH2
Input high voltage of REFIN
CY22U1S
1.2
–
2.1
V
CY22U1L
1.2
–
VDD + 0.3[4]
V
VOL1
VOH1
VOL2
VOH2
IIL
Output low voltage
Output high voltage
Output low voltage
Output high voltage
Input low current
IOL = 8 mA, VDD = 3.0/3.3 V
IOH = 8 mA, VDD = 3.0/3.3 V
IOL = 4 mA, VDD = 1.8/2.5 V
IOH = 4 mA, VDD = 1.8/2.5 V
Input = VSS
–
–
0.4
V
VDD – 0.4
–
–
V
–
–
0.1 × VDD
V
0.9 × VDD
–
–
V
–
–
–
–
–
–
–
–
–
<1
<1
<1
–
10
10
5
A
A
A
A
mA
mA
mA
mA
A
IIH
Input high current
Input = VDD
IOZL
IOZH
IDD
Output leakage current
Output leakage current
Output = VSS, Tj = 85 °C
Output = VDD
50
7.5
15
10
25
50
Power supply current for CY22U1L FOUT = 50 MHz, 15 pF load
FOUT = 200 MHz, 15 pF load
–
–
Power supply current for CY22U1S FOUT = 50 MHz, 15 pF load
FOUT = 200 MHz, 15 pF load
–
–
IPD
Power down current
Input pull up resistors
Tj = 85 °C
25
RUP
PD#/OE = low
PD#/OE = high
1
100
–
–
6
250
M
k
RDN
CIN
Output pull down resistors
500
–
–
–
1500
7
k
Input capacitance of PD#/OE pin
pF
Notes
3. Parameters are guaranteed by design and characterization. Not 100% tested in production.
4. absolute maximum value is 2.1V. For V = 1.6 V to 1.8 V, the maximum V is V + 0.3 V.
V
IH2
DD
IH2
DD
Document Number: 001-50320 Rev. *D
Page 6 of 15
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UniClock CY22U1
AC Electrical Specifications
Parameter [5]
FIN (Crystal)
FIN (Clock)
FCLK
Description
Crystal frequency range (XIN)
Clock frequency range (REFIN)
Output frequency
Test Conditions
Min
8
Typ
–
Max
48
Unit
MHz
MHz
MHz
ns
1
–
166
200
1.5
1
–
TR
Output rise time
Measured from 20% to 80% VDD,
COUT = 15 pF
–
–
TF
Output fall time
Measured from 80% to 20% VDD,
COUT = 15 pF
–
–
1.5
55
ns
%
DC
Output clock duty cycle
Using PLL as a source
45
50
TCCJ
Cycle-to-cycle jitter of CLKOUT FOUT > 100 MHz
–
–
–
75
150
–
125
200
1
ps
ps
%TOUT
using PLL
100 MHz > FOUT > 50 MHz
OUT < 50 MHz
[6]
[6]
F
TP
Period jitter of CLKOUT using
PLL
FOUT > 100 MHz
100 MHz > FOUT > 50 MHz
–
–
–
75
150
–
125
200
1
ps
ps
%TOUT
F
OUT < 50 MHz
TPO,CLK
TPU,CLK
Power on time for output clock
–
–
–
–
5
5
ms
ms
Power up time from power down
for output clock
TPD,ASYNC
TPD,SYNC
TOD,ASYNC
TOD,SYNC
TOE,ASYNC
Time from falling edge of PD# to
stopped outputs, asynchronous
mode
–
–
–
–
–
–
–
–
–
–
100
1.5T + 100
100
ns
ns
ns
ns
ns
Time from falling edge of PD# to
stopped outputs, synchronous
mode
Time from falling edge of OE to
stopped outputs, asynchronous
mode
Time from falling edge of OE to
stopped outputs, synchronous
mode
1.5T + 100
100
Time from rising edge of OE to
running outputs, asynchronous
mode
Recommended Crystal Specifications for SMD Package
Parameter
FMIN
Description
Range 1 Range 2 Range 3
Unit
MHz
MHz
Minimum frequency
Maximum frequency
8
14
135
4
14
28
50
4
28
48
30
2
FMAX
R1
Maximum motional resistance (ESR)
Nominal shunt capacitance
Nominal load capacitance
C0
pF
CL
18
300
14
300
12
300
pF
DL
Maximum crystal drive level
W
Notes
5. Parameters are guaranteed by design and characterization. Not 100% tested in production.
6. %T is the percentage of the output clock period.
OUT
Document Number: 001-50320 Rev. *D
Page 7 of 15
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UniClock CY22U1
Switching Waveforms
Figure 3. CLKOUT Rise and Fall Time
VDD
0V
80%
20%
CLKOUT
T
R
T
F
Figure 4. Duty Cycle Timing (DC)
DC =T1A/T1B
T
1B
T1A
VDD/2
CLKOUT
Figure 5. Period Jitter
VDD
VDD/2
CLKOUT
0V
J
P
CLKOUT
–3
+1
+3
Figure 6. Cycle to Cycle Jitter
TCCJ= Max(T2-T1, T3-T2, T4-T3, …, T1000-T999
T4 T5 T998 T999 T1000
)
T1
T2
T3
VDD
0V
CLKOUT
Figure 7. Power On Timing
VDD
0V
VDD
TRAMP
TPO,OUT
VDD
0V
Clock
Startup
CLKOUT
Document Number: 001-50320 Rev. *D
Page 8 of 15
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UniClock CY22U1
Switching Waveforms (continued)
Figure 8. Power Down Timing (Synchronous and Asynchronous Modes) and Power Up Timing
PD#
VDD
0V
1/f
VDD
0V
Clock
Startup
Internal
Clock
TPD,SYNC
TPU,OUT
VDD
0V
Clock
Startup
CLKOUT
(SYNC)
Weakly Pulled Low
TPU,OUT
TPD,ASYNC
Weakly Pulled Low
VDD
0V
Clock
Startup
CLKOUT
(ASYNC)
Figure 9. CLKOUT Enable (Synchronous and Asynchronous Modes) and CLKOUT DisableTiming
VDD
OE
0V
VDD
0V
Internal
Clock
TOD,SYNC
TOE,SYNC
Weakly Pulled Low
TOE,ASYNC
Weakly Pulled Low
VDD
0V
CLKOUT
(SYNC)
TOD,ASYNC
VDD
0V
CLKOUT
(ASYNC)
Document Number: 001-50320 Rev. *D
Page 9 of 15
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UniClock CY22U1
Ordering Information
Part Number
Pb-free
Type
VDD(V)
Production Flow
CY22U1SCALGXC-00 8-pin QFN, Field Programmable
CY22U1LCALGXC-00 8-pin QFN, Field Programmable
Supply voltage: 2.5 V, 3.0 V, or 3.3 V Commercial, 0 °C to 70 °C
Supply voltage: 1.8 V Commercial, 0 °C to 70 °C
Supply voltage: 2.5 V, 3.0 V, or 3.3 V Industrial, –40 °C to +85 °C
CY22U1SCALGXI-00
CY22U1LCALGXI-00
Programmer
8-pin QFN, Field Programmable
8-pin QFN, Field Programmable
Supply voltage: 1.8 V
Industrial, –40 °C to +85 °C
CY3675-CLKMAKER1
CY3675-QFN8A
Programming Kit
Socket Adapter Board, for programming CY22M1 and CY22U1.
Possible Configurations
Some product offerings are factory programmed customer specific devices with customized part numbers.The Possible Configurations
table shows the available device types, but not complete part numbers. Contact your local Cypress FAE of Sales Representative for
more information.
Part Number [7, 8]
Pb-free
CY22U1SCxLGXC-yy 8-pin QFN
Type
VDD(V)
Production Flow
Supply voltage: 2.5 V, 3.0 V, or 3.3 V Commercial, 0 °C to 70 °C
Supply voltage: 1.8 V Commercial, 0 °C to 70 °C
Supply voltage: 2.5 V, 3.0 V, or 3.3 V Industrial, –40 °C to +85 °C
Supply voltage: 1.8 V Industrial, –40 °C to +85 °C
CY22U1LCxLGXC-yy
CY22U1SCxLGXI-yy
CY22U1LCxLGXI-yy
8-pin QFN
8-pin QFN
8-pin QFN
Ordering Code Definitions
CY 22U1
X
Cx LGX X - yy
T
X = blank or T
blank = Tube; T = Tape and Reel
Customer specific identification code
(“00” indicates field programmable)
Temperature Range: X = C or I
C = Commercial; I = Industrial
1.7 mm × 1.7 mm 8-pin QFN package code
Placeholder to distinguish different designs from the same customer
X = S or L
S= Standard voltage (3.3 V/2.5 V); L = Low voltage (1.8 V)
Marketing Code: 22U1 = Device Number
Company ID: CY = Cypress
Notes
7. x indicates a part marking placeholder to distinguish different configurations for the same customer, beginning alphabetically from “A”.
8. yy indicates “Factory Programmable” and are factory programmed configurations. For more details, contact your local Cypress FAE or Cypress Sales Representative.
Document Number: 001-50320 Rev. *D
Page 10 of 15
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UniClock CY22U1
Figure 10. Actual Marking
Pin 1 indicator
M
M M
N N N
(MMM) = 7th, 8th and 9th characters of marketing part number
(NNN) = Last 3 digits of assembly lot number
Document Number: 001-50320 Rev. *D
Page 11 of 15
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UniClock CY22U1
Package Drawing and Dimensions
Figure 11. 8-pin QFN (1.7 mm × 1.7 mm × 0.6 mm) LG08A Package Outline, 001-49591
001-49591 *A
Document Number: 001-50320 Rev. *D
Page 12 of 15
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UniClock CY22U1
Acronyms
Document Conventions
Units of Measure
Acronym
Description
EIA
electronic industries alliance
electrostatic discharge
field application engineer
joint electron devices engineering council
moisture sensitivity level
output enable
Symbol
°C
Unit of Measure
ESD
FAE
JEDEC
MSL
OE
degree Celsius
kilohm
k
MHZ
M
µA
µW
mA
mm
ms
ns
megahertz
megaohm
microampere
microwatt
milliampere
millimeter
millisecond
nanosecond
ohm
PCB
PD
printed circuit board
power down
PLL
phase-locked loop
QFN
quad flat no-lead
%
percent
pF
picofarad
parts per million
picosecond
volt
ppm
ps
V
Document Number: 001-50320 Rev. *D
Page 13 of 15
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UniClock CY22U1
Document History Page
Document Title: UniClock CY22U1, Single Output, Low Power Programmable Clock Generator
Document Number: 001-50320
Rev
ECN
Orig. of
Change
Submission
Date
Description of Change
**
2612925
2636981
CXQ /
AESA
11/26/2008 New Data Sheet
*A
CXQ /
PYRS
01/15/09
Removed sub-section “Programmable Output Drive Strength” under the main
section Functional Description.
Updated sub-section Input Reference Clock Option under the main section
Functional Description (Changed input range minimum value from 8 MHz to
1 MHz, changed input range maximum value from 200 MHz to 166 MHz).
Updated Programming Support (Replaced “CY3672 Programming kit along
with CyberClocksOnline” reference with “CyClockMaker Programming kit
along with CyClockDesigner” reference).
Updated DC Electrical Specifications (Changed minimum and maximum
values of VIH2 and VIL2 parameters, added typical value of IPD parameter
(25 µA)).
Updated AC Electrical Specifications (Added TP parameter and its details).
Updated Ordering Information (updated part numbers) and added marking
format information.
Updated Package Drawing and Dimensions to spec 001-49591.
*B
2673516
CXQ /
PYRS
03/13/09
08/10/09
Changed status of data sheet from Advanced to Preliminary.
Updated Features (Deleted “1.8 V” when referring to external reference).
Updated DC Electrical Specifications (Updated Test Conditions of VIL2 and VIH2
parameters (fixed error in device name), changed maximum value of VIH2
parameter for CY22M1L, added note 4 and referred the same note in maximum
value of VIH2 parameter, replaced TBD with values for maximum values of IDD
parameter).
*C
*D
2748211
3450335
TSAI
Posting to external web.
PURU
11/29/2011 Changed status of data sheet from Preliminary to Final.
Updated hyper links in Programming Support.
Updated Ordering Information (Removed Obsolete parts, added existing parts,
added Programmer and socket in table, divided Ordering information into
Possible Configurations table) and added Ordering Code Definitions.
Updated Package Drawing and Dimensions.
Added Acronyms and Units of Measure.
Updated in new template.
Document Number: 001-50320 Rev. *D
Page 14 of 15
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UniClock CY22U1
Sales, Solutions, and Legal Information
Worldwide Sales and Design Support
Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office
closest to you, visit us at Cypress Locations.
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© Cypress Semiconductor Corporation, 2008-2011. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of
any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for
medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as
critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems
application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.
Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign),
United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of,
and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress
integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without
the express written permission of Cypress.
Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not
assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where
a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer
assumes all risk of such use and in doing so indemnifies Cypress against all charges.
Use may be limited by and subject to the applicable Cypress software license agreement.
Document Number: 001-50320 Rev. *D
Revised November 29, 2011
Page 15 of 15
MoBL is a registered trademark, and More Battery Life is a trademark of Cypress Semiconductor. All products and company names mentioned in this document may be the trademarks of their respective
holders.
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