CY25701LXCZZZT [CYPRESS]
Programmable High-Frequency Crystal Oscillator with Spread Spectrum (SSXO) and No-Spread Spectrum (XO) Option; 可编程高频晶体振荡器，带有扩频（ SSXO ）和无扩频（ XO ）选项
| 型号： | CY25701LXCZZZT |
| 厂家： | 
CYPRESS |
| 描述： | Programmable High-Frequency Crystal Oscillator with Spread Spectrum (SSXO) and No-Spread Spectrum (XO) Option |
| 文件： | 总8页 (文件大小：316K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CY25701
Programmable High-Frequency Crystal
Oscillator with Spread Spectrum (SSXO) and
No-Spread Spectrum (XO) Option
Features
Benefits
• Crystal Oscillator with Spread Spectrum Clock (SSXO)
• No Spread Spectrum (XO) Option
• Provides a wide range of spread percentages for maximum
electromagnetic interference (EMI) reduction to meet
regulatory agency electromagnetic compliance (EMC)
requirements. Reduces development and manufacturing
costs and time-to-market.
• Wide operating output clock frequency range of
10–166 MHz
• Programmable spread spectrum with nominal 31.5 kHz
modulation frequency
• This versatile programming feature enables the user to
switch between SSXO (with Spread) and XO (without
Spread) functions with ease.
• Center spread: ±0.25% to ±2.0%
• Down spread: –0.5% to –4.0%
• No spread: ± 0.0%
• Internal PLL to generate up to 166 MHz output.
• Suitable for most PC, consumer, and networking
applications
• Integrated phase-locked loop (PLL)
• 85 ps typical cycle-to-cycle Jitter with SSCLK = 133 MHz
• 3.3V operation
• Application compatibility in standard and low-power
systems
• In-house programming of samples and prototype quantities
is available using CY3672 programming kit and CY3724
socket adapters. Production quantities are available
through Cypress’s value-added distribution partners or by
usingthird-partyprogrammersfromBPMicrosystems, HiLo
Systems, and others.
• Output Enable function
• Package available in 4-Pin Ceramic LCC SMD
• Pb-free package
• Industrial Temperature from –40°C to 85°C
Pin Configuration
Logic Block Diagram
CY25701
RFB
4-pin Ceramic SMD
PLL
with
4
3
MODULATION
CONTROL
VDD
SSCLK
CXIN
OUTPUT
DIVIDERS
and
PROGRAMMABLE
CONFIGURATION
3
OE
1
VSS
2
SSCLK
MUX
CXOUT
1
OE
4
2
VDD
VSS
Cypress Semiconductor Corporation
Document #: 001-07313 Rev. *A
•
198 Champion Court
•
San Jose, CA 95134-1709
•
408-943-2600
Revised July 25, 2006
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CY25701
Pin Definition
Pin
Name
Description
Output Enable pin: Active HIGH. If OE = 1, SSCLK is enabled
Power supply ground
1
2
3
4
OE
VSS
SSCLK
VDD
Spread spectrum clock output (with or without spread)
3.3V power supply
must be submitted to the local Cypress Field Application
Engineer (FAE) or Sales Representative. Once the request
has been processed, you will receive a new part number,
samples, and data sheet with the programmed values. This
part number will be used for additional sample request and the
production orders. Contact your local Cypress FAE or sales
representative for details.
Functional Description
The CY25701 is a Spread Spectrum Crystal Oscillator (SSXO)
IC used to reduce the EMI found in today’s high-speed digital
electronic systems.
The device uses a Cypress proprietary PLL and Spread
Spectrum Clock (SSC) technology to synthesize and modulate
the frequency of the embedded input crystal. By frequency
modulating the clock, the measured EMI at the fundamental
and harmonic frequencies are greatly reduced. This reduction
in radiated energy can significantly reduce the cost of
complying with regulatory agency (EMC) requirements and
improve time-to-market without degrading system perfor-
mance.
Additional information on the CY25701 can be obtained from
the Cypress web site at www.cypress.com.
Output Frequency, SSCLK Output (SSCLK, pin 3)
The modulated frequency at the SSCLK output is produced by
synthesizing from the embedded crystal oscillator frequency
input. The range of synthesized clock is from 10 to 166 MHz.
The CY25701 uses a programmable configuration memory
array to synthesize output frequency and spread%.
Spread Percentage (SSCLK, pin 3)
The SSCLK spread can be programmed to various spread
percentage values from ±0.25% to ±2.0% for Center Spread
and from –0.5% to –4.0% for Down Spread. Refer to Table 2
for available spread options. Enter ±0.0% (No spread) for XO
(Crystal Oscillator) without spread option.
The spread% is programmed to either center spread or down
spread with various spread percentages. The range for center
spread is from ±0.25% to ±2.00%. The range for down spread
is from –0.5% to –4.0%. Contact the factory for smaller or
larger spread% amounts if required. Refer to Table 2 for
spread selection and no-spread values.
Frequency Modulation (SSCLK, pin 3)
The frequency modulated SSCLK output can be programmed
from 10 to 166 MHz.
The default frequency modulation is programmed at 31.5 kHz
for all SSCLK frequencies from 10 to 166 MHz. Alternate
frequency modulations at 30.1 kHz or 32.9 kHz can be
selected via Cyberclocks software. Contact the factory for
other alternate modulation frequencies if required.
The CY25701 is available in a 4-pin ceramic SMD package
with an operating temperature range of –40 to 85°C.
Programming Description
Factory/Field Programmable CY25701
Factory/Field programming is available for samples and
manufacturing by Cypress and its distributors. All requests
Table 1. Programming Data Requirement
Pin Function
Pin Name
Pin#
Output Frequency
Spread Percent Code[1]
Frequency Modulation
SSCLK
SSCLK
SSCLK
3
3
3
%
Units
MHz
kHz
31.5
Program Value
ENTER DATA
ENTER DATA
Note
1. ±0.0% or Code “Z” for XO (No-Spread) option.
Document #: 001-07313 Rev. *A
Page 2 of 8
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CY25701
Table 2. Spread Percent Selection
Center Spread
Code
Percentage
Code
A
B
C
±0.75%
J
D
E
F
Z
±0.25%
G
±0.5%
H
±1.0%
K
±1.5%
L
±2.0%
M
±0.0%
Z
Down Spread
Percentage
–0.5%
–1.0%
–1.5%
–2.0%
–3.0%
–4.0%
±0.0%
Storage Temperature (Non-condensing) .... –55°C to +100°C
Junction Temperature................................ –40°C to +125°C
Data Retention @ Tj = 125°C.................................>10 years
Package Power Dissipation...................................... 350 mW
Absolute Maximum Ratings
Supply Voltage (VDD).................................... –0.5V to +7.0V
DC Input Voltage....................................–0.5V to VDD + 0.5V
Operating Conditions
Parameter
Description
Min.
3.00
–20
–40
–
Typ.
3.30
–
Max. Unit
V
Supply Voltage
3.60
70
V
DD
T
Ambient Temperature (Commercial)
Ambient Temperature (Industrial)
Max. Load Capacitance @ pin 3
°C
°C
pF
A
T
–
85
A
C
–
15
LOAD
SSCLK
MOD
PU
F
F
T
SSCLK output frequency, C
= 15 pF
10
–
166 MHz
LOAD
Spread Spectrum Modulation Frequency
30.0
31.5
–
33.0
500
kHz
ms
Power-up time for VDD to reach minimum specified voltage (power ramp must be 0.05
monotonic)
DC Electrical Characteristics
Parameter
Description
Output High Current (pin 3)
Output Low Current (pin 3)
Input High Voltage (pin 1)
Input Low Voltage (pin 1)
Input High Current (pin 1)
Input Low Current (pin 1)
Output Leakage Current (pin 3)
Input Capacitance (pin 1)
Supply Current
Condition
= V – 0.5, V = 3.3V (source)
Min.
10
Typ.
12
12
–
Max. Unit
I
I
V
V
–
–
mA
mA
V
OH
OL
OH
OL
DD
DD
= 0.5, V = 3.3V (sink)
10
DD
V
V
I
CMOS levels, 70% of V
CMOS levels, 30% of V
0.7V
V
DD
IH
IL
DD
DD
DD
–
–
–
0.3V
V
DD
V
V
= V
= V
–
10
10
10
7
µA
µA
µA
pF
mA
IH
in
in
DD
SS
I
I
–
–
IL
OZ
Three-state output, OE = 0
Pin 1, or OE
–10
–
–
[2]
C
5
IN
I
V
C
= 3.3V, SSCLK = 10 to 166 MHz,
DD
–
–
50
VDD
= 0, OE = V
DD
LOAD
∆f/f
Initial Accuracy at room temp.
Freq. Stability over temp. range
T = 25°C, 3.3V
–25
–25
–12
–5
–
–
–
–
25
25
12
5
ppm
ppm
ppm
ppm
A
T = –20°C to 70°C, 3.3V
A
Freq. Stability over voltage range 3.0 to 3.6V
Aging T = 25°C, First year
A
Note
2. Guaranteed by characterization, not 100% tested.
Document #: 001-07313 Rev. *A
Page 3 of 8
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CY25701
AC Electrical Characteristics[2]
Parameter
Description
Output Duty Cycle
Condition
SSCLK, Measured at V /2
Min.
45
–
Typ.
50
–
Max. Unit
DC
55
2.7
2.7
200
400
%
ns
ns
ps
ps
DD
t
t
Output Rise Time
Output Fall Time
20%–80% of V
20%–80% of V
C = 15 pF
L
R
F
DD,
DD,
C = 15 pF
–
–
L
[3]
T
Cycle-to-Cycle Jitter SSCLK (Pin 3) SSCLK ≥133 MHz, Measured at V /2
–
85
215
CCJ1
DD
25 MHz ≤ SSCLK <133 MHz, Measured at
–
V
/2
DD
SSCLK < 25 MHz, Measured at V /2
–
–
–
–
–
1% of
s
DD
1/SSCK
T
T
T
Output Disable Time (pin1 = OE)
Output Enable Time (pin1 = OE)
PLL Lock Time
Time from falling edge on OE to stopped
outputs (Asynchronous)
150
150
–
350
350
10
ns
ns
ms
OE1
Time from rising edge on OE to outputs at a
valid frequency (Asynchronous)
OE2
Time for SSCLK to reach valid frequency
LOCK
Application Circuit
Figure 1. Application Circuit Diagram
0.1 µF
Power
3
4
SSCLK
VDD
CY25701
VSS
2
OE
1
VDD
Note
3. Jitter is configuration dependent. Actual jitter is dependent on output frequencies, spread percentage, temperature, and output load. For more information,
refer to the application note, “Jitter in PLL Based Systems: Causes, Effects, and Solutions” available at http://www.cypress.com/clock/appnotes.html, or contact
your local Cypress Field Application Engineer.
Document #: 001-07313 Rev. *A
Page 4 of 8
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CY25701
Switching Waveforms
Figure 2. Duty Cycle Waveform
Cycle Timing (DC = t1A/t1B
)
t
1B
t
1A
SSCLK
Figure 3. Output Rise/Fall Time Waveform
VDD
0V
SSCLK
Tr
Tf
Output Rise time (Tr) = (0.6 x VDD)/SR1 (or SR3)
Output Fall time (Tf) = (0.6 x VDD)/SR2 (or SR4)
Refer to AC Electrical Characteristics table for SR (Slew Rate) values.
Figure 4. Output Enable/Disable Timing Waveforms
VDD
0V
VIH
OUTPUT
ENABLE
TOE2
VIL
High Impedance
SSCLK
(Asynchronous)
TOE1
Document #: 001-07313 Rev. *A
Page 5 of 8
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CY25701
Informational Graphs [4]
172.5
171.5
169.5
169
168.5
Spread Spectrum Profile: Fnom=166MHz,
Fmod=30kHz, Spread%= +/-1%
Spread Spectrum Profile: Fnom=166MHz,
Fmod=30kHz, Spread%= -4%
170.5
169.5
168
167.5
167
166.5
168.5
167.5
166.5
Fnominal
166
165.5
165
164.5
164
163.5
163
Fnominal
165.5
164.5
163.5
162.5
161.5
160.5
159.5
162.5
0
20
40
60
80
100 120 140
Time (us)
160 180 200
0
20
40
60
80
100
Time (us)
120
140 160 180
200
68.5
68
Spread Spectrum Profile: Fnom=66MHz,
Fmod=30kHz, Spread%= -4%
67.5
Spread Spectrum Profile: Fnom=66MHz,
Fmod=30kHz, Spread%= +/-1%
67
66.5
66
67.5
67
66.5
66
Fnominal
Fnominal
65.5
65
65.5
64.5
64
65
63.5
64.5
0
20
40
60
80
100
Time (us)
120
140 160
180
200
0
20
40
60 80
100 120 140 160 180 200
Time (us)
Ordering Information
Part Number
Lead-free (Pb-free)
CY25701FLXCT[5]
CY25701FLXIT[5]
CY25701LXCZZZT[6]
CY25701LXIZZZT[6]
Package Description
Product Flow
4-Lead Ceramic LCC SMD -Tape and Reel
4-Lead Ceramic LCC SMD -Tape and Reel
4-Lead Ceramic LCC SMD -Tape and Reel
4-Lead Ceramic LCC SMD -Tape and Reel
Commercial, –20° to 70°C
Industrial, –40° to 85°C
Commercial, –20° to 70°C
Industrial, –40° to 85°C
Actual Marking[7]
CY25701FLX*
CY25701LX*
F=Field
Programmable
Marketing Part Number (CY25701)
Marketing Part Number (CY25701)
L = LCC
C Y 2 5 7 0 1 L
C Y 2 5 7 0 1 F
X
*
z
z
z
Y W W
X
*
Y W W
L
zzz = Programmable Dash Code YWW = Date Code (Year & WW)
Temp
YWW = Date Code (Year & WW)
Pin 1 mark
X = Pb free
Temp
Pin 1 mark
L = LCC X = Pb free
Notes
4. The “Informational Graphs” are meant to convey the typical performance levels. No performance specifications is implied or guaranteed. Refer to the tables on
pages 4 and 5 for device specifications.
5. “FLX” suffix is used for products programmed in field by Cypress Distributors.
6. “ZZZ” denotes the assigned product dash number. This number will be assigned by factory after the output frequency and spread percent programming data
is received from the customer.
7. Temp can be C (Com’l) or I (Industrial).
Document #: 001-07313 Rev. *A
Page 6 of 8
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CY25701
Package Drawings and Dimensions
4-Lead (5.0x3.2mm) Ceramic LCC LZ04A
DIMENSIONS IN MM
GENERAL TOLERANCE: 0.15MM
0.70
1.30 M
ax
SIDE VIEW
5.0
1.20
0.80
#3
#2
#4
#1
3.2
2.90
2.50
TOP VIEW
BOTTOM VIEW
001-02743-*A
All product and company names mentioned in this document are the trademarks of their respective holders.
Document #: 001-07313 Rev. *A
Page 7 of 8
© Cypress Semiconductor Corporation, 2006. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be
used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its
products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.
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CY25701
Document History Page
Document Title: CY25701 Programmable High-Frequency Crystal Oscillator with Spread Spectrum (SSXO) and
No-Spread Spectrum (XO) Option
Document Number: 001-07313
Orig. of
Change
REV.
ECN NO. Issue Date
Description of Change
**
442944
487736
See ECN
RGL
New data sheet
*A
See ECN KKVTMP Added Industrial temp
Document #: 001-07313 Rev. *A
Page 8 of 8
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