CY7C65217 [CYPRESS]

USB Billboard Controller;
CY7C65217
型号: CY7C65217
厂家: CYPRESS    CYPRESS
描述:

USB Billboard Controller

文件: 总19页 (文件大小:278K)
中文:  中文翻译
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CY7C65210, CY7C65217  
CY7C65210A, CY7C65217A  
USB Billboard Controller  
FcIESUSB Billboard Controller  
USB Suspend mode for low power  
Features  
Operating voltage: 1.71 V to 5.5 V  
USB 2.0-certified, Full-Speed (12 Mbps)  
Supports native Billboard Device Class Driver  
Integrated USB termination resistors  
CY7C65210/210A: Single-channel I2C interface  
Operating temperature:  
Commercial: 0 °C to 70 °C  
Industrial: –40 °C to 85 °C  
Master up to 400 kHz  
190 bytes for each transmit and receive buffer  
CY7C65217/217A: Dual-channel UART/I2C interface  
UART interface  
ESD protection: 2.2-kV HBM  
RoHS-compliant package  
24-pin QFN (4.0 mm × 4.0 mm, 0.55 mm, 0.5-mm pitch)  
Ordering part number  
CY7C65210-24LTXI  
CY7C65217-24LTXI  
CY7C65210A-24LTXI  
CY7C65217A-24LTX  
• Supports 2 pin  
• Data rates up to 115200 bps  
• 190 bytes for each transmit and receive buffer  
• Data format: 7 or 8 data bits, 1 or 2 stop bits  
• No parity, even, odd, mark, or space parity  
• Supports parity, overrun, and framing errors  
• Supports single-channel RS-232 and RS-422 interface  
I2C Interface  
Applications  
Any Type-C Device Container that supports Alternate Mode  
requires Billboard Device support such as:  
• Master up to 400 kHz  
Dongles for Type-C  
Docking Stations  
Monitors  
• 190 bytes for each transmit and receive buffer  
General-purpose input/output (GPIO) pins:  
CY7C65210: 9  
CY7C65217: 7  
CY7C65210A: 11  
CY7C65217A: 9  
Functional Description  
The CY7C6521x[1] is a Full-Speed USB controller, which  
enumerates as a Billboard Device. It integrates a voltage  
regulator, an oscillator, and flash memory for storing  
configuration parameters, offering a cost-effective solution.  
CY7C6521x supports bus-powered mode and enables efficient  
system power management with suspend and remote wake-up  
signals. It is available in a 24-pin QFN package.  
2560 bytes flash for storing configuration parameters  
Billboard Device Class-specific descriptors  
Driver support for Billboard Device  
Billboard Device Class is natively supported by Windows 10  
Clocking: Integrated 48-MHz clock oscillator  
Supports bus- or self-powered configurations  
For a complete list of related resources, click here.  
Comparison of Billboard Parts  
Feature  
CY7C65210  
CY7C65217  
CY7C65210A  
CY7C65217A  
Billboard Spec  
Number of GPIOs  
1.1  
9
1.1  
7
1.21  
11  
1.21  
9
Suspend/Wakeup  
Support  
Yes  
Yes  
No*  
No*  
* Because these features are not relevant to Billboard, support for these features is removed.  
Note  
1. CY7C6521x refers to CY7C65210, CY7C65217, CY7C65210A, and CY7C65217A.  
Cypress Semiconductor Corporation  
Document Number: 001-97082 Rev. *E  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised October 13, 2017  
CY7C65210, CY7C65217  
CY7C65210A, CY7C65217A  
Block Diagram – CY7C65210, CY7C65210A  
nXRES  
Internal  
48 MHz OSC  
Internal  
VDDD  
Voltage  
Regulator  
Serial  
Communication  
Block  
Reset  
VCCD  
32 KHz OSC  
USB  
I2C  
VBUS  
I2C  
VBUS Regulator  
2560 Bytes  
Configurable  
Flash  
SIE  
USB  
Transceiver with  
Integrated  
USBDP  
USBDM  
Memory  
Resistor  
GPIO  
GPIO  
Block Diagram – CY7C65217, CY7C65217A  
nXRES  
Internal  
48 MHz OSC  
Internal  
SCB0  
VDDD  
Voltage  
Regulator  
Reset  
I2C  
VCCD  
I2C  
32 kHz OSC  
USB  
SCB1  
UART/  
I2C  
VBUS  
UART/I2C  
VBUS Regulator  
2560 Bytes  
Configurable  
Flash  
Serial  
Communication  
Block  
SIE  
USB  
Transceiver with  
Integrated  
USBDP  
USBDM  
Memory  
Resistor  
GPIO  
GPIO  
More Information  
Cypress provides a wealth of data at www.cypress.com to help you to select the right device for your design, and to help you to quickly  
and effectively integrate the device into your design.  
Overview: USB Portfolio, USB Roadmap  
USB 2.0 Product Selectors: USB-Serial Bridge Controller, USB to UART Controller (Gen I), enCoRe II, enCoRe III, enCoRe V  
Code Examples: USB Full-Speed  
Models: IBIS  
Document Number: 001-97082 Rev. *E  
Page 2 of 19  
CY7C65210, CY7C65217  
CY7C65210A, CY7C65217A  
Contents  
CY7C65210 and CY7C65210A Pin Description ..............4  
CY7C65217 and CY7C65217A Pin Description ..............5  
Functional Overview ........................................................6  
USB and Billboard Device Functionality ......................6  
Serial Communication .................................................6  
UART Interface ............................................................6  
GPIO Interface ............................................................6  
Memory .......................................................................6  
System Resources ......................................................6  
Suspend and Resume .................................................6  
WAKEUP .....................................................................7  
Internal Flash Configuration ........................................7  
Electrical Specifications ................................................10  
Absolute Maximum Ratings .......................................10  
Operating Conditions .................................................10  
Device-Level Specifications ......................................10  
GPIO .........................................................................11  
nXRES .......................................................................12  
I2C Specifications ......................................................12  
Flash Memory Specifications ....................................12  
Application Schematic ...................................................13  
Ordering Information ......................................................15  
Ordering Code Definitions .........................................15  
Package Information ......................................................16  
Acronyms ........................................................................17  
Document Conventions .................................................17  
Units of Measure .......................................................17  
Document History Page .................................................18  
Sales, Solutions, and Legal Information ......................19  
Worldwide Sales and Design Support .......................19  
Products ....................................................................19  
PSoC® Solutions ......................................................19  
Cypress Developer Community .................................19  
Technical Support .....................................................19  
Document Number: 001-97082 Rev. *E  
Page 3 of 19  
CY7C65210, CY7C65217  
CY7C65210A, CY7C65217A  
CY7C65210 and CY7C65210A Pin Description  
[2]  
Pin  
1
Type  
GPIO  
GPIO  
Power  
GPIO  
GPIO  
GPIO  
GPIO  
GPIO  
Name  
GPIO_6  
GPIO_7  
VSSD  
Default  
Tristate  
Tristate  
Description  
GPIO  
GPIO  
2
3
Digital Ground  
GPIO  
4
GPIO_8  
GPIO_9  
GPIO_10  
GPIO_11  
GPIO_11  
Tristate  
Tristate  
Tristate  
POWER#  
Tristate  
5
GPIO  
1
18  
17  
16  
15  
14  
13  
Debug I/O  
VSSA  
GPIO_6  
GPIO_7  
6
GPIO  
2
CY7C65210-  
24-pin QFN  
Top View  
3
4
5
6
VSSD  
VBUS  
VSSD  
GPIO (CY7C65210)  
GPIO (CY7C65210A)  
7
8
GPIO_8  
GPIO_9  
nXRES  
VSSD  
GPIO_10  
On CY7C65210, this pin indicates  
that the device in Suspend mode.  
Can be configured as active  
LOW/HIGH using the configuration  
utility.  
Output  
GPIO  
Input  
SUSPEND  
GPIO_12  
WAKEUP  
Tristate  
On CY7C65210A, this pin serves as  
GPIO.  
On CY7C65210, this pin is  
configured to wake up the device  
from Suspend mode. Can be  
configured as active LOW/HIGH  
using the configuration utility.  
9
On CY7C65210A, this pin serves as  
GPIO.  
GPIO  
USBIO  
USBIO  
GPIO_13  
USBDP  
USBDM  
Tristate  
USB Data Signal Plus, integrates  
termination resistor and a 1.5-k  
pull-up resistor  
10  
11  
USB Data Signal Minus, integrates  
termination resistor  
This pin should be decoupled to  
ground using a 1-µF capacitor or by  
connecting a 1.8-V supply  
12  
13  
14  
Power  
Power  
nXRES  
VCCD  
VSSD  
Digital Ground  
Chip reset, active low. Can be left  
unconnected or have a pull-up  
resistor connected if not used  
1
18  
17  
16  
15  
14  
13  
Debug I/O  
GPIO_6  
nXRES  
VSSA  
GPIO_7  
2
CY7C65210A-  
24-pin QFN  
Top View  
3
4
5
6
VSSD  
VBUS  
VSSD  
15  
16  
17  
Power  
Power  
Power  
VBUS  
VSSD  
VSSA  
VBUS Supply, 3.15 V to 5.25 V  
Digital Ground  
GPIO_8  
GPIO_9  
nXRES  
VSSD  
GPIO_10  
Analog Ground  
Used for debug purpose. Should be  
left floating.  
18  
19  
Input  
Debug I/O  
GPIO_1  
Can be used as wakeup source to  
wakeup device from Suspend mode.  
GPIO  
Input  
20  
21  
22  
23  
GPIO  
SCB/GPIO  
SCB/GPIO  
GPIO  
GPIO_2  
SCB_1/GPIO_3  
SCB_2/GPIO_4  
GPIO_5  
Tristate  
SCL  
GPIO  
2
I C SCL  
2
SDA  
I C SDA  
Tristate  
GPIO  
Supply to the device core and  
Interface, 1.71 V to 5.5 V  
24  
Power  
VDDD  
Note  
2. Any pin acting as an Input pin should not be left unconnected.  
Document Number: 001-97082 Rev. *E  
Page 4 of 19  
CY7C65210, CY7C65217  
CY7C65210A, CY7C65217A  
CY7C65217 and CY7C65217A Pin Description  
[2]  
Pin  
1
Type  
GPIO  
GPIO  
Power  
Name  
GPIO_6  
GPIO_7  
VSSD  
Default  
Description  
Tristate GPIO  
Tristate GPIO  
2
3
Digital Ground  
2
4
SCB/GPIO SCB1_0/GPIO_8  
SCB/GPIO SCB1_1/GPIO_9  
RXD  
TXD  
UART RXD/I C SCL  
UART TXD/I2C SDA  
5
1
18  
17  
16  
15  
14  
13  
Debug I/O  
VSSA  
GPIO_6  
GPIO_7  
6
GPIO  
GPIO  
GPIO  
GPIO_10  
GPIO_11  
GPIO_11  
Tristate GPIO  
2
CY7C65217-  
24-pin QFN  
Top View  
POWER# GPIO (CY7C65217)  
Tristate GPIO (CY7C65217A)  
3
4
5
6
VSSD  
VBUS  
VSSD  
7
8
SCB1_1/GPIO_8  
SCB1_2/GPIO_9  
GPIO_10  
nXRES  
VSSD  
On CY7C65217, this pin indicates that the  
device in Suspend mode. Can be configured as  
active LOW/HIGH using the configuration utility.  
Output  
GPIO  
SUSPEND  
GPIO_12  
Tristate GPIO  
On CY7C65217, this pin is configured to wake  
up the device from Suspend mode. Can be  
configured as active LOW/HIGH using the  
configuration utility.  
Input  
WAKEUP  
9
GPIO  
GPIO_13  
USBDP  
Tristate On CY7C65217A, this pin serves as GPIO.  
USB Data Signal Plus, integrates termination  
10  
11  
USBIO  
resistor and a 1.5-kpull-up resistor  
USB Data Signal Minus, integrates termination  
resistor  
USBIO  
USBDM  
This pin should be decoupled to ground using a  
12  
13  
14  
Power  
Power  
nXRES  
VCCD  
VSSD  
1-µF capacitor or by connecting a 1.8-V supply  
Digital Ground  
Chip reset, active low. Can be left unconnected  
or have a pull-up resistor connected if not used  
nXRES  
1
18  
Debug I/O  
VSSA  
GPIO_6  
GPIO_7  
15  
16  
17  
18  
Power  
Power  
Power  
Input  
VBUS  
VSSD  
VBUS Supply, 3.15 V to 5.25 V  
Digital Ground  
2
17  
16  
15  
14  
13  
CY7C65217A-  
24-pin QFN  
Top View  
3
4
5
6
VSSD  
VBUS  
VSSD  
SCB1_1/GPIO_8  
VSSA  
Analog Ground  
SCB1_2/GPIO_9  
GPIO_10  
nXRES  
VSSD  
Debug I/O  
Used for debug purpose. Should be left floating.  
Can be used as wakeup source to wakeup  
device from Suspend mode.  
19  
20  
GPIO  
GPIO  
GPIO_1  
Input  
GPIO_2  
Tristate GPIO  
2
21 SCB/GPIO SCB0_1/GPIO_3  
22 SCB/GPIO SCB0_2/GPIO_4  
SCL  
SDA  
SCB0 I C SCL  
2
SCB0 I C SDA  
23  
24  
GPIO  
GPIO_5  
VDDD  
Tristate GPIO  
Supply to the device core and Interface, 1.71 V  
Power  
to 5.5 V  
Table 1. GPIO Configuration  
GPIO Configuration Option  
INPUT  
Description  
Input GPIO  
This active low output signal is used to control power to an external logic through a switch to cut power  
off during an Unconfigured USB device and USB suspend.  
0 - USB device in Configured state  
POWER#  
1 - USB device in Unconfigured state or during USB suspend mode  
Note: CY7C65210A and CY7C65217A do not support POWER#.  
TRISTATE  
OUTPUT  
I/O Tristated (Open-Drain)  
Drive LOW or HIGH  
Document Number: 001-97082 Rev. *E  
Page 5 of 19  
CY7C65210, CY7C65217  
CY7C65210A, CY7C65217A  
GPIO Interface  
Functional Overview  
CY7C65210 has nine configurable GPIOs whereas CY7C65217  
has 7 configurable GPIOs. CY7C65210A has 11 configurable  
GPIOs whereas CY7C65217A has nine configurable GPIOs.  
USB and Billboard Device Functionality  
USB  
The configurable options are as follows:  
INPUT: Input GPIO  
CY7C6521x has a built-in USB 2.0 Full-Speed transceiver. The  
transceiver incorporates the internal USB series termination  
resistors on the USB data lines and a 1.5-kpull-up resistor on  
USBDP.  
POWER#: Power control  
TRISTATE: I/O tristated  
Billboard Device Functionality  
OUTPUT: Drive LOW or HIGH  
CY7C6521x is used to communicate Alternate Modes supported  
by a Device Container to a USB Host system. CY7C6521x sends  
this information through BOS descriptor and string descriptors in  
human-readable format. CY7C6521x supports the Billboard  
descriptor as part of the complete BOS descriptor. The  
CY7C65210/65217 supports USB Billboard Device class Rev.  
1.1 while the CY7C65210A/65217A supports USB Billboard  
Device class Rev. 1.21. For further details on the device class,  
refer to the USB Billboard Device Class specification.  
Memory  
CY7C6521x has a 2560-bytes configurable flash. Flash is used  
to store USB parameters such as VID/PID, serial number,  
product and manufacturer descriptors, and Billboard Device  
Class-specific descriptors.  
System Resources  
Power System  
Serial Communication  
CY7C6521x supports USB Suspend mode to control power  
usage. CY7C6521x operates in bus-powered or self-powered  
modes over a range of 3.15 V to 5.5 V.  
CY7C65210 and CY7C65210A have one Serial Communication  
Block (SCB) whereas CY7C65217 and CY7C65217A have two  
SCBs that implement either UART or I2C interface.  
I2C Interface  
The I2C interface implements full multi-master mode and  
supports up to 400 kHz. For further details on the protocol, refer  
to the NXP I2C specification, Rev. 5.  
Clock System  
CY7C6521x has a fully integrated clock with no external compo-  
nents required. The clock system is responsible for providing  
clocks to all subsystems.  
Internal 48-MHz Oscillator  
Notes  
The internal 48-MHz oscillator is the primary source of internal  
clocking in CY7C6521x.  
I2C ports are not tolerant to higher voltages. Therefore, they  
cannot be hot-swapped or powered up independently when  
chip is not powered.  
Internal 32-kHz Oscillator  
The minimum fall time of the SCL is met (as per NXP I2C  
specification Rev5) when VDDD is between 1.71 V and 3.0 V.  
When VDDD is within the range of 3.0 V to 3.6 V, it is  
recommended to add a 50 pF capacitor on the SCL signal.  
The internal 32-kHz oscillator is primarily used to generate  
clocks for peripheral operation in USB Suspend mode.  
Reset  
The reset block provides reliable power-on reset and brings the  
device back to the default known state. The nXRES (active LOW)  
pin can be used by the external devices to reset CY7C6521x.  
UART Interface  
Only the SCB1 interface of CY7C65217 and CY7C65217A can  
be configured as a UART interface.  
Suspend and Resume  
The 2-pin UART interface (RXD and TXD) provides  
asynchronous serial communication with other UART devices  
operating at speeds of up to 115200. It supports seven or eight  
data bits, one or two stop bits, odd, even, mark, space, and no  
parity. The UART interface supports full-duplex communication  
with a signaling format that is compatible with the standard UART  
protocol. The UART pins may be interfaced to industry-standard  
RS-232/RS-422 transceivers to manage different voltage levels.  
Common UART functions, such as parity error[3] and frame  
error[4], are supported. The UART parameters can be set using  
native APIs.  
The CY7C65210 and CY7C65217 device asserts the SUSPEND  
pin when the USB bus enters the suspend state. This helps in  
meeting the stringent suspend current requirement of the USB  
2.0 specification, while using the device in bus-powered mode.  
The device resumes from the suspend state under either of the  
two following conditions:  
1. Any activity is detected on the USB bus.  
2. The WAKEUP pin is asserted to generate remote wakeup to  
the host.  
Note  
3. Parity error gets detected when UART transmitter device is configured for odd parity and UART receiver device is configured for even parity.  
4. Frame error gets detected when UART transmitter device is configured for 7 bits data width and 1 stop bit, whereas UART receiver device is configured for 8 bit data  
width and 2 stop bits.  
Document Number: 001-97082 Rev. *E  
Page 6 of 19  
CY7C65210, CY7C65217  
CY7C65210A, CY7C65217A  
WAKEUP  
Internal Flash Configuration  
The WAKEUP pin on CY7C65210 and CY7C65217 is used to  
generate the remote wakeup signal on the USB bus. The remote  
wakeup signal is sent only if the host enables this feature through  
the SET_FEATURE request. The device communicates support  
for the remote wakeup to the host through the configuration  
descriptor during the USB enumeration process.  
The internal flash memory can be used to store the configuration  
parameters provided in Table 2.  
Table 2. Internal Flash Configuration for CY7C65210 and CY7C65210A  
Parameter  
Default Value  
Description  
USB Configuration  
USB Vendor ID (VID)  
USB Product ID (PID)  
Manufacturer string  
Product string  
0x04B4  
0x5210  
Default Cypress VID. Can be configured to customer VID.  
Default Cypress PID. Can be configured to customer PID.  
Cypress Semiconductor  
Billboard Device  
Can be configured with any string up-to 126 characters[5]  
Can be configured with any string up-to 126 characters[5]  
Can be configured with any string up-to 126 characters[5]  
.
.
.
Serial string  
User-defined  
If the Serial string is not configured by the user, a unique serial  
number will be generated using the wafer die parameters.  
Power mode  
Bus powered  
100 mA  
Can be configured to bus-powered or self-powered mode.  
Can be configured to any value from 0 to 500 mA. The configuration  
descriptor will be updated based on this.  
Max current draw  
Can be disabled on CY7C65210. Remote wakeup is initiated by  
asserting the WAKEUP or GPIO_1 pin.  
Enabled  
Remote wakeup  
bcdDevice  
Disabled  
0x00  
On CY7C65210A, this feature is removed.  
Can be configured with specific binary coded decimal number.  
GPIO Configuration  
GPIO_1  
GPIO_2  
GPIO_3  
GPIO_4  
GPIO_5  
GPIO_6  
GPIO_7  
GPIO_8  
GPIO_9  
GPIO_10  
Input  
Tristate  
I2C SCL  
I2C SDA  
Tristate  
Tristate  
Tristate  
GPIO can be configured as shown in Table 1 on page 5.  
Tristate  
Tristate  
Tristate  
Power#(CY7C65210)  
Tristate(CY7C65210A)  
Tristate[6]  
Tristate[6]  
GPIO_11  
GPIO_12  
GPIO_13  
Billboard Device Class Descriptor Configuration  
iAdditionalInfoURL  
www.cypress.com/Type-C  
Can be configured with any string up-to 126 characters[5]  
Can be configured with any value from 0x01 to 0x08.  
Can be configured with any value from 0x00 to 0x07.  
.
bNumberOfAlternateModes 0x01  
bPreferredAlternateMode  
0x00  
Note  
5. Maximum available configuration space for all string descriptors is 1920 bytes. Each string descriptor can be configured up to 126 characters.  
6. These GPIOs are available only on CY7C65210A.  
Document Number: 001-97082 Rev. *E  
Page 7 of 19  
CY7C65210, CY7C65217  
CY7C65210A, CY7C65217A  
Table 2. Internal Flash Configuration for CY7C65210 and CY7C65210A (continued)  
Parameter Default Value  
VCONN Power  
Description  
Can be configured with any value from 0x0000 to 0x0006 or it can  
be configured with value 0x8000.  
0x0000  
SVID  
0xFF01  
0x01  
Can be configured to specific SVID.  
bAlternateMode  
Can be configured with any value from 0x01 to 0x08.  
Type-C to Display adapter. For  
further assistance, see  
iAlternateModeString  
dwAlternateModeVdo  
Can be configured with any string up-to 126 characters[5]  
.
http://help.vesa.org/dp-usb-type-c  
Can be configured with any 4-byte value (applicable only for  
CY7C65210A and CY7C65217A).  
0x000C00C5  
Note  
5. Maximum available configuration space for all string descriptors is 1920 bytes. Each string descriptor can be configured up to 126 characters.  
6. These GPIOs are available only on CY7C65210A.  
Document Number: 001-97082 Rev. *E  
Page 8 of 19  
CY7C65210, CY7C65217  
CY7C65210A, CY7C65217A  
Table 3. Internal Flash Configuration for CY7C65217 and CY7C65217A  
Parameter  
Default Value  
Description  
USB Configuration  
USB Vendor ID (VID)  
USB Product ID (PID)  
Manufacturer string  
Product string  
0x04B4  
0x5217  
Default Cypress VID. Can be configured to customer VID.  
Default Cypress PID. Can be configured to customer PID.  
[7]  
Cypress Semiconductor  
Billboard Device  
Can be configured with any string up-to 126 characters  
Can be configured with any string up-to 126 characters  
Can be configured with any string up-to 126 characters  
.
.
.
[7]  
[7]  
Serial string  
User-defined  
If the Serial string is not configured by the user then a unique serial  
number will be generated using the wafer die parameters.  
Power mode  
Bus powered  
100 mA  
Can be configured to bus-powered or self-powered mode.  
Can be configured to any value from 0 to 500 mA. The configuration  
descriptor will be updated based on this.  
Max current draw  
Can be disabled on CY7C65217. Remote wakeup is initiated by  
asserting the WAKEUP or GPIO_1 pin.  
Enabled  
Remote wakeup  
bcdDevice  
Disabled  
0x00  
On CY7C65217A, this feature is removed.  
Can be configured with specific binary coded decimal number.  
GPIO Configuration  
GPIO_1  
GPIO_2  
GPIO_3  
GPIO_4  
GPIO_5  
GPIO_6  
GPIO_7  
GPIO_8  
GPIO_9  
GPIO_10  
Input  
Tristate  
2
SCB0 I C SCL  
2
SCB0 I C SDA  
Tristate  
Tristate  
Tristate  
GPIO can be configured as shown in Table 1 on page 5.  
SCB1 UART RXD  
SCB1 UART TXD  
Tristate  
Power#(CY7C65217)  
Tristate(CY7C65217A)  
GPIO_11  
[8]  
GPIO_12  
GPIO_13  
Tristate  
[8]  
Tristate  
Billboard Device Class Descriptor Configuration  
[7]  
iAdditionalInfoURL  
www.cypress.com/Type-C  
Can be configured with any string up-to 126 characters  
Can be configured with any value from 0x01 to 0x08.  
Can be configured with any value from 0x00 to 0x07.  
.
bNumberOfAlternateModes 0x01  
bPreferredAlternateMode  
0x00  
Can be configured with any value from 0x0000 to 0x0006 or it can be  
configured with value 0x8000.  
VCONN Power  
0x0000  
SVID  
0xFF01  
0x01  
Can be configured to specific SVID.  
bAlternateMode  
Can be configured with any value from 0x01 to 0x08.  
Type-C to Display adapter. For  
further assistance, see  
http://help.vesa.org/dp-usb-type-c  
[7]  
iAlternateModeString  
Can be configured with any string up-to 126 characters .  
Can be configured with any 4-byte value (applicable only for  
CY7C65210A and CY7C65217A).  
dwAlternateModeVdo  
0x000C00C5  
Note  
7. Maximum available configuration space for all string descriptors is 1920 bytes. Each string descriptor can be configured up to 126 characters.  
8. These GPIOs are available only on CY7C65217A.  
Document Number: 001-97082 Rev. *E  
Page 9 of 19  
CY7C65210, CY7C65217  
CY7C65210A, CY7C65217A  
Electrical Specifications  
Static discharge voltage ESD protection levels:  
Absolute Maximum Ratings  
Exceeding maximum ratings[9] may shorten the useful life of the  
device.  
2.2-kV HBM per JESD22-A114  
Latch-up current ..................................................... . 140 mA  
Current per GPIO ...................................................... 25 mA  
Storage temperature ............................... –55 °C to +100 °C  
Ambient temperature with  
Operating Conditions  
power supplied (Industrial) ....................... –40 °C to +85 °C  
Supply voltage to ground potential  
VDDD ............................................................................ 6.0 V  
TA (ambient temperature under bias)  
Commercial ..................................................... 0 °C to 70 °C  
Industrial ................................................... –40 °C to +85 °C  
VBUS ............................................................................ 6.0 V  
VCCD .......................................................................... 1.95 V  
VGPIO .............................................................. VDDD + 0.5 V  
VBUS supply voltage ................................... 3.15 V to 5.50 V  
VDDD supply voltage ................................... 1.71 V to 5.50 V  
VCCD supply voltage ................................... 1.71 V to 1.89 V  
Device-Level Specifications  
All specifications are valid for –40 °C TA 85 °C, TJ 100 °C, and 1.71 V to 5.50 V, except where noted.  
Table 4. DC Specifications  
Parameter  
Description  
Min  
Typ  
Max Units  
Details/Conditions  
3.15  
3.30  
3.45  
5.5  
V
V
V
V
Set and configure the correct voltage range  
VBUS  
VBUS supply voltage  
using a configuration utility for VBUS  
.
4.35  
1.71  
2.0  
5.00  
1.80  
3.3  
Default 5 V.  
1.89  
5.5  
Used to set I/O and core voltage. Set and  
configure the correct voltage range using a  
configuration utility for VDDD. Default 3.3 V.  
VDDD  
VDDD supply voltage  
Do not use this supply to drive the external  
device.  
• 1.71 V VDDD 1.89 V: Short the VCCD pin  
with the VDDD pin  
VCCD  
Output voltage (for core logic)  
1.80  
V
• VDDD > 2 V – Connect a 1-µF  
capacitor (Cefc) between the VCCD pin and  
ground  
Cefc  
IDD1  
External regulator voltage bypass 1.00  
1.30  
20  
1.60  
µF X5R ceramic or better.  
USB 2.0 FS, UART at 1-Mbps single channel, no  
GPIO switching.  
Operating supply current  
mA  
Does not include current through a pull-up  
resistor on USBDP.  
IDD2  
USB Suspend supply current  
5
µA  
Note  
9. Usage above the Absolute Maximum conditions may cause permanent damage to the device. Exposure to Absolute Maximum conditions for extended periods of  
time may affect device reliability. When used below Absolute Maximum conditions but above normal operating conditions, the device may not operate to specification.  
Document Number: 001-97082 Rev. *E  
Page 10 of 19  
CY7C65210, CY7C65217  
CY7C65210A, CY7C65217A  
Table 5. AC Specifications  
Parameter  
Description  
Min  
Typ  
7.815  
8.367  
107.024  
1.797  
–0.339  
–0.285  
–0.076  
48  
Max  
Units  
Details/Conditions  
Fall Time_FS FS USB Fall Time  
Rise Time_FS FS USB Rise Time  
ns 90% to 10% of full swing, 50-pF load  
ns 10% to 90% of full swing, 50-pF load  
TRFM_FS  
VCRS_FS  
TDJ1  
FS Rise/Fall Matching  
FS Crossover Voltage  
FS Driver Jitter (next)  
FS Driver Jitter (paired)  
FS Differential to EOP Skew  
%
V
ns  
TDJ2  
ns  
TFDEOP  
F1  
ns  
47.04  
47.88  
28  
48.96  
48.12  
44  
MHz Non-USB mode  
MHz USB mode  
Frequency  
F2  
48  
Zout  
USB driver output impedance  
Wakeup from USB Suspend  
mode  
Twakeup  
25  
µs  
GPIO  
Table 6. GPIO DC Specification  
Parameter  
Description  
Min  
Typ  
Max  
Units  
Details/Conditions  
CMOS Input  
CMOS Input  
[10]  
VIH  
Input voltage HIGH threshold  
Input voltage LOW threshold  
LVTTL input, VDDD< 2.7 V  
LVTTL input, VDDD < 2.7V  
LVTTL input, VDDD > 2.7V  
LVTTL input, VDDD > 2.7V  
0.7 × VDDD  
V
V
V
V
V
V
VIL  
VIH  
VIL  
VIH  
VIL  
0.3 × VDDD  
[10]  
[10]  
0.7 × VDDD  
2
0.3 × VDDD  
0.8  
IOH = 4 mA,  
DDD = 5 V +/- 10%  
VOH  
VOH  
VOH  
VOL  
VOL  
VOL  
CMOS output voltage HIGH level  
CMOS output voltage HIGH level  
CMOS output voltage HIGH level  
CMOS output voltage LOW level  
CMOS output voltage LOW level  
CMOS output voltage LOW level  
VDDD – 0.4  
V
V
V
V
V
V
V
IOH = 4 mA,  
DDD = 3.3 V +/- 10%  
VDDD – 0.6  
V
IOH = 1 mA,  
DDD = 1.8 V +/- 5%  
VDDD – 0.5  
V
IOL = 8 mA,  
DDD = 5 V +/- 10%  
0.4  
0.6  
0.6  
V
IOL = 8 mA,  
DDD = 3.3 V +/- 10%  
V
IOL = 4 mA,  
VDDD = 1.8 V +/- 5%  
Rpullup  
Rpulldown  
IIL  
Pull-up resistor  
3.5  
5.6  
5.6  
8.5  
8.5  
2
kΩ  
kΩ  
nA  
pF  
Pull-down resistor  
3.5  
Input leakage current (absolute value)  
Input capacitance  
25 °C, VDDD = 3.0 V  
CIN  
25  
7
Vhysttl  
Vhyscmos  
Input hysteresis LVTTL; VDDD > 2.7 V  
Input hysteresis CMOS  
40  
C
mV  
mV  
0.05 × VDDD  
Note  
10. V must not exceed V  
+ 0.2 V.  
IH  
DDD  
Document Number: 001-97082 Rev. *E  
Page 11 of 19  
CY7C65210, CY7C65217  
CY7C65210A, CY7C65217A  
Table 7. GPIO AC Specification  
Parameter Description  
TRiseFast1  
Min  
Typ  
Max  
Units  
Details/Conditions  
VDDD = 3.3 V/ 5.5 V,  
Cload = 25 pF  
Rise Time in Fast mode  
Fall Time in Fast mode  
Rise Time in Slow mode  
Fall Time in Slow mode  
2
12  
ns  
VDDD = 3.3 V/ 5.5 V,  
Cload = 25 pF  
TFallFast1  
TRiseSlow1  
TFallSlow1  
2
12  
60  
60  
ns  
ns  
ns  
VDDD = 3.3 V/ 5.5 V,  
Cload = 25 pF  
10  
10  
VDDD = 3.3 V/ 5.5 V,  
Cload = 25 pF  
TRiseFast2  
TFallFast2  
TRiseSlow2  
TFallSlow2  
Rise Time in Fast mode  
Fall Time in Fast mode  
Rise Time in Slow mode  
Fall Time in Slow mode  
2
20  
2
20  
100  
20  
ns  
ns  
ns  
ns  
VDDD = 1.8 V, Cload = 25 pF  
VDDD = 1.8 V, Cload = 25 pF  
VDDD = 1.8 V, Cload = 25 pF  
VDDD = 1.8 V, Cload = 25 pF  
20  
100  
nXRES  
Table 8. nXRES DC Specifications  
Parameter Description  
VIH  
Min  
Typ  
Max  
Units  
Details/Conditions  
Input voltage HIGH threshold  
Input voltage LOW threshold  
Pull-up resistor  
0.7 × VDDD  
V
V
VIL  
3.5  
0.3 × VDDD  
Rpullup  
CIN  
5.6  
5
8.5  
kΩ  
pF  
mV  
Input capacitance  
Vhysxres  
Input voltage hysteresis  
100  
Table 9. nXRES AC Specifications  
Parameter  
Description  
Reset pulse width  
Min  
Typ  
Max  
Units  
Details/Conditions  
Tresetwidth  
1
µs  
Table 10. UART AC Specifications  
Parameter Description  
FUART UART bit rate  
Min  
Typ  
Max  
Units  
Details/Conditions  
0.3  
3000  
kbps  
Single SCB: TX + RX  
Dual SCB: TX or RX  
2
I C Specifications  
Table 11. I2C AC Specifications  
Parameter  
FI2C  
Description  
I2C frequency  
Min  
Typ  
Max  
Units  
Details/Conditions  
1
400  
KHz  
Flash Memory Specifications  
Table 12. Flash Memory Specifications  
Parameter  
Fend  
Description  
Flash endurance  
Min  
Typ  
Max  
Units  
Details/Conditions  
100K  
cycles  
Flash retention. TA 85 °C, 10 K  
program/erase cycles  
Fret  
10  
years  
Document Number: 001-97082 Rev. *E  
Page 12 of 19  
CY7C65210, CY7C65217  
CY7C65210A, CY7C65217A  
Application Schematic  
Figure 1 shows the application schematic for CY7C65210. Refer to the CY7C65210 and CY7C65210A Pin Description on page 4 for  
signal details.  
Figure 1. CY7C65210 Application Schematic  
VDDD  
CY7C65210  
18  
Debug I/O  
2.2K  
2.2K  
24  
15  
19  
20  
GPIO_1  
VDDD  
USB HOST  
GPIO_2  
SCL  
SDA  
21  
22  
GPIO_3 / SCB_1  
VBUS  
USBDP  
USBDM  
VBUS  
D+  
D-  
10  
11  
GPIO_4 / SCB_2  
GPIO_5  
23  
1
GND  
GPIO_6  
GPIO_7  
GPIO_8  
GPIO_9  
GPIO_10  
GPIO_11  
4.7 uF  
0.1 uF  
2
4
5
14  
6
7
nXRES  
VCCD  
8
9
12  
SUSPEND  
WAKEUP  
1 uF  
17 16 13  
3
Figure 2 shows the application schematic for CY7C65210A. Refer to the CY7C65210 and CY7C65210A Pin Description on page 4  
for signal details.  
Figure 2. CY7C65210A Application Schematic  
VDDD  
CY7C65210A  
Debug I/O  
18  
2.2K  
2.2K  
24  
15  
19  
20  
GPIO_1  
VDDD  
USB HOST  
GPIO_2  
SCL  
SDA  
21  
22  
GPIO_3 / SCB_1  
VBUS  
USBDP  
USBDM  
VBUS  
D+  
D-  
10  
11  
GPIO_4 / SCB_2  
GPIO_5  
23  
1
GND  
GPIO_6  
GPIO_7  
GPIO_8  
GPIO_9  
GPIO_10  
GPIO_11  
4.7 uF  
0.1 uF  
2
4
5
14  
6
7
nXRES  
VCCD  
8
9
12  
GPIO_12  
GPIO_13  
1 uF  
17 16 13  
3
Document Number: 001-97082 Rev. *E  
Page 13 of 19  
CY7C65210, CY7C65217  
CY7C65210A, CY7C65217A  
Figure 3 shows the application schematic for CY7C65217. Refer to the CY7C65217 and CY7C65217A Pin Description on page 5 for  
signal details.  
Figure 3. CY7C65217 Application Schematic  
VDDD  
CY7C65217  
18  
GPIO_0  
2.2K  
2.2K  
24  
15  
19  
20  
GPIO_1  
VDDD  
USB HOST  
GPIO_2  
SCL  
SDA  
21  
22  
GPIO_3 / SCB0_1  
VBUS  
USBDP  
USBDM  
VBUS  
D+  
D-  
10  
11  
GPIO_4 / SCB0_2  
GPIO_5  
23  
1
GND  
GPIO_6  
4.7 uF  
0.1 uF  
2
GPIO_7  
RXD  
TXD  
4
GPIO_8/SCB1_1  
GPIO_9/SCB1_2  
GPIO_10  
5
14  
6
7
nXRES  
VCCD  
GPIO_11  
8
9
12  
SUSPEND  
WAKEUP  
1 uF  
17 16 13  
3
Figure 4 shows the application schematic for CY7C65217A. Refer to the CY7C65217 and CY7C65217A Pin Description on page 5  
for signal details.  
Figure 4. CY7C65217A Application Schematic  
VDDD  
CY7C65217A  
18  
GPIO_0  
2.2K  
2.2K  
24  
15  
19  
20  
GPIO_1  
VDDD  
USB HOST  
GPIO_2  
SCL  
SDA  
21  
22  
GPIO_3 / SCB0_1  
VBUS  
USBDP  
USBDM  
VBUS  
D+  
D-  
10  
11  
GPIO_4 / SCB0_2  
GPIO_5  
23  
1
GND  
GPIO_6  
4.7 uF  
0.1 uF  
2
GPIO_7  
RXD  
TXD  
4
GPIO_8/SCB1_1  
GPIO_9/SCB1_2  
GPIO_10  
5
14  
6
7
nXRES  
VCCD  
GPIO_11  
8
9
12  
GPIO_12  
GPIO_13  
1 uF  
17 16 13  
3
Document Number: 001-97082 Rev. *E  
Page 14 of 19  
CY7C65210, CY7C65217  
CY7C65210A, CY7C65217A  
Ordering Information  
Table 13 lists the key package features and ordering codes of CY7C65210, CY7C65217, CY7C65210A, and CY7C65217A. For more  
information, contact your local sales representative.  
Table 13. Key Features and Ordering Information  
Part Number  
CY7C65210-24LTXI  
CY7C65210-24LTXIT  
CY7C65210A-24LTXI  
Package  
Temperature Range  
Industrial  
24-pin QFN (4.00 × 4.00 × 0.55 mm, 0.5 mm pitch) (Pb-free)  
24-pin QFN (4.00 × 4.00 × 0.55 mm, 0.5 mm pitch) (Pb-free) – Tape and Reel  
24-pin QFN (4.00 × 4.00 × 0.55 mm, 0.5 mm pitch) (Pb-free)  
Industrial  
Industrial  
CY7C65210A-24LTXIT 24-pin QFN (4.00 × 4.00 × 0.55 mm, 0.5 mm pitch) (Pb-free) – Tape and Reel  
Industrial  
CY7C65217-24LTXI  
CY7C65217-24LTXIT  
CY7C65217A-24LTXI  
24-pin QFN (4.00 × 4.00 × 0.55 mm, 0.5 mm pitch) (Pb-free)  
24-pin QFN (4.00 × 4.00 × 0.55 mm, 0.5 mm pitch) (Pb-free) – Tape and Reel  
24-pin QFN (4.00 × 4.00 × 0.55 mm, 0.5 mm pitch) (Pb-free)  
Industrial  
Industrial  
Industrial  
CY7C65217A-24LTXIT 24-pin QFN (4.00 × 4.00 × 0.55 mm, 0.5 mm pitch) (Pb-free)  
Industrial  
Ordering Code Definitions  
-
24  
210/217A  
CY  
7
X
C
65  
XX  
I
X
X = blank or T  
blank = Tube; T = Tape and Reel  
Temperature Range: I = Industrial  
Pb-free  
Package Type: LT = QFN  
Number of Pins: 24 pins  
Part Number:  
USB Billboard Device Class Specification: A = Rev. 1.21  
Family Code: 65  
Technology Code: C = CMOS  
Marketing Code: 7 = Cypress products  
Company ID: CY = Cypress  
Document Number: 001-97082 Rev. *E  
Page 15 of 19  
CY7C65210, CY7C65217  
CY7C65210A, CY7C65217A  
Package Information  
Figure 5. 24-pin QFN 4 mm × 4 mm × 0.55 mm LQ24A 2.65 × 2.65 EPAD (Sawn)  
001-13937 *F  
Table 14. Package Characteristics  
Parameter  
Description  
Min  
–40  
Typ  
25  
Max  
85  
Units  
°C  
T
Operating ambient temperature  
A
THJ  
Package   
18.4  
°C/W  
JA  
Table 15. Solder Reflow Peak Temperature  
Package  
Maximum Peak Temperature  
Maximum Time at Peak Temperature  
24-pin QFN  
260 °C  
30 seconds  
Table 16. Package Moisture Sensitivity Level (MSL), IPC/JEDEC J-STD-2  
Package  
MSL  
24-pin QFN  
MSL 3  
Document Number: 001-97082 Rev. *E  
Page 16 of 19  
CY7C65210, CY7C65217  
CY7C65210A, CY7C65217A  
Acronyms  
Document Conventions  
Table 17. Acronyms Used in this Document  
Units of Measure  
Acronym  
BOS  
Description  
binary device object store  
Table 18. Units of Measure  
Symbol  
Unit of Measure  
ESD  
electrostatic discharge  
general purpose input/output  
human-body model  
inter-integrated circuit  
microcontroller unit  
C  
DMIPS  
degree Celsius  
GPIO  
HBM  
Dhrystone million instructions per second  
k  
kilo-ohm  
2
I C  
KB  
kilobyte  
MCU  
OSC  
PID  
kHz  
kV  
kilohertz  
oscillator  
kilovolt  
product identification  
serial communication block  
Mbps  
MHz  
mm  
V
megabits per second  
megahertz  
millimeter  
volt  
SCB  
SCL  
SDA  
SIE  
2
I C serial clock  
2
I C serial data  
serial interface engine  
SVID  
UART  
USB  
VID  
standard or vendor ID  
Universal Asynchronous Receiver/Transmitter  
Universal Serial Bus  
vendor identification  
Document Number: 001-97082 Rev. *E  
Page 17 of 19  
CY7C65210, CY7C65217  
CY7C65210A, CY7C65217A  
Document History Page  
Document Title: CY7C65210, CY7C65217, CY7C65210A, CY7C65217A USB Billboard Controller  
Document Number: 001-97082  
Orig. of  
Change  
Submission  
Date  
Revision  
ECN  
Description of Change  
**  
4715309  
MVTA  
04/10/2015 New datasheet.  
Updated Features, CY7C65210 and CY7C65210A Pin Description, GPIO  
Interface, and Memory.  
*A  
4839996  
MVTA  
07/22/2015  
Updated Table 2.  
Updated Figure 5 (spec 001-13937 *E to *F) in Package Information.  
Added a note in Functional Description.  
Added Block Diagram – CY7C65217, CY7C65217A.  
Added CY7C65217 and CY7C65217A Pin Description.  
Added UART Interface.  
*B  
4881560  
MVTA  
MVTA  
08/13/2015 Added Figure 3 and Table 3.  
Updated Features, Serial Communication, GPIO Interface, Ordering  
Information.  
Updated Table 2 and Table 17.  
Updated CY7C65210 references to CY7C6521x.  
Removed support for Windows and Linux drivers in Features.  
Updated CY7C65217 and CY7C65217A Pin Description.  
Updated GPIO Configuration and Functional Overview.  
06/16/2016 Updated GPIO_8 and GPIO_9 in Internal Flash Configuration for CY7C65217  
and CY7C65217A.  
*C  
5310895  
Added UART AC Specifications.  
Updated CY7C65217 Application Schematic.  
*D  
*E  
5768506 AESATMP8 06/09/2017 Updated logo and Copyright.  
Updated datasheet for new part numbers.  
Updated USB and Billboard Device Functionality, CY7C65210 and  
CY7C65210APin Description, CY7C65217 and CY7C65217APin Description,  
and Ordering Information.  
5920593  
UMSH  
10/13/2017  
Added Figure 2 and Figure 4.  
Updated Table 1 through Table 3.  
Document Number: 001-97082 Rev. *E  
Page 18 of 19  
CY7C65210, CY7C65217  
CY7C65210A, CY7C65217A  
Sales, Solutions, and Legal Information  
Worldwide Sales and Design Support  
Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office  
closest to you, visit us at Cypress Locations.  
®
Products  
PSoC Solutions  
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cypress.com/arm  
cypress.com/automotive  
cypress.com/clocks  
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cypress.com/iot  
PSoC 1 | PSoC 3 | PSoC 4 | PSoC 5LP | PSoC 6  
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cypress.com/wireless  
© Cypress Semiconductor Corporation, 2015-2017. This document is the property of Cypress Semiconductor Corporation and its subsidiaries, including Spansion LLC (“Cypress”). This document,  
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product or circuit described in this document. Any information provided in this document, including any sample design information or programming code, is provided only for reference purposes. It is  
the responsibility of the user of this document to properly design, program, and test the functionality and safety of any application made of this information and any resulting product. Cypress products  
are not designed, intended, or authorized for use as critical components in systems designed or intended for the operation of weapons, weapons systems, nuclear installations, life-support devices or  
systems, other medical devices or systems (including resuscitation equipment and surgical implants), pollution control or hazardous substances management, or other uses where the failure of the  
device or system could cause personal injury, death, or property damage (“Unintended Uses”). A critical component is any component of a device or system whose failure to perform can be reasonably  
expected to cause the failure of the device or system, or to affect its safety or effectiveness. Cypress is not liable, in whole or in part, and you shall and hereby do release Cypress from any claim,  
damage, or other liability arising from or related to all Unintended Uses of Cypress products. You shall indemnify and hold Cypress harmless from and against all claims, costs, damages, and other  
liabilities, including claims for personal injury or death, arising from or related to any Unintended Uses of Cypress products.  
Cypress, the Cypress logo, Spansion, the Spansion logo, and combinations thereof, WICED, PSoC, CapSense, EZ-USB, F-RAM, and Traveo are trademarks or registered trademarks of Cypress in  
the United States and other countries. For a more complete list of Cypress trademarks, visit cypress.com. Other names and brands may be claimed as property of their respective owners.  
Document Number: 001-97082 Rev. *E  
Revised October 13, 2017  
Page 19 of 19  

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