CYBLE-222005-00_技术文档

CYBLE-222005-00

EZ-BLE™ PRoC™ Module

■ Low power mode support

General Description

❐ Deep Sleep: 1.3 µA with watch crystal oscillator (WCO) on

❐ Hibernate: 150 nA with SRAM retention

❐ Stop: 60 nA with XRES wakeup

The Cypress CYBLE-222005-00 is a fully certified and qualified

module supporting Bluetooth^Low Energy (BLE) wireless

communication. The CYBLE-222005-00 is a turnkey solution

and includes onboard crystal oscillators, chip antenna, passive

components, and Cypress PRoC™ BLE. Refer to the

CYBL1XX7X datasheet for additional details on the capabilities

of the PRoC BLE device used on this module.

Functional Capabilities

■ Up to 15 capacitive sensors for buttons or sliders with

best-in-class signal-to-noise ration (SNR) and liquid tolerance

■ 12-bit, 1-Msps SAR ADC with internal reference,

sample-and-hold (S/H), and channel sequencer

The CYBLE-222005-00 supports a number of peripheral

functions (ADC, timers, counters, PWM) and serial

communication protocols (I²C, UART, SPI) through its

programmable architecture. The CYBLE-222005-00 includes a

royalty-free BLE stack compatible with Bluetooth 4.1 and

provides up to 16 GPIOs in a small 10 × 10 × 1.80 mm package.

■ Two serial communication blocks (SCBs) supporting I²C

(master/slave), SPI (master/slave), or UART

■ Four dedicated 16-bit timer, counter, or PWM blocks

(TCPWMs)

The CYBLE-222005-00 is a complete solution and an ideal fit for

applications requiring BLE wireless connectivity.

■ Programmable low voltage detect (LVD) from 1.8 V to 4.5 V

■ I²S master interface

Module Description

■ Module size: 10.0 mm ×10.0 mm × 1.80 mm (with shield)

■ Bluetooth Low Energy protocol stack supporting generic

access profile (GAP) Central, Peripheral, Observer, or

Broadcaster roles

■ Drop-in compatible with CYBLE-022001-00 and includes

additional V_REFinput

■ Switches between Central and Peripheral roles on-the-go

■ 256-KB flash memory, 32-KB SRAM memory

■ Standard Bluetooth Low Energy profiles and services for

interoperability

■ Up to 16 GPIOs configurable as open drain high/low,

pull-up/pull-down, HI-Z analog, HI-Z digial, or strong output

■ Custom profile and service for specific use cases

■ Bluetooth 4.1 qualified single-mode module

❐ QDID: 79920

❐ Declaration ID: D029884

Benefits

The CYBLE-222005-00 module is provided as a turnkey

solution, including all necessary hardware required to use BLE

communication standards.

■ Certified to FCC, IC, MIC, KC, and CE regulations

❐ FCC ID: WAP2005

❐ IC ID: 7922A-2005

■ Proven, qualified, and certified hardware design ready to use

❐ MIC ID: 203-JN0495

❐ KC ID: MSIP-CRM-Cyp-2005

■ Small footprint (10 × 10 mm × 1.80 mm), perfect for space

constrained applications

■ Industrial temperature range: –40 °C to +85 °C

■ Reprogrammable architecture

■ 32-bit processor (0.9 DMIPS/MHz) with single-cycle 32-bit

multiply, operating at up to 48 MHz

■ Fully certified module eliminates the time needed for design,

development and certification processes

■ Watchdog timer with dedicated internal low-speed oscillator

(ILO)

■ Bluetooth SIG qualified with QDID and Declaration ID

(D029647)

■ Two-pin SWD for programming

■ Flexible communication protocol support

Power Consumption

■ PSoC Creator™ provides an easy-to-use integrated design

environment (IDE) to configure, develop, program, and test a

BLE application

■ TX output power: –18 dbm to +3 dbm

■ Received signal strength indicator (RSSI) with 1-dB resolution

■ TX current consumption of 15.6 mA (radio only, 0 dbm)

■ RX current consumption of 16.4 mA (radio only)

Cypress Semiconductor Corporation

Document Number: 002-00214 Rev. *G

198 Champion Court

San Jose, CA 95134-1709

408-943-2600

Revised December 22, 2017

CYBLE-222005-00

More Information

Cypress provides a wealth of data at www.cypress.com to help you to select the right module for your design, and to help you to

quickly and effectively integrate the module into your design.

■ Overview: EZ-BLE Module Portfolio, Module Roadmap

■ EZ-BLE PRoC Product Overview

■ Knowledge Base Articles

❐ KBA04069 - Pin Mapping Differences Between the

EZ-BLE™ PRoC™ Evaluation Board

(CYBLE-222005-EVAL) and the BLE Pioneer Kit

(CY8CKIT-042-BLE)

❐ KBA97095 - EZ-BLE™ Module Placement

❐ KBA210559 - RF Regulatory Certifications for EZ-BLE™

PRoC™ Module CYBLE-222005-00 - KBA210559

■ PRoC BLE Silicon Datasheet

■ Application notes: Cypress offers a number of BLE application

notes covering a broad range of topics, from basic to advanced

level. Recommended application notes for getting started with

EZ-BLE modules are:

❐ AN96841 - Getting Started with EZ-BLE Module

❐ AN94020 - Getting Started with PRoC BLE

❐ KBA213976 -FAQ for BLE and Regulatory Certifications with

EZ-BLE modules

❐ AN97060 - PSoC^®4 BLE and PRoC™ BLE - Over-The-Air

❐ KBA210802 - Queries on BLE Qualification and Declaration

Processes

(OTA) Device Firmware Upgrade (DFU) Guide

❐ AN91162 - Creating a BLE Custom Profile

❐ AN91184 - PSoC 4 BLE - Designing BLE Applications

■ Development Kits:

❐ CYBLE-222005-EVAL, CYBLE-222005-00EvaluationBoard

❐ CY8CKIT-042-BLE, Bluetooth^®Low Energy (BLE) Pioneer

❐ AN92584 - Designing for Low Power and Estimating Battery

Life for BLE Applications

Kit

❐ AN85951 - PSoC^®4 CapSense^®Design Guide

❐ CY8CKIT-002, PSoC^®MiniProg3 Program and Debug Kit

❐ AN95089 - PSoC^®4/PRoC™ BLE Crystal Oscillator Selec-

■ Test and Debug Tools:

tion and Tuning Techniques

❐ CYSmart, Bluetooth^®LE Test and Debug Tool (Windows)

❐ AN91445 - Antenna Design and RF Layout Guidelines

■ Technical Reference Manual (TRM):

❐ PRoC^®BLE Technical Reference Manual

❐ CYSmart Mobile, Bluetooth^®LE Test and Debug Tool

(Android/iOS Mobile App)

Two Easy-To-Use Design Environments to Get You Started Quickly

®

PSoC Creator™ Integrated Design Environment (IDE)

PSoC Creator is an Integrated Design Environment (IDE) that enables concurrent hardware and firmware editing, compiling and

debugging of PSoC 3, PSoC 4, PSoC 5LP, PSoC 4 BLE, PRoC BLE and EZ-BLE module systems with no code size limitations. PSoC

peripherals are designed using schematic capture and simple graphical user interface (GUI) with over 120 pre-verified,

production-ready PSoC Components™.

PSoC Components are analog and digital “virtual chips,” represented by an icon that users can drag-and-drop into a design and

configure to suit a broad array of application requirements.

Blutooth Low Energy Component

The Bluetooth Low Energy Component inside PSoC Creator provides a comprehensive GUI-based configuration window that lets you

quickly design BLE applications. The Component incorporates a Bluetooth Core Specification v4.1 compliant BLE protocol stack and

provides API functions to enable user applications to interface with the underlying Bluetooth Low Energy Sub-System (BLESS)

hardware via the stack.

EZ-Serial™ BLE Firmware Platform

The EZ-Serial Firmware Platform provides a simple way to access the most common hardware and communication features needed

in BLE applications. EZ-Serial implements an intuitive API protocol over the UART interface and exposes various status and control

signals through the module’s GPIOs, making it easy to add BLE functionality quickly to existing designs.

Use a simple serial terminal and evaluation kit to begin development without requiring an IDE. Refer to the EZ-Serial webpage for

User Manuals and instructions for getting started as well as detailed reference materials.

EZ-BLE modules are pre-flashed with the EZ-Serial Firmware Platform. If you do not have EZ-Serial pre-loaded on your module, you

can download each EZ-BLE module’s firmware images on the EZ-Serial webpage.

Technical Support

■ Frequently Asked Questions (FAQs): Learn more about our BLE ECO System.

■ Forum: See if your question is already answered by fellow developers on the PSoC 4 BLE and PRoC BLE forums.

■ Visit our support page and create a technical support case or contact a local sales representatives. If you are in the United States,

you can talk to our technical support team by calling our toll-free number: +1-800-541-4736. Select option 2 at the prompt.

Document Number: 002-00214 Rev. *G

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CYBLE-222005-00

Contents

Overview............................................................................ 4

Module Description...................................................... 4

Pad Connection Interface ................................................ 6

Recommended Host PCB Layout ................................... 7

Digital and Analog Capabilities and Connections......... 9

Power Supply Connections and Recommended External

Components.................................................................... 10

Connection Options................................................... 10

External Component Recommendation .................... 10

Critical Components List ........................................... 12

Antenna Design......................................................... 12

Electrical Specification .................................................. 13

GPIO ......................................................................... 15

XRES......................................................................... 17

Digital Peripherals ..................................................... 19

Serial Communication ............................................... 21

Memory ..................................................................... 22

System Resources .................................................... 22

Environmental Specifications ....................................... 28

Environmental Compliance ....................................... 28

RF Certification.......................................................... 28

Safety Certification .................................................... 28

Environmental Conditions ......................................... 28

ESD and EMI Protection ........................................... 28

Regulatory Information.................................................. 29

FCC........................................................................... 29

Industry Canada (IC) Certification............................. 30

European R&TTE Declaration of Conformity ............ 30

MIC Japan................................................................. 31

KC Korea................................................................... 31

Packaging........................................................................ 32

Ordering Information...................................................... 34

Part Numbering Convention...................................... 34

Acronyms........................................................................ 35

Document Conventions ................................................. 35

Units of Measure ....................................................... 35

Document History Page................................................. 36

Sales, Solutions, and Legal Information ...................... 38

Worldwide Sales and Design Support .......................38

Products.................................................................... 38

PSoC® Solutions ...................................................... 38

Cypress Developer Community................................. 38

Technical Support ..................................................... 38

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CYBLE-222005-00

Overview

Module Description

The CYBLE-222005-00 module is a complete module designed to be soldered to the applications main board.

Module Dimensions and Drawing

Cypress reserves the right to select components (including the appropriate BLE device) from various vendors to achieve the BLE

module functionality. Such selections will still guarantee that all height restrictions of the component area are maintained. Designs

should be held within the physical dimensions shown in the mechanical drawings in Figure 1. All dimensions are in millimeters (mm).

Table 1. Module Design Dimensions

Dimension Item

Specification

Length (X) 10.00 ± 0.15 mm

Width (Y) 10.00 ± 0.15 mm

Length (X) 7.00 ± 0.15 mm

Width (Y) 5.00 ± 0.15 mm

Module dimensions

Antenna location dimensions

PCB thickness

Height (H) 0.50 ± 0.10 mm

Height (H) 1.10 ± 0.10 mm

Shield height

Maximum component height

Height (H) 1.30-mm typical (chip antenna)

Total module thickness (bottom of module to highest component) Height (H) 1.80-mm typical

See Figure 1 on page 5 for the mechanical reference drawing for CYBLE-222005-00.

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CYBLE-222005-00

Figure 1. Module Mechanical Drawing

Top View (View from Top)

Side View

Bottom View (Seen from Bottom)

Note

1. No metal should be located beneath or above the antenna area. Only bare PCB material should be located beneath the antenna area. For more information on

recommended host PCB layout, see “Recommended Host PCB Layout” on page 7.

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CYBLE-222005-00

Pad Connection Interface

As shown in the bottom view of Figure 1 on page 5, the CYBLE-222005-00 connects to the host board via solder pads on the back

of the module. Table 2 and Figure 2 detail the solder pad length, width, and pitch dimensions of the CYBLE-222005-00 module.

Table 2. Solder Pad Connection Description

Name Connections Connection Type

SP 22 Solder Pads

Pad Length Dimension

Pad Width Dimension

Pad Pitch

0.71 mm

0.41 mm

0.76 mm

Figure 2. Solder Pad Dimensions (Seen from Bottom)

To maximize RF performance, the host layout should follow these recommendations:

1. The ideal placement of the Cypress BLE module is in a corner of the host board with the chip antenna located at the far corner.

This placement minimizes the additional recommended keep out area stated in item 2. Refer to AN96841 for module placement

best practices.

2. To maximize RF performance, the area immediately around the Cypress BLE module chip antenna should contain an additional

keep out area, where no grounding or signal traces are contained. The keep out area applies to all layers of the host board. The

recommended dimensions of the host PCB keep out area are shown in Figure 3 (dimensions are in mm).

Figure 3. Recommended Host PCB Keep Out Area Around the CYBLE-222005-00 Chip Antenna

Host PCB Keep Out Area Around Chip Antenna

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CYBLE-222005-00

Recommended Host PCB Layout

Figure 4, Figure 5, Figure 6, and Table 3 provide details that can be used for the recommended host PCB layout pattern for the

CYBLE-222005-00. Dimensions are in millimeters unless otherwise noted. Pad length of 0.91 mm (0.455 mm from center of the pad

on either side) shown in Figure 6 is the minimum recommended host pad length. The host PCB layout pattern can be completed using

either Figure 4, Figure 5, or Figure 6. It is not necessary to use all figures to complete the host PCB layout pattern.

Figure 4. Host Layout Pattern for CYBLE-222005-00

Figure 5. Module Pad Location from Origin

Top View (Seen on Host PCB)

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CYBLE-222005-00

Table 3 provides the center location for each solder pad on the CYBLE-222005-00. All dimensions are referenced to the center of the

solder pad. Refer to Figure 6 for the location of each module solder pad.

Table 3. Module Solder Pad Location

Figure 6. Solder Pad Reference Location

Solder Pad

(Center of Pad)

Location (X,Y) from

Orign (mm)

Dimension from

Orign (mils)

1

2

(0.26, 1.64)

(0.26, 2.41)

(0.26, 3.17)

(0.26, 3.93)

(0.26, 4.69)

(0.26, 5.45)

(0.81, 9.74)

(1.57, 9.74)

(2.34, 9.74)

(3.10, 9.74)

(3.86, 9.74)

(4.62, 9.74)

(5.38, 9.74)

(6.15, 9.74)

(6.91, 9.74)

(7.67, 9.74)

(8.43, 9.74)

(9.19, 9.74)

(9.75, 8.50)

(9.75, 7.74)

(9.75, 6.98)

(9.75, 6.22)

(10.24, 64.57)

(10.24, 94.88)

3

(10.24, 124.80)

(10.24, 154.72)

(10.24, 184.65)

(10.24, 214.57)

(31.89, 383.46)

(61.81, 383.46)

(92.13, 383.46)

(122.05, 383.46)

(151.97, 383.46)

(181.89, 383.46)

(211.81, 383.46)

(242.13, 383.46)

(272.05, 383.46)

(301.97, 383.46)

(331.89, 383.46)

(361.81, 383.46)

(383.86, 334.65)

(383.86, 304.72)

(383.86, 274.80)

(383.86, 244.88)

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

Top View (Seen on Host PCB)

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CYBLE-222005-00

Digital and Analog Capabilities and Connections

Table 4 details the solder pad connection definitions and available functions for each connection pad. Table 4 lists the solder pads on

CYBLE-222005-00, the BLE device port-pin, and denotes whether the function shown is available for each solder pad. Each

connection is configurable for a single option shown with a ✓.

Table 4. Solder Pad Connection Definitions

SolderPad Device

Cap-

Sense

WCO ECO

OUT OUT

UART

SPI

I²C

TCPWM^[2,3]

LCD

SWD

GPIO

Number

Port Pin

1

2

GND^[4]

Ground Connection

P4.1^[5]✓(SCB1_CTS) ✓(SCB1_MISO)

✓(TCPWM0_N) ✓(Sensor/

✓

C_TANK

)

3

4

5

6

7

8

P5.1

P5.0

V_DDR

✓(SCB1_TX) ✓(SCB1_SCLK) ✓(SCB1_SCL) ✓(TCPWM3_N)

✓(SCB1_RX) ✓(SCB1_SS0) ✓(SCB1_SDA) ✓(TCPWM3_P)

✓

Radio Power Supply (1.9V to 5.5V)

[6]

V_REF

P1.6

P0.7

Voltage Reference Input (Optional)

✓(SCB0_RTS) ✓(SCB0_SS0)

✓(SCB0_CTS) ✓(SCB0_SCLK)

✓(TCPWM) ✓(Sensor)

✓(TCPWM)

✓

(SWDCLK)

9

P0.4

P0.5

GND

P0.6

✓(SCB0_RX) ✓(SCB0_MOSI) ✓(SCB0_SDA) ✓(TCPWM)

✓(SCB0_TX) ✓(SCB0_MISO) ✓(SCB0_SCL) ✓(TCPWM)

Ground Connection

✓

10

11

12

✓(SCB0_RTS) ✓(SCB0_SS0)

✓(TCPWM)

✓

(SWDIO)

✓

13

14

15

16

17

18

19

20

21

22

P1.7

V_DD

✓(SCB0_CTS) ✓(SCB0_SCLK)

✓(TCPWM) ✓(Sensor)

Digital Power Supply Input (1.71 to 5.5V)

External Reset Hardware Connection Input

XRES

P3.5

P3.4

P3.7

P1.4

P1.5

P3.6

✓(SCB1_TX)

✓(SCB1_RX)

✓(SCB1_CTS)

✓(SCB1_SCL) ✓(TCPWM)

✓(SCB1_SDA) ✓(TCPWM)

✓(TCPWM)

✓

✓(SCB0_RX) ✓(SCB0_MOSI) ✓(SCB0_SDA) ✓(TCPWM)

✓(SCB0_TX) ✓(SCB0_MISO) ✓(SCB0_SCL) ✓(TCPWM)

✓(SCB1_RTS)

✓(TCPWM)

P4.0^[7]✓(SCB1_RTS) ✓(SCB1_MOSI)

✓(TCPWM0_P) ✓(C_MOD)

Notes

2. TCPWM stands for timer, counter, and PWM. If supported, the pad can be configured to any of these peripheral functions.

3. TCPWM connections on ports 0, 1, 2, and 3 can be routed through the Digital Signal Interconnect (DSI) to any of the TCPWM blocks and can be either positive

or negative polarity. TCPWM connections on ports 4 and 5 are direct and can only be used with the specified TCPWM block and polarity specified above.

4. The main board needs to connect both GND connections (Pad 1 and Pad 10) on the module to the common ground of the system.

5. When using the capacitive sensing functionality, Pad 2 (P4.1) can be connected to a C

capacitor (located off of Cypress BLE Module). C

should be used

TANK

Tank

if implementing a shield layer on the capacitive sensor. If used, this capacitor should be placed as close to the module as possible.

6. Analog block functionality is augmented for the user with the external V input. The internal bandgap may be bypassed with a 1-µF to 10-µF capacitor.

REF

7. When using the capacitive sensing functionality, Pad 22 (P4.0) must be connected to a C

capacitor (located off of Cypress BLE Module). The value of this

MOD

capacitor is 2.2 nF and should be placed as close to the module as possible.

2

8. If the I S feature is used in the design, the I S pins shall be dynamically routed to the appropriate available GPIO by PSoC Creator

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CYBLE-222005-00

Power Supply Connections and Recommended External Components

Power Connections

External Component Recommendation

The CYBLE-222005-00 contains two power supply connections,

VDD and VDDR. The VDD connection supplies power for both

digital and analog device operation. The VDDR connection

supplies power for the device radio.

In either connection scenario, it is recommended to place an

external ferrite bead between the supply and the module

connection. The ferrite bead should be positioned as close as

possible to the module pin connection.

VDD accepts a supply range of 1.71 V to 5.5 V. VDDR accepts

a supply range of 1.9 V to 5.5 V. These specifications can be

found in Table 9. The maximum power supply ripple for both

power connections on the module is 100 mV, as shown in

Table 7.

Figure 7 details the recommended host schematic options for a

single supply scenario. The use of one or two ferrite beads will

depend on the specific application and configuration of the

CYBLE-222005-00.

Figure 8 details the recommended host schematic for an

independent supply scenario.

The power supply ramp rate of VDD must be equal to or greater

than that of VDDR.

The recommended ferrite bead value is 330 , 100 MHz. (Murata

BLM21PG331SN1D).

Connection Options

Two connection options are available for any application:

1. Single supply: Connect VDD and VDDR to the same supply.

2. Independent supply: Power VDD and VDDR separately.

Figure 7. Recommended Host Schematic Options for a Single Supply Option

Two Ferrite Bead Option (Seen from Bottom)

Single Ferrite Bead Option (Seen from Bottom)

Figure 8. Recommended Host Schematic for an Independent Supply Option

Independent Power Supply Option (Seen from Bottom)

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CYBLE-222005-00

The CYBLE-222005-00 schematic is shown in Figure 9.

Figure 9. CYBLE-222005-00 Schematic Diagram

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CYBLE-222005-00

Critical Components List

Table 5 details the critical components used in the CYBLE-222005-00 module.

Table 5. Critical Component List

Component

Reference Designator

Description

Silicon

Crystal

Antenna

U1

Y1

Y2

E1

76-pin WLCSP Programmable Radio-on-Chip (PRoC) with BLE

24.000 MHz, 10PF

32.768 kHz, 12.5PF

2.4–2.5 GHz chip antenna

Antenna Design

Table 6 details the chip antenna used in the CYBLE-222005-00 module. The specifications listed are according to the vendor’s

datasheet. The Cypress module performance improves many of these characteristics. For more information, see Table 8.

Table 6. Chip Antenna Specifications

Item

Chip Antenna Manufacturer

Chip Antenna Part Number

Frequency Range

Peak Gain

Description

Johanson Technology Inc.

2450AT18B100

2400–2500 MHz

0.5 dBi typical

Average Gain

–0.5-dBi typical

Return Loss

9.5-dB minimum

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CYBLE-222005-00

Electrical Specification

Table 7 details the absolute maximum electrical characteristics for the Cypress BLE module.

Table 7. CYBLE-222005-00 Absolute Maximum Ratings

Parameter

V_{DDD_ABS}

Description

Min

–0.5

Typ

–

Max

6

Units

Details/Conditions

Analog, digital, or radio supply relative to V_SS

V

Absolute maximum

(V_SSD= V_SSA

)

V_{CCD_ABS}

Direct digital core voltage input relative to V_SSD

–

1.95

Absolute maximum

3.0-V supply

Maximum power supply ripple for V_DDand V_DDR

input voltage

V_{DDD_RIPPLE}

–

100

mV Ripple frequency of 100 kHz

to 750 kHz

V_{GPIO_ABS}

I_{GPIO_ABS}

GPIO voltage

–0.5

–25

–

VDD +0.5

25

V

Absolute maximum

Maximum current per GPIO

mA Absolute maximum

GPIO injection current: Maximum for V_IH> V_DD

and minimum for V_IL< V_SS

Absolute maximum current

injected per pin

I_{GPIO_injection}

LU

–0.5

–

0.5

mA

Pin current for latch up

–200

200

mA

–

Table 8 details the RF characteristics for the Cypress BLE module.

Table 8. CYBLE-222005-00 RF Performance Characteristics

Parameter

RF_O

Description

RF output power on ANT

Min

Typ

Max

Units

Details/Conditions

Configurable via register

settings

–18

0

3

dBm

Guaranteed by design

simulation

RX_S

RF receive sensitivity on ANT

–

–87

–

dBm

F_R

Module frequency range

Peak gain

2400

–

2480

MHz

dBi

dB

–

G_P

–

0.5

–

G_Avg

RL

Average gain

–0.5

–10.5

Return loss

Table 9 through Table 47 list the module level electrical characteristics for the CYBLE-222005-00. All specifications are valid for

–40 °C  TA  85 °C and TJ  100 °C, except where noted. Specifications are valid for 1.71 V to 5.5 V, except where noted.

Table 9. CYBLE-222005-00 DC Specifications

Parameter

V_DD1

Description

Power supply input voltage

Min

Typ

Max

Units

Details/Conditions

1.8

–

5.5

V

With regulator enabled

Internally unregulated

supply

V_DD2

Power supply input voltage unregulated

1.71

1.8

1.89

V

V_DDR1

V_DDR2

Radio supply voltage (radio on)

Radio supply voltage (radio off)

1.9

–

5.5

V

–

1.71

Active Mode, V_DD= 1.71 V to 5.5 V

T = 25 °C,

I_DD3

I_DD4

I_DD5

I_DD6

I_DD7

Execute from flash; CPU at 3 MHz

–

1.7

–

mA

V_DD= 3.3 V

Execute from flash; CPU at 3 MHz

Execute from flash; CPU at 6 MHz

Execute from flash; CPU at 12 MHz

mA T = –40 °C to 85 °C

T = 25 °C,

mA

2.5

–

V_DD= 3.3 V

mA T = –40 °C to 85 °C

T = 25 °C,

mA

4

V_DD= 3.3 V

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CYBLE-222005-00

Table 9. CYBLE-222005-00 DC Specifications (continued)

Parameter

I_DD8

Description

Min

Typ

Max

Units

Details/Conditions

Execute from flash; CPU at 12 MHz

–

mA T = –40 °C to 85 °C

T = 25 °C,

mA

I_DD9

Execute from flash; CPU at 24 MHz

Execute from flash; CPU at 48 MHz

–

7.1

–

V

_DD= 3.3 V

I_DD10

I_DD11

I_DD12

mA T = –40 °C to 85 °C

T = 25 °C,

mA

13.4

–

V_DD= 3.3 V

mA T = –40 °C to 85 °C

Sleep Mode, V_DD= 1.8 V to 5.5 V

I_DD13IMO on

Sleep Mode, V_DDand V_DDR= 1.9 V to 5.5 V

I_DD14ECO on

Deep-Sleep Mode, V_DD= 1.8 V to 3.6 V

T = 25 °C, V_DD= 3.3 V,

mA

–

SYSCLK = 3 MHz

T = 25 °C, V_DD= 3.3 V,

mA

SYSCLK = 3 MHz

T = 25 °C,

µA

I_DD15

I_DD16

I_DD17

I_DD18

WDT with WCO on

–

1.5

–

V_DD= 3.3 V

µA T = –40 °C to 85 °C

T = 25 °C,

µA

–

V_DD= 5 V

–

µA T = –40 °C to 85 °C

Deep-Sleep Mode, V_DD= 1.71 V to 1.89 V (Regulator Bypassed)

I_DD19

I_DD20

WDT with WCO on

–

µA T = 25 °C

µA T = –40 °C to 85 °C

Hibernate Mode, V_DD= 1.8 V to 3.6 V

T = 25 °C,

nA

I_DD27

I_DD28

GPIO and reset active

–

150

–

V_DD= 3.3 V

GPIO and reset active

nA T = –40 °C to 85 °C

Hibernate Mode, V_DD= 3.6 V to 5.5 V

T = 25 °C,

nA

I_DD29

GPIO and reset active

–

V_DD= 5 V

I_DD30

GPIO and reset active

nA T = –40 °C to 85 °C

Stop Mode, V_DD= 1.8 V to 3.6 V

T = 25 °C,

nA

I_DD33

Stop-mode current (V_DD

)

–

20

–

V

_DD= 3.3 V

T = 25 °C,

_DDR= 3.3 V

I_DD34

I_DD35

I_DD36

Stop-mode current (V_DDR

)

–

40

–

–-

–

nA

V

Stop-mode current (V_DD

)

nA T = –40 °C to 85 °C

T = –40 °C to 85 °C,

nA

Stop-mode current (V_DDR

–

V_DDR= 1.9 V to 3.6 V

Stop Mode, V_DD= 3.6 V to 5.5 V

I_DD37Stop-mode current (V_DD

T = 25 °C,

nA

)

–

V

_DD= 5 V

T = 25 °C,

_DDR= 5 V

I_DD38

I_DD39

I_DD40

Stop-mode current (V_DDR

)

nA

V

Stop-mode current (V_DD

)

–

nA T = –40 °C to 85 °C

Stop-mode current (V_DDR

Document Number: 002-00214 Rev. *G

Page 14 of 38

CYBLE-222005-00

Table 10. AC Specifications

Parameter

Description

Min

DC

–

Typ

–

Max

48

–

Units

Details/Conditions

F_CPU

CPU frequency

MHz 1.71 V V_DD5.5 V

T_SLEEP

Wakeup from Sleep mode

0

µs

Guaranteed by characterization

24-MHz IMO. Guaranteed by

characterization

T_DEEPSLEEP

Wakeup from Deep-Sleep mode

–

25

µs

T_HIBERNATE

T_STOP

Wakeup from Hibernate mode

Wakeup from Stop mode

–

2

ms

Guaranteed by characterization

XRES wakeup

GPIO

Table 11. GPIO DC Specifications

Parameter

Description

Min

Typ

–

Max

Units

V

Details/Conditions

Input voltage HIGH threshold

LVTTL input, V_DD< 2.7 V

LVTTL input, V_DD>= 2.7 V

Input voltage LOW threshold

LVTTL input, V_DD< 2.7 V

LVTTL input, V_DD>= 2.7 V

Output voltage HIGH level

Output voltage LOW level

Pull-up resistor

0.7 × V_DD

–

CMOS input

[9]

V_IH

0.7 × V_DD

–

V

–

2.0

–

V

–

0.3× V_DD

V

CMOS input

V_IL

–

0.3× V_DD

V

–

0.8

–

V

–

V_DD–0.6

–

V

I_OH= 4 mA at 3.3-V V_DD

V_OH

V

_DD–0.5

–

V

I_OH= 1 mA at 1.8-V V_DD

–

0.6

0.4

8.5

2

V

I_OL= 8 mA at 3.3-V V_DD

V_OL

–

V

I_OL= 4 mA at 1.8-V V_DD

–

V

I_OL= 3 mA at 3.3-V V_DD

R_PULLUP

R_PULLDOWN

I_IL

3.5

–

5.6

–

k

nA

pF

mV

1

–

Pull-down resistor

–

Input leakage current (absolute value)

Input leakage on CTBm input pins

Input capacitance

25 °C, V_DD= 3.3 V

I_{IL_CTBM}

C_IN

V_HYSTTL

V_HYSCMOS

–

4

–

7

–

Input hysteresis LVTTL

25

40

–

V_DD> 2.7 V

–

Input hysteresis CMOS

0.05 × V_DD

–

Current through protection diode to

V_DD/V_SS

I_DIODE

–

100

200

µA

–

Maximum total source or sink chip

current

I_{TOT_GPIO}

–

mA

Note

9.

V

must not exceed V + 0.2 V.

IH DD

Document Number: 002-00214 Rev. *G

Page 15 of 38

CYBLE-222005-00

Table 12. GPIO AC Specifications

Parameter Description

T_RISEF

Min

2

Typ

–

Max

12

Units

ns

Details/Conditions

3.3-V V_DDD, C_LOAD= 25 pF

Rise time in Fast-Strong mode

Fall time in Fast-Strong mode

Rise time in Slow-Strong mode

Fall time in Slow-Strong mode

T_FALLF

T_RISES

T_FALLS

2

–

12

ns

10

–

60

ns

–

60

ns

GPIO F_OUT; 3.3 V  V_DD5.5 V

90/10%, 25-pF load, 60/40 duty

cycle

F_GPIOUT1

F_GPIOUT2

F_GPIOUT3

F_GPIOUT4

F_GPIOIN

–

33

16.7

7

MHz

Fast-Strong mode

GPIO F_OUT; 1.7 VV_DD3.3 V

Fast-Strong mode

90/10%, 25-pF load, 60/40 duty

cycle

GPIO F_OUT; 3.3 V V_DD5.5 V

Slow-Strong mode

90/10%, 25-pF load, 60/40 duty

cycle

GPIO F_OUT; 1.7 V V_DD3.3 V

Slow-Strong mode

90/10%, 25-pF load, 60/40 duty

cycle

3.5

48

GPIO input operating frequency

1.71 V V_DD5.5 V

MHz 90/10% V_IO

Table 13. OVT GPIO DC Specifications (P5_0 and P5_1 Only)

Parameter

Description

Min

–

Typ

–

Max

10

Units

µA

Details/Conditions

Input leakage (absolute value).

I_IL

V_OL

25°C, V_DD= 0 V, V_IH= 3.0 V

I_OL= 20 mA, V_DD> 2.9 V

V

_IH> V_DD

Output voltage LOW level

–

0.4

V

Table 14. OVT GPIO AC Specifications (P5_0 and P5_1 Only)

Parameter

T_{RISE_OVFS}

T_{FALL_OVFS}

Description

Min

1.5

Typ

–

Max

12

Units

ns

Details/Conditions

Output rise time in Fast-Strong mode

Output fall time in Fast-Strong mode

25-pF load, 10%–90%, V_DD=3.3 V

–

12

ns

25-pF load, 10%-90%,

V_DD= 3.3 V

T_RISESS

T_FALLSS

F_GPIOUT1

F_GPIOUT2

Output rise time in Slow-Strong mode

Output fall time in Slow-Strong mode

10

–

60

24

16

ns

25-pF load, 10%-90%,

V_DD= 3.3 V

GPIO F_OUT; 3.3 V V_DD5.5 V

Fast-Strong mode

90/10%, 25-pF load, 60/40 duty

cycle

MHz

GPIO F_OUT; 1.71 V V_DD3.3 V

Fast-Strong mode

90/10%, 25-pF load, 60/40 duty

cycle

–

Document Number: 002-00214 Rev. *G

Page 16 of 38

CYBLE-222005-00

XRES

Table 15. XRES DC Specifications

Parameter

V_IH

Description

Min

Typ

–

Max

Units

V

Details/Conditions

Input voltage HIGH threshold

Input voltage LOW threshold

Pull-up resistor

0.7 × V_DDD

–

CMOS input

V_IL

–

3.5

–

0.3 × V_DDD

V

R_PULLUP

C_IN

5.6

3

8.5

–

k

pF

–

Input capacitance

V_HYSXRES

Input voltage hysteresis

Current through protection diode to

–

100

–

mV

I_DIODE

–

100

µA

–

V_DD/V_SS

Table 16. XRES AC Specifications

Parameter

Description

Min

Typ

Max

Units

Details/Conditions

T_RESETWIDTHReset pulse width

1

–

µs

–

SAR ADC

Table 17. SAR ADC DC Specifications

Parameter

A_RES

Description

Min

Typ

–

Max

12

6

Units

Details/Conditions

Resolution

–

bits

A_CHNIS_S

A-CHNKS_D

Number of channels - single-ended

Number of channels - differential

–

6 full-speed^[10]

–

3

Diff inputs use

neighboring I/O^[10]

A-MONO

Monotonicity

Gain error

–

Yes

A_GAINERR

±0.1

%

With external

reference

A_OFFSET

Input offset voltage

–

2

mV

Measured with 1-V

V_REF

A_ISAR

Current consumption

–

V_SS

–

1

V_DDA

2.2

mA

V

A_VINS

Input voltage range - single-ended

Input voltage range - differential

Input resistance

A_VIND

V

A_INRES

A_INCAP

VREFSAR

k

pF

%

Input capacitance

–

10

Trimmed internal reference to SAR

–1

1

Percentage of Vbg

(1.024 V)

Table 18. SAR ADC AC Specifications

Parameter Description

A_PSRR

Details/

Min

Typ

Max

Units

Conditions

Power-supply rejection ratio

70

–

dB

Measured at 1-V

reference

A_CMRR

A_SAMP

Fsarintref

Common-mode rejection ratio

Sample rate

66

–

1

dB

Msps

SAR operating speed without external ref.

bypass

–

100

Ksps 12-bit resolution

Note

10. A maximum of six single-ended ADC Channels can be accomplished only if the AMUX Buses are not being used for other functionality (such as CapSense).

If the AMUX Buses are being used for other functionality, then the maximum number of single-ended ADC channels is four. Similarly, if the AMUX Buses are

being used for other functionality, then the maximum number of differential ADC channels is two.

Document Number: 002-00214 Rev. *G

Page 17 of 38

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Table 18. SAR ADC AC Specifications (continued)

Details/

Parameter

A_SNR

Description

Min

Typ

Max

Units

Conditions

Signal-to-noise ratio (SNR)

65

–

dB

F_IN= 10 kHz

A_BW

A_INL

Input bandwidth without aliasing

A_SAMP/2

2

kHz

Integral nonlinearity. V_DD= 1.71 V to 5.5 V,

1 Msps

–1.7

LSB V_REF= 1 V to V_DD

LSB V_REF= 1.71 V to V_DD

LSB V_REF= 1 V to V_DD

LSB V_REF= 1.71 V to V_DD

LSB V_REF= 1 V to V_DD

A_INL

A_dnl

Integral nonlinearity. V_DDD= 1.71 V to 3.6 V,

1 Msps

–1.5

–1

–

1.7

2.2

2

Integral nonlinearity. V_DD= 1.71 V to 5.5 V,

500 Ksps

Differential nonlinearity. V_DD= 1.71 V to

5.5 V, 1 Msps

A_DNL

Differential nonlinearity. V_DD= 1.71 V to

3.6 V, 1 Msps

–1

Differential nonlinearity. V_DD= 1.71 V to

5.5 V, 500 Ksps

–1

2.2

–65

A_THD

Total harmonic distortion

–

dB

F_IN= 10 kHz

CSD

CSD Block Specifications

Details/

Conditions

Parameter

Description

Min

Typ

Max

Units

V_CSD

Voltage range of operation

1.71

–

5.5

V

IDAC1

IDAC2

SNR

DNL for 8-bit resolution

INL for 8-bit resolution

–1

–3

–1

–3

5

–

1

3

1

3

–

LSB

Ratio

DNL for 7-bit resolution

INL for 7-bit resolution

Capacitance range of

9 pF to 35 pF, 0.1-pF

sensitivity. Radio is not

operating during the

scan

Ratio of counts of finger to noise

I_{DAC1_CRT1}

I_{DAC1_CRT2}

I_{DAC2_CRT1}

I_{DAC2_CRT2}

Output current of IDAC1 (8 bits) in High

range

–

612

306

305

153

–

µA

Output current of IDAC1 (8 bits) in Low

range

Output current of IDAC2 (7 bits) in High

range

Output current of IDAC2 (7 bits) in Low

range

Document Number: 002-00214 Rev. *G

Page 18 of 38

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Digital Peripherals

Timer

Table 19. Timer DC Specifications

Parameter

I_TIM1

I_TIM2

I_TIM3

Description

Min

–

Typ

–

Max

42

Units

Details/Conditions

16-bit timer

Block current consumption at 3 MHz

Block current consumption at 12 MHz

Block current consumption at 48 MHz

µA

–

130

535

16-bit timer

Table 20. Timer AC Specifications

Parameter Description

T_TIMFREQ

Min

F_CLK

Typ

–

Max

48

Units

MHz

Details/Conditions

Operating frequency

T_CAPWINT

Capture pulse width (internal)

Capture pulse width (external)

Timer resolution

2 × T_CLK

T_CLK

–

ns

T_CAPWEXT

T_TIMRES

T_TENWIDINT

T_TENWIDEXT

T_TIMRESWINT

T_TIMRESEXT

Enable pulse width (internal)

Enable pulse width (external)

Reset pulse width (internal)

Reset pulse width (external)

2 × T_CLK

Counter

Table 21. Counter DC Specifications

Parameter Description

I_CTR1

I_CTR2

I_CTR3

Min

–

Typ

–

Max

42

Units

µA

Details/Conditions

16-bit counter

Block current consumption at 3 MHz

Block current consumption at 12 MHz

Block current consumption at 48 MHz

–

130

535

µA

16-bit counter

µA

Table 22. Counter AC Specifications

Parameter

Description

Min

Typ

Max

Units

Details/Conditions

T_CTRFREQ

Operating frequency

F_CLK

–

48

MHz

T_CTRPWINT

T_CTRPWEXT

T_CTRES

Capture pulse width (internal)

Capture pulse width (external)

Counter Resolution

2 × T_CLK

T_CLK

–

ns

T_CENWIDINT

T_CENWIDEXT

T_CTRRESWINT

Enable pulse width (internal)

Enable pulse width (external)

Reset pulse width (internal)

2 × T_CLK

T_CTRRESWEXTReset pulse width (external)

Pulse Width Modulation (PWM)

Table 23. PWM DC Specifications

Parameter

I_PWM1

I_PWM2

I_PWM3

Description

Min

–

Typ

–

Max

42

Units

µA

Details/Conditions

16-bit PWM

Block current consumption at 3 MHz

Block current consumption at 12 MHz

Block current consumption at 48 MHz

–

130

535

µA

16-bit PWM

–

µA

16-bit PWM

Document Number: 002-00214 Rev. *G

Page 19 of 38

CYBLE-222005-00

Table 24. PWM AC Specifications

Parameter Description

T_PWMFREQ

T_PWMPWINT

T_PWMEXT

Min

Typ

–

Max

48

–

Units

Details/Conditions

Operating frequency

F_CLK

MHz

ns

Pulse width (internal)

2 × T_CLK

–

Pulse width (external)

–

ns

T_PWMKILLINT

T_PWMKILLEXT

T_PWMEINT

Kill pulse width (internal)

Kill pulse width (external)

Enable pulse width (internal)

Enable pulse width (external)

Reset pulse width (internal)

Reset pulse width (external)

–

ns

–

ns

–

ns

T_PWMENEXT

T_PWMRESWINT

T_PWMRESWEXT

–

ns

–

ns

–

ns

LCD Direct Drive

Table 25. LCD Direct Drive DC Specifications

Spec ID Parameter Description

SID228 I_LCDLOW

Min

Typ

Max

Units Details/Conditions

Operating current in low-power mode

–

17.5

–

µA 16 × 4 small segment

display at 50 Hz

SID229

C_LCDCAP

LCD capacitance per segment/common

driver

–

500

5000

pF

SID230

SID231

LCD_OFFSET

I_LCDOP1

Long-term segment offset

–

20

2

–

mV

LCD system operating current

V_BIAS= 5 V

mA 32 × 4 segments.

50 Hz at 25 °C

SID232

I_LCDOP2

LCD system operating current

V_BIAS= 3.3 V

–

2

–

mA 32 × 4 segments

50 Hz at 25 °C

Table 26. LCD Direct Drive AC Specifications

Spec ID Parameter Description

SID233 F_LCDLCD frame rate

Min

Typ

Max

Units

Details/Conditions

10

50

150

Hz

Document Number: 002-00214 Rev. *G

Page 20 of 38

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Serial Communication

Table 27. Fixed I²C DC Specifications

Parameter

I_I2C1

Description

Min

–

Typ Max Units

Details/Conditions

50

155

390

1.4

Block current consumption at 100 kHz

Block current consumption at 400 kHz

Block current consumption at 1 Mbps

I²C enabled in Deep-Sleep mode

–

µA

–

I_I2C2

I_I2C3

I_I2C4

–

Table 28. Fixed I²C AC Specifications

Parameter Description

F_I2C1

Min

Typ Max Units

Details/Conditions

Bit rate

–

400

kHz

Table 29. Fixed UART DC Specifications

Parameter

I_UART1

Description

Min

–

Typ

–

Max Units

Details/Conditions

Block current consumption at 100 kbps

Block current consumption at 1000 kbps

55

µA

–

I_UART2

–

312

Table 30. Fixed UART AC Specifications

Parameter

Description

Min

Typ

Max

Units

Details/Conditions

F_UART

Bit rate

–

1

Mbps

–

Table 31. Fixed SPI DC Specifications

Parameter Description

I_SPI1

I_SPI2

I_SPI3

Min

–

Typ

Max Units

Details/Conditions

Block current consumption at 1 Mbps

Block current consumption at 4 Mbps

Block current consumption at 8 Mbps

–

360

560

600

µA

–

Table 32. Fixed SPI AC Specifications

Parameter Description

F_SPISPI operating frequency (master; 6x over sampling)

Min

Typ

Max

Units

Details/Conditions

–

8

MHz

–

Table 33. Fixed SPI Master Mode AC Specifications

Parameter

T_DMO

Description

Min

Typ

Max Units

Details/Conditions

MOSI valid after SCLK driving edge

–

18

ns

–

MISO valid before SCLK capturing edge Full clock,

late MISO sampling used

Full clock, late MISO

sampling

T_DSI

20

0

–

ns

Referred to Slave capturing

edge

T_HMO

Previous MOSI data hold time

–

ns

Table 34. Fixed SPI Slave Mode AC Specifications

Parameter

T_DMI

Description

Min Typ

Max

Units

Details/Conditions

MOSI valid before SCLK capturing edge

MISO valid after SCLK driving edge

40

–

ns

T_DSO

42 + 3 × T_CPUns

MISO Valid after SCLK driving edge in

external clock mode. V_DD< 3.0 V

T_{DSO_ext}

–

50

ns

T_HSO

Previous MISO data hold time

0

–

ns

T_SSELSCK

SSEL valid to first SCK valid edge

100

Document Number: 002-00214 Rev. *G

Page 21 of 38

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Memory

Table 35. Flash DC Specifications

Parameter

V_PE

Description

Min

1.71

2

Typ

–

Max

5.5

–

Units

Details/Conditions

–

Erase and program voltage

V

T_WS48

T_WS32

T_WS16

Number of Wait states at 32–48 MHz

Number of Wait states at 16–32 MHz

Number of Wait states for 0–16 MHz

–

CPU execution from flash

1

–

0

–

Table 36. Flash AC Specifications

Parameter

Description

Min

Typ

–

Max

20

13

7

Units

Details/Conditions

[11]

T_ROWWRITE

Row (block) write time (erase and program)

Row erase time

–

ms Row (block) = 256 bytes

[11]

T_ROWERASE

–

ms

–

[11]

T_ROWPROGRAM

Row program time after erase

Bulk erase time (256 KB)

–

[11]

T_BULKERASE

–

35

25

–

ms

[11]

T_DEVPROG

Total device program time

–

seconds

cycles

years

F_END

F_RET

F_RET2

Flash endurance

100 K

20

10

–

Flash retention. T_A 55 °C, 100 K P/E cycles

Flash retention. T_A 85 °C, 10 K P/E cycles

–

System Resources

Power-on-Reset (POR)

Table 37. POR DC Specifications

Parameter

Description

Min

0.80

0.75

15

Typ

–

Max

1.45

1.40

200

Units

V

Details/Conditions

V_RISEIPOR

V_FALLIPOR

V_IPORHYST

Rising trip voltage

–

Falling trip voltage

Hysteresis

–

V

–

mV

Table 38. POR AC Specifications

Parameter

Description

Min

Typ

Max

Units

Details/Conditions

Precision power-on reset (PPOR) response

time in Active and Sleep modes

T_{PPOR_TR}

–

1

µs

–

Table 39. Brown-Out Detect

Parameter

Description

Min

1.64

1.4

Typ

–

Max

–

Units

Details/Conditions

V_FALLPPOR

V_FALLDPSLP

BOD trip voltage in Active and Sleep modes

BOD trip voltage in Deep Sleep

V

–

Table 40. Hibernate Reset

Parameter

Description

Min

Typ

Max

Units

Details/Conditions

V_HBRTRIP

BOD trip voltage in Hibernate

1.1

–

V

–

Note

11. It can take as much as 20 ms to write to flash. During this time, the device should not be reset, or flash operations will be interrupted and cannot be relied on to have

completed. Reset sources include the XRES pin, software resets, CPU lockup states and privilege violations, improper power supply levels, and watchdogs. Make

certain that these are not inadvertently activated.

Document Number: 002-00214 Rev. *G

Page 22 of 38

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Voltage Monitors (LVD)

Table 41. Voltage Monitor DC Specifications

Parameter

V_LVI1

Description

Min

1.71

1.76

1.85

1.95

2.05

2.15

2.24

2.34

2.44

2.54

2.63

2.73

2.83

2.93

3.12

4.39

–

Typ

1.75

1.80

1.90

2.00

2.10

2.20

2.30

2.40

2.50

2.60

2.70

2.80

2.90

3.00

3.20

4.50

–

Max

1.79

1.85

1.95

2.05

2.15

2.26

2.36

2.46

2.56

2.67

2.77

2.87

2.97

3.08

3.28

4.61

100

Units

V

Details/Conditions

LVI_A/D_SEL[3:0] = 0000b

LVI_A/D_SEL[3:0] = 0001b

LVI_A/D_SEL[3:0] = 0010b

LVI_A/D_SEL[3:0] = 0011b

LVI_A/D_SEL[3:0] = 0100b

LVI_A/D_SEL[3:0] = 0101b

LVI_A/D_SEL[3:0] = 0110b

LVI_A/D_SEL[3:0] = 0111b

LVI_A/D_SEL[3:0] = 1000b

LVI_A/D_SEL[3:0] = 1001b

LVI_A/D_SEL[3:0] = 1010b

LVI_A/D_SEL[3:0] = 1011b

LVI_A/D_SEL[3:0] = 1100b

LVI_A/D_SEL[3:0] = 1101b

LVI_A/D_SEL[3:0] = 1110b

LVI_A/D_SEL[3:0] = 1111b

Block current

–

V_LVI2

V

V_LVI3

V

V_LVI4

V

V_LVI5

V

V_LVI6

V

V_LVI7

V

V_LVI8

V

V_LVI9

V

V_LVI10

V_LVI11

V_LVI12

V_LVI13

V_LVI14

V_LVI15

V_LVI16

LVI_IDD

V

µA

Table 42. Voltage Monitor AC Specifications

Parameter

T_MONTRIP

Description

Min

Typ

Max

Units

Details/Conditions

Voltage monitor trip time

–

1

µs

–

SWD Interface

Table 43. SWD Interface Specifications

Parameter

F_SWDCLK1

F_SWDCLK2

Description

3.3 V  V_DD 5.5 V

1.71 V  V_DD 3.3 V

Min

Typ

–

Max

Units

MHz

ns

Details/Conditions

–

14

SWDCLK 1/3 CPU clock frequency

–

7

SWDCLK 1/3 CPU clock frequency

T_SWDI_SETUP T = 1/f SWDCLK

T_SWDI_HOLD T = 1/f SWDCLK

0.25 × T

–

0.25 × T

–

0.5 × T

–

ns

T_SWDO_VALID T = 1/f SWDCLK

T_SWDO_HOLD T = 1/f SWDCLK

–

1

–

ns

–

ns

Document Number: 002-00214 Rev. *G

Page 23 of 38

CYBLE-222005-00

Internal Main Oscillator

Table 44. IMO DC Specifications

Parameter

I_IMO1

Description

Min

–

Typ

–

Max

1000

325

225

180

150

Units

µA

Details/Conditions

IMO operating current at 48 MHz

IMO operating current at 24 MHz

IMO operating current at 12 MHz

IMO operating current at 6 MHz

IMO operating current at 3 MHz

–

I_IMO2

I_IMO3

I_IMO4

I_IMO5

–

µA

–

µA

–

µA

–

µA

Table 45. IMO AC Specifications

Parameter Description

F_IMOTOL3

Min

–

Typ

–

Max

±2

–

Units

%

Details/Conditions

Frequency variation from 3 to 48 MHz

IMO startup time

With API-called calibration

–

12

µs

Internal Low-Speed Oscillator

Table 46. ILO DC Specifications

Parameter

I_ILO2

Description

ILO operating current at 32 kHz

Min

Typ

Max

Units

Details/Conditions

–

0.3

1.05

µA

–

Table 47. ILO AC Specifications

Parameter Description

T_STARTILO1

F_ILOTRIM1

Min

–

Typ

–

Max

2

Units

ms

Details/Conditions

ILO startup time

–

32-kHz trimmed frequency

15

32

50

kHz

Table 48. Recommended ECO Trim Value

Parameter

Description

24-MHz trim value

(firmware configuration)

Value

Details/Conditions

Recommended trim value that needs to be loaded to register

CY_SYS_XTAL_BLERD_BB_XO_CAPTRIM_REG

ECO_TRIM

0x0000A0A0

BLE Subsystem

Table 49. BLE Subsystem

Details/

Conditions

Parameter

Description

Min

Typ

Max

Units

RF Receiver Specification

RXS, IDLE

RX sensitivity with idle transmitter

–

–89

–91

–

dBm

RX sensitivity with idle transmitter

excluding Balun loss

Guaranteed by design

simulation

RXS, DIRTY

RX sensitivity with dirty transmitter

–

–87

–91

–70

–

dBm

RF-PHY Specification

(RCV-LE/CA/01/C)

RXS, HIGHGAIN

RX sensitivity in high-gain mode with idle

transmitter

–

PRXMAX

CI1

Maximum input power

–10

–

–1

9

–

dBm

dB

RF-PHY Specification

(RCV-LE/CA/06/C)

Cochannel interference,

Wanted signal at –67 dBm and Interferer

at FRX

21

RF-PHY Specification

(RCV-LE/CA/03/C)

Document Number: 002-00214 Rev. *G

Page 24 of 38

CYBLE-222005-00

Table 49. BLE Subsystem (continued)

Parameter Description

Details/

Conditions

Min

Typ

Max

Units

CI2

CI3

CI4

CI5

CI3

Adjacent channel interference

Wanted signal at –67 dBm and Interferer

at FRX ±1 MHz

–

3

15

dB

RF-PHY Specification

(RCV-LE/CA/03/C)

Adjacent channel interference

Wanted signal at –67 dBm and Interferer

at FRX ±2 MHz

–

–29

–39

–20

–30

–27

–

dB

RF-PHY Specification

(RCV-LE/CA/03/C)

Adjacent channel interference

Wanted signal at –67 dBm and Interferer

at FRX ±3 MHz

RF-PHY Specification

(RCV-LE/CA/03/C)

Adjacent channel interference

Wanted Signal at –67 dBm and Interferer

–

dB

RF-PHY Specification

(RCV-LE/CA/03/C)

at Image frequency (F_IMAGE

)

Adjacent channel interference

Wanted signal at –67 dBm and Interferer

at Image frequency (F_IMAGE± 1 MHz)

–

dB

RF-PHY Specification

(RCV-LE/CA/03/C)

OBB1

OBB2

OBB3

OBB4

IMD

Out-of-band blocking,

Wanted signal at –67 dBm and Interferer

at F = 30–2000 MHz

–30

–35

–30

–50

–

dBm

RF-PHY Specification

(RCV-LE/CA/04/C)

Out-of-band blocking,

Wanted signal at –67 dBm and Interferer

at F = 2003–2399 MHz

–

RF-PHY Specification

(RCV-LE/CA/04/C)

Out-of-band blocking,

Wanted signal at –67 dBm and Interferer

at F = 2484–2997 MHz

–

RF-PHY Specification

(RCV-LE/CA/04/C)

Out-of-band blocking,

Wanted signal a –67 dBm and Interferer

at F = 3000–12750 MHz

–

RF-PHY Specification

(RCV-LE/CA/04/C)

Intermodulation performance

Wanted signal at –64 dBm and 1-Mbps

BLE, third, fourth, and fifth offset channel

–

RF-PHY Specification

(RCV-LE/CA/05/C)

RXSE1

RXSE2

Receiver spurious emission

30 MHz to 1.0 GHz

–

–57

–47

100-kHz measurement

bandwidth

ETSI EN300 328 V1.8.1

Receiver spurious emission

1.0 GHz to 12.75 GHz

–

1-MHz measurement

bandwidth

ETSI EN300 328 V1.8.1

RF Transmitter Specifications

TXP, ACC

RF power accuracy

–

±1

20

0

–

dB

TXP, RANGE

TXP, 0dBm

TXP, MAX

RF power control range

Output power, 0-dB Gain setting (PA7)

dBm

Output power, maximum power setting

(PA10)

3

TXP, MIN

F2AVG

Output power, minimum power setting

(PA1)

–

–18

–

dBm

kHz

Average frequency deviation for

10101010 pattern

185

RF-PHY Specification

(TRM-LE/CA/05/C)

Document Number: 002-00214 Rev. *G

Page 25 of 38

CYBLE-222005-00

Table 49. BLE Subsystem (continued)

Parameter Description

F1AVG

Details/

Min

225

0.8

–150

–50

–20

–

Typ

250

–

Max

275

–

Units

Conditions

Average frequency deviation for

11110000 pattern

kHz

RF-PHY Specification

(TRM-LE/CA/05/C)

EO

Eye opening = F2AVG/F1AVG

RF-PHY Specification

(TRM-LE/CA/05/C)

FTX, ACC

FTX, MAXDR

FTX, INITDR

FTX, DR

IBSE1

Frequency accuracy

–

150

50

kHz

RF-PHY Specification

(TRM-LE/CA/06/C)

Maximum frequency drift

Initial frequency drift

–

RF-PHY Specification

(TRM-LE/CA/06/C)

–

20

RF-PHY Specification

(TRM-LE/CA/06/C)

Maximum drift rate

–

20

kHz/

50 µs

RF-PHY Specification

(TRM-LE/CA/06/C)

In-band spurious emission at 2-MHz

offset

–

–20

-30

-55.5

-41.5

dBm

RF-PHY Specification

(TRM-LE/CA/03/C)

IBSE2

In-band spurious emission at 3-MHz

offset

–

RF-PHY Specification

(TRM-LE/CA/03/C)

TXSE1

Transmitter spurious emissions

(average), <1.0 GHz

–

FCC-15.247

TXSE2

Transmitter spurious emissions

(average), >1.0 GHz

–

FCC-15.247

RF Current Specifications

IRX

Receive current in normal mode

–

18.7

16.4

21.5

20

–

mA

IRX_RF

Radio receive current in normal mode

Receive current in high-gain mode

TX current at 3-dBm setting (PA10)

TX current at 0-dBm setting (PA7)

Radio TX current at 0 dBm setting (PA7)

Measured at V_DDR

IRX, HIGHGAIN

ITX, 3dBm

ITX, 0dBm

ITX_RF, 0dBm

16.5

15.6

14.2

Measured at V_DDR

Radio TX current at 0 dBm excluding

Balun loss

Guaranteed by design

simulation

ITX,-3dBm

TX current at –3-dBm setting (PA4)

TX current at –6-dBm setting (PA3)

TX current at –12-dBm setting (PA2)

TX current at –18-dBm setting (PA1)

–

15.5

14.5

13.2

12.5

17.1

–

mA

µA

ITX,-6dBm

ITX,-12dBm

ITX,-18dBm

Iavg_1sec, 0dBm

Average current at 1-second BLE

connection interval

TXP: 0 dBm; ±20-ppm

master and slave clock

accuracy.

For empty PDU exchange

Iavg_4sec, 0dBm

Average current at 4-second BLE

connection interval

–

6.1

–

µA

TXP: 0 dBm; ±20-ppm

master and slave clock

accuracy.

For empty PDU exchange

General RF Specifications

FREQ

RF operating frequency

2400

–

2482

MHz

Document Number: 002-00214 Rev. *G

Page 26 of 38

CYBLE-222005-00

Table 49. BLE Subsystem (continued)

Parameter Description

CHBW

Details/

Conditions

Min

Typ

Max

Units

Channel spacing

–

2

–

MHz

kbps

µs

DR

On-air data rate

1000

120

75

–

IDLE2TX

BLE.IDLE to BLE. TX transition time

BLE.IDLE to BLE. RX transition time

140

120

IDLE2RX

µs

RSSI Specifications

RSSI, ACC

RSSI, RES

RSSI, PER

RSSI accuracy

–

±5

1

–

dB

µs

RSSI resolution

RSSI sample period

6

Document Number: 002-00214 Rev. *G

Page 27 of 38

CYBLE-222005-00

Environmental Specifications

Environmental Compliance

This Cypress BLE module is built in compliance with the Restriction of Hazardous Substances (RoHS) and Halogen Free (HF)

directives. The Cypress module and components used to produce this module are RoHS and HF compliant.

RF Certification

The CYBLE-222005-00 module is certified under the following RF certification standards:

■ FCC: WAP2005

■ CE

■ IC: 7922A-2005

■ MIC: 203-JN0495

■ KC: MSIP-CRM-Cyp-2005

Safety Certification

The CYBLE-222005-00 module complies with the following regulations:

■ Underwriters Laboratories, Inc. (UL) - Filing E331901

■ CSA

■ TUV

Environmental Conditions

Table 50 describes the operating and storage conditions for the Cypress BLE module.

Table 50. Environmental Conditions for CYBLE-222005-00

Description

Minimum Specification

Maximum Specification

85 °C

Operating temperature

-40 °C

5%

Operating humidity (relative, non-condensation)

Thermal ramp rate

85%

–

3 °C/minute

85 °C

Storage temperature

–40 °C

–

Storage temperature and humidity

85 ° C at 85%

ESD: Module integrated into system

Components^[12]

15-kV Air

2.2-kV Contact

–

ESD and EMI Protection

Exposed components require special attention to ESD and electromagnetic interference (EMI).

A grounded conductive layer inside the device enclosure is suggested for EMI and ESD performance. Any openings in the enclosure

near the module should be surrounded by a grounded conductive layer to provide ESD protection and a low-impedance path to ground.

Device Handling: Proper ESD protocol must be followed in manufacturing to ensure component reliability.

Note

12. This does not apply to the RF pins (ANT, XTALI, and XTALO). RF pins (ANT, XTALI, and XTALO) are tested for 500-V HBM.

Document Number: 002-00214 Rev. *G

Page 28 of 38

CYBLE-222005-00

Regulatory Information

FCC

FCC NOTICE:

The device CYBLE-222005-00, including the antenna 2450AT18B100 from Johanson Technology, complies with Part 15 of the FCC

Rules. The device meets the requirements for modular transmitter approval as detailed in FCC public Notice DA00-1407.transmitter

Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) This device must

accept any interference received, including interference that may cause undesired operation.

CAUTION:

The FCC requires the user to be notified that any changes or modifications made to this device that are not expressly approved by

Cypress Semiconductor may void the user's authority to operate the equipment.

This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules.

These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment

generates uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions,ê may cause

harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation.

If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment

off and on, the user is encouraged to try to correct the interference by one or more of the following measures:

■ Reorient or relocate the receiving antenna.

■ Increase the separation between the equipment and receiver.

■ Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.

■ Consult the dealer or an experienced radio/TV technician for help

LABELING REQUIREMENTS:

The Original Equipment Manufacturer (OEM) must ensure that FCC labelling requirements are met. This includes a clearly visible

label on the outside of the OEM enclosure specifying the appropriate Cypress Semiconductor FCC identifier for this product as well

as the FCC Notice above. The FCC identifier is FCC ID: WAP2005.

In any case the end product must be labeled exterior with "Contains FCC ID: WAP2005"

ANTENNA WARNING:

This device is tested with a standard SMA connector and with the antennas listed below. When integrated in the OEMs product, these

fixed antennas require installation preventing end-users from replacing them with non-approved antennas. Any antenna not in the

following table must be tested to comply with FCC Section 15.203 for unique antenna connectors and Section 15.247 for emissions.

RF EXPOSURE:

To comply with FCC RF Exposure requirements, the Original Equipment Manufacturer (OEM) must ensure to install the approved

antenna in the previous.

The preceding statement must be included as a CAUTION statement in manuals, for products operating with the approved antennas

in Table 6 on page 12, to alert users on FCC RF Exposure compliance. Any notification to the end user of installation or removal

instructions about the integrated radio module is not allowed.

The radiated output power of CYBLE-222005-00 with the chip antenna mounted (FCC ID: WAP2005) is far below the FCC radio

frequency exposure limits. Nevertheless, use CYBLE-222005-00 in such a manner that minimizes the potential for human contact

during normal operation.

End users may not be provided with the module installation instructions. OEM integrators and end users must be provided with

transmitter operating conditions for satisfying RF exposure compliance.

Document Number: 002-00214 Rev. *G

Page 29 of 38

CYBLE-222005-00

Industry Canada (IC) Certification

CYBLE-222005-00 is licensed to meet the regulatory requirements of Industry Canada (IC), License: IC: 7922A-2005

Manufacturers of mobile, fixed or portable devices incorporating this module are advised to clarify any regulatory questions and ensure

compliance for SAR and/or RF exposure limits. Users can obtain Canadian information on RF exposure and compliance from

www.ic.gc.ca.

This device has been designed to operate with the antennas listed in Table 6 on page 12, having a maximum gain of 0.5 dBi. Antennas

not included in this list or having a gain greater than 0.5 dBi are strictly prohibited for use with this device. The required antenna

impedance is 50 ohms. The antenna used for this transmitter must not be co-located or operating in conjunction with any other antenna

or transmitter.

IC NOTICE:

The device CYBLE-222005-00 including the antenna 2450AT18B100 from Johanson technology, complies with Canada RSS-GEN

Rules. The device meets the requirements for modular transmitter approval as detailed in RSS-GEN. Operation is subject to the

following two conditions: (1) This device may not cause harmful interference, and (2) This device must accept any interference

received, including interference that may cause undesired operation.

IC RADIATION EXPOSURE STATEMENT FOR CANADA

This device complies with Industry Canada licence-exempt RSS standard(s). Operation is subject to the following two conditions: (1)

this device may not cause interference, and (2) this device must accept any interference, including interference that may cause

undesired operation of the device.

Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation est

autorisée aux deux conditions suivantes : (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit accepter

tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.

LABELING REQUIREMENTS:

The Original Equipment Manufacturer (OEM) must ensure that IC labelling requirements are met. This includes a clearly visible label

on the outside of the OEM enclosure specifying the appropriate Cypress Semiconductor IC identifier for this product as well as the IC

Notice above. The IC identifier is 7922A-2005. In any case, the end product must be labeled in its exterior with "Contains IC:

7922A-2005".

European R&TTE Declaration of Conformity

Hereby, Cypress Semiconductor declares that the Bluetooth module CYBLE-222005-00 complies with the essential requirements and

other relevant provisions of Directive 1999/5/EC. As a result of the conformity assessment procedure described in Annex III of the

Directive 1999/5/EC, the end-customer equipment should be labeled as follows:

All versions of the CYBLE-222005-00 in the specified reference design can be used in the following countries: Austria, Belgium,

Cyprus, Czech Republic, Denmark, Estonia, Finland, France, Germany, Greece, Hungary, Ireland, Italy, Latvia, Lithuania, Luxem-

bourg, Malta, Poland, Portugal, Slovakia, Slovenia, Spain, Sweden, The Netherlands, the United Kingdom, Switzerland, and Norway.

Document Number: 002-00214 Rev. *G

Page 30 of 38

CYBLE-222005-00

MIC Japan

CYBLE-222005-00 is certified as a module with type certification number 203-JN0495. End products that integrate CYBLE-222005-00

do not need additional MIC Japan certification for the end product.

End product can display the certification label of the embedded module.

KC Korea

CYBLE-222005-00 is certified for use in Korea with certificate number MSIP-CRM-Cyp-2005.

Document Number: 002-00214 Rev. *G

Page 31 of 38

CYBLE-222005-00

Packaging

Table 51. Solder Reflow Peak Temperature

Maximum Time at Peak

Module Part Number

Package

Maximum Peak Temperature

No. of Cycles

Temperature

CYBLE-222005-00

22-pad SMT

260 °C

30 seconds

2

Table 52. Package Moisture Sensitivity Level (MSL), IPC/JEDEC J-STD-2

Module Part Number

Package

MSL

MSL 3

CYBLE-222005-00

22-pad SMT

The CYBLE-222005-00 is offered in tape and reel packaging. Figure 10 details the tape dimensions used for the CYBLE-222005-00.

Figure 10. CYBLE-222005-00 Tape Dimensions

Figure 11 details the orientation of the CYBLE-222005-00 in the tape as well as the direction for unreeling.

Figure 11. Component Orientation in Tape and Unreeling Direction

Document Number: 002-00214 Rev. *G

Page 32 of 38

CYBLE-222005-00

Figure 12 details reel dimensions used for the CYBLE-222005-00.

Figure 12. Reel Dimensions

The CYBLE-222005-00 is designed to be used with pick-and-place equipment in an SMT manufacturing environment. The

center-of-mass for the CYBLE-222005-00 is detailed in Figure 13.

Figure 13. CYBLE-222005-00 Center of Mass

Document Number: 002-00214 Rev. *G

Page 33 of 38

CYBLE-222005-00

Ordering Information

Table 53 lists the CYBLE-222005-00 part number and features. Table 54 lists the reel shipment quantities for the CYBLE-222005-00.

Table 53. Ordering Information

CPU

Speed

(MHz)

Flash

Size

(KB)

12-Bit

SAR

ADC

LCD

Drive

Part Number

CapSense

SCB TCPWM

I²S

Package

Packing

CYBLE-222005-00

48

256

Yes

2

4

1 Msps

Yes

22-SMT

Tape and

Reel

Table 54. Tape and Reel Package Quantity and Minimum Order Amount

Description

Minimum Reel Quantity Maximum Reel Quantity

Comments

Reel Quantity

500

–

Ships in 500 unit reel quantities.

Minimum Order Quantity (MOQ)

Order Increment (OI)

–

The CYBLE-222005-00 is offered in tape and reel packaging. The CYBLE-222005-00 ships with a maximum of 500 units/reel.

Part Numbering Convention

The part numbers are of the form CYBLE-ABCDEF-GH where the fields are defined as follows.

For additional information and a complete list of Cypress Semiconductor BLE products, contact your local Cypress sales

representative. To locate the nearest Cypress office, visit our website.

U.S. Cypress Headquarters Address

U.S. Cypress Headquarter Contact Info

Cypress website address

198 Champion Court, San Jose, CA 95134

(408) 943-2600

http://www.cypress.com

Document Number: 002-00214 Rev. *G

Page 34 of 38

CYBLE-222005-00

Acronyms

Acronym

Description

BLE

Bluetooth Low Energy

Bluetooth SIG

CE

Bluetooth Special Interest Group

European Conformity

CSA

EMI

Canadian Standards Association

electromagnetic interference

electrostatic discharge

ESD

FCC

GPIO

IC

Federal Communications Commission

general-purpose input/output

Industry Canada

IDE

integrated design environment

Korea Certification

KC

MIC

Ministry of Internal Affairs and Communications (Japan)

printed circuit board

PCB

RX

receive

QDID

SMT

qualification design ID

surface-mount technology; a method for producing electronic circuitry in which the components are placed

directly onto the surface of PCBs

TCPWM

TUV

timer, counter, pulse width modulator (PWM)

Germany: Technischer Überwachungs-Verein (Technical Inspection Association)

transmit

TX

Document Conventions

Units of Measure

Symbol

Unit of Measure

°C

degree Celsius

kilovolt

kV

mA

mm

mV

µA

milliamperes

millimeters

millivolt

microamperes

micrometers

megahertz

gigahertz

µm

MHz

GHz

V

volt

Document Number: 002-00214 Rev. *G

Page 35 of 38

CYBLE-222005-00

Document History Page

Document Title: CYBLE-222005-00 EZ-BLE™ PRoC™ Module

Document Number: 002-00214

Orig. of Submission

Revision

ECN

Description of Change

Change

Date

**

4953407

5060713

DSO

10/08/2015 Preliminary datasheet for CYBLE-222005-00 module.

*A

DSO

01/07/2016 Updated General Description to add reference and link to PRoC BLE silicon

datasheet and include Declaration ID number. .

Added More Information section to the datasheet.

Updated Figure 1, Figure 2, Figure 3, and Figure 4 to improve clarity and viewing.

Added Figure 5 in Recommended Host PCB Layout section to show solder pad

location from module origin.

Updated Table 3 and Figure 6 in Recommended Host PCB Layout section to

provide the location to the center of each solder pad from the origin (in mm and

mils).

Added BLE Subsystem section.

Added French translation for IC Radiation Exposure Statement For Canada in

Industry Canada (IC) Certification section on page 30 in accordance with IC

requirements.

Updated MIC Japan section on page 31 to specify final MIC certification number.

Updated KC Korea section on page 31 to specify final KC certification number.

Added Table 51 and Table 52 on page 32.

*B

*C

5146846

DSO

02/22/2016 Changed status from “Preliminary” to “Final”.

Update More Information section to add KBA210574 (Certification Test Reports)

to reference list.

Update General Description to include reference and link for QDID.

Updated orientation of module drawings in Figure 1 through Figure 9 and

Figure 13 to match orientation in PSoC Creator.

Updated Table 4 to add additional information with respect to the functional

capabilities for each solder pad.

5421877

09/01/2016 Updated More Information:

Added additional Knowledge Base Article references.

Updated Electrical Specification:

Updated System Resources:

Updated Internal Low-Speed Oscillator:

Updated Table 48 (Updated details in “Value” column corresponding to ECO_TRIM

parameter).

Updated Ordering Information:

No change in part numbers.

Added Table 54 (To specify minimum and maximum reel quantities that ship for

orders of the CYBLE-222005-00 module).

Updated to new template.

Completing Sunset Review.

*D

5528433

DSO

11/23/2016 Updated More Information:

Added EZ-Serial™ BLE Firmware Platform section.

Updated Recommended Host PCB Layout:

Updated Figure 4, Figure 5, and Figure 6 captions to specify that these as “Seen

on Host PCB”.

Updated Power Supply Connections and Recommended External Components:

Updated Figure 7 and Figure 8 to specify that these are “Seen from Bottom”.

Updated Digital and Analog Capabilities and Connections:

Updated Table 4:

Updated TCPWM column to add TCPWM capability on Port 2 pins.

Added Footnote 3.

Updated Document History Page:

Remove “,” from Document Title.

Document Number: 002-00214 Rev. *G

Page 36 of 38

CYBLE-222005-00

Document History Page

Document Title: CYBLE-222005-00 EZ-BLE™ PRoC™ Module

Document Number: 002-00214

*E

5553544

DSO

12/14/2016 Updated Electrical Specification:

Updated SAR ADC:

Updated Table 17 to add Note 10 to specify under what conditions the maximum

number of ADC channels can be achieved.

*F

5709580

6002363

GNKK

DSO

04/24/2017 Updated the Cypress logo and copyright information.

12/22/2017 Updated reel dimensions in Figure 10 and Figure 12.

*G

Document Number: 002-00214 Rev. *G

Page 37 of 38

CYBLE-222005-00

Sales, Solutions, and Legal Information

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Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office

closest to you, visit us at Cypress Locations.

®

Products

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cypress.com/arm

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PSoC 1 | PSoC 3 | PSoC 4 | PSoC 5LP | PSoC 6 MCU

Automotive

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cypress.com/support

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including any software or firmware included or referenced in this document ("Software"), is owned by Cypress under the intellectual property laws and treaties of the United States and other countries

worldwide. Cypress reserves all rights under such laws and treaties and does not, except as specifically stated in this paragraph, grant any license under its patents, copyrights, trademarks, or other

intellectual property rights. If the Software is not accompanied by a license agreement and you do not otherwise have a written agreement with Cypress governing the use of the Software, then Cypress

hereby grants you a personal, non-exclusive, nontransferable license (without the right to sublicense) (1) under its copyright rights in the Software (a) for Software provided in source code form, to

modify and reproduce the Software solely for use with Cypress hardware products, only internally within your organization, and (b) to distribute the Software in binary code form externally to end users

(either directly or indirectly through resellers and distributors), solely for use on Cypress hardware product units, and (2) under those claims of Cypress's patents that are infringed by the Software (as

provided by Cypress, unmodified) to make, use, distribute, and import the Software solely for use with Cypress hardware products. Any other use, reproduction, modification, translation, or compilation

of the Software is prohibited.

TO THE EXTENT PERMITTED BY APPLICABLE LAW, CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS DOCUMENT OR ANY SOFTWARE

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to deviate from published specifications. To the extent permitted by applicable law, Cypress reserves the right to make changes to this document without further notice. Cypress does not assume any

liability arising out of the application or use of any product or circuit described in this document. Any information provided in this document, including any sample design information or programming

code, is provided only for reference purposes. It is the responsibility of the user of this document to properly design, program, and test the functionality and safety of any application made of this

information and any resulting product. Cypress products are not designed, intended, or authorized for use as critical components in systems designed or intended for the operation of weapons, weapons

systems, nuclear installations, life-support devices or systems, other medical devices or systems (including resuscitation equipment and surgical implants), pollution control or hazardous substances

management, or other uses where the failure of the device or system could cause personal injury, death, or property damage ("Unintended Uses"). A critical component is any component of a device

or system whose failure to perform can be reasonably expected to cause the failure of the device or system, or to affect its safety or effectiveness. Cypress is not liable, in whole or in part, and you

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and against all claims, costs, damages, and other liabilities, including claims for personal injury or death, arising from or related to any Unintended Uses of Cypress products.

Cypress, the Cypress logo, Spansion, the Spansion logo, and combinations thereof, WICED, PSoC, CapSense, EZ-USB, F-RAM, and Traveo are trademarks or registered trademarks of Cypress in

the United States and other countries. For a more complete list of Cypress trademarks, visit cypress.com. Other names and brands may be claimed as property of their respective owners.

Document Number: 002-00214 Rev. *G

Revised December 22, 2017

Page 38 of 38


型号：	CYBLE-222005-00
厂家：	CYPRESS
描述：	Telecom Circuit, 1-Func, SMT-22 电信电信集成电路
文件：	总38页 (文件大小：802K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

CYBLE-222005-00 [CYPRESS]

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