MTBC7N10K3-0-BM-G [CYSTEKEC]

100V N-Channel Enhancement Mode MOSFET;


型号：	MTBC7N10K3-0-BM-G
厂家：	CYSTECH ELECTONICS CORP.
描述：	100V N-Channel Enhancement Mode MOSFET
文件：	总10页 (文件大小：718K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

Spec. No. : C886K3

Issued Date : 2018.06.13

Revised Date :

CYStech Electronics Corp.

Page No. : 1/10

100V N-Channel Enhancement Mode MOSFET

BVDSS

100V

389mΩ

413mΩ

407mΩ

MTBC7N10K3

ID @T =25°C, VGS=10V

RDSON(TYP)@VGS=10V, ID=1A

RDSON(TYP)@VGS=4.5V, ID=1A

RDSON(TYP)@VGS=4V, ID=1A

Features

• Lower gate charge.

• ESD protected gate.

• Pb-free lead plating and Halogen-free package.

Equivalent Circuit

Outline

MTBC7N10K3

TO-92L

G：Gate S：Source D：Drain

S D G

Ordering Information

Device

Package

TO-92L

Shipping

MTBC7N10K3-0-TB-G

2000 pcs / tape & box

(Pb-free lead plating and halogen-free package)

TO-92L

500 pcs / bag, 10 bags/box,

10 boxes/carton

MTBC7N10K3-0-BM-G

(Pb-free lead plating and halogen-free package)

Environment friendly grade : S for RoHS compliant products, G for RoHS compliant and

green compound products

Packing spec, TB : 2000 pcs / tape & box ; BM : 500 pcs/bag, 10 bags/box, 10 boxes/carton

Product rank, zero for no rank products

Product name

MTBC7N10K3

CYStek Product Specification

Spec. No. : C886K3

Issued Date : 2018.06.13

Revised Date :

CYStech Electronics Corp.

Page No. : 2/10

Absolute Maximum Ratings (Tc=25C, unless otherwise noted)

Parameter

Drain-Source Voltage

Symbol

Limits

Unit

VDS

VGS

100

±20

Gate-Source Voltage

Continuous Drain Current

Pulsed Drain Current

Power Dissipation

TA=25°C, VGS=10V

TA=70°C, VGS=10V

IDM

0.8

(Note 1 & 2)

TA=25°C

TA=70°C

0.64

Operating Junction and Storage Temperature

Tj, Tstg

-55 ~ +150

C

Thermal Data

Parameter

Thermal Resistance, Junction-to-ambient, max

Symbol

RθJA

Value

125

Unit

C/W

Note :1. Pulse width limited by maximum junction temperature.

2. Duty cycle ≤ 1%.

Electrical Characteristics (TA=25C, unless otherwise specified)

Symbol

Static

BV_DSS

Min.

Typ.

Max.

Unit

Test Conditions

100

107

2.5

V_GS=0V, I_D=250μA

△

BV_DSS/ Tj

V_GS(th)

mV/ C I_D=1mA, referenced to 25 C

V_DS=10V, I_D=1mA

△

V_GS(th)/ Tj

-3

mV/ C I_D=1mA, referenced to 25 C

I_GSS

±10

V_GS=±16V, V_DS=0V

V_DS=80V, V_GS=0V

V_DS=80V, V_GS=0V, Tj=125C

I_D=1A, V_GS=10V

I_D=1A, V_GS=4.5V

I_D=1A, V_GS=4V

μA

I_DSS

520

560

580

389

407

413

2.4

*R_DS(ON)

m

*G_FS

I_D=1A, V_GS=10V

Dynamic

Ciss

103

150

Coss

Crss

*t_d(ON)

V_DS=25V, V_GS=0V, f=1MHz

3.6

7.2

*t_r

V_DS=50V, I_D=0.5A,V_GS=10V,

R_G=10

*t_d(OFF)

17.2

18.8

*t_f

MTBC7N10K3

CYStek Product Specification

Spec. No. : C886K3

Issued Date : 2018.06.13

Revised Date :

CYStech Electronics Corp.

Page No. : 3/10

*Qg ¹

*Qgs ¹

*Qgd ¹

1.6

0.8

0.5

3.2

1.6

1.5

V_DS=50V, I_D=1A, V_GS=5V

f=1MHz



Source-Drain Diode

I_S

V_SD

0.8

1.2

I_S=1A, V_GS=0V

Pulse test : Pulse width≤300μs, Duty cycle≤2%

Independent of operating temperature

Pulse width limited by maximum junction temperature

MTBC7N10K3

CYStek Product Specification

Spec. No. : C886K3

Issued Date : 2018.06.13

Revised Date :

CYStech Electronics Corp.

Page No. : 4/10

Typical Characteristics

Typical Output Characteristics

3.5

0.8

0.6

0.4

0.2

10V

10V,9V,8V,7V,6V,5V,4V,3V

2.5

VGS=2V

1.5

VGS=2V

0.5

0.2

0.4

0.6

0.8

VDS, Drain-Source Voltage(V)

Brekdown Voltage vs Ambient Temperature

Typical Transfer Characteristics

1.6

1.4

1.2

VDS=10V

3.5

2.5

1.5

0.8

0.6

0.4

ID=250μA,

0.5

VGS=0V

-75 -50 -25

50 75 100 125 150 175

Tj, Junction Temperature(°C)

VGS, Gate-Source Voltage(V)

Static Drain-Source On-State resistance vs Drain Current

Reverse Drain Current vs Source-Drain Voltage

1000

1.2

VGS=0V

0.8

0.6

0.4

0.2

Tj=25°C

Tj=150°C

top : VGS=2V

4.5V

bottom 10V

100

0.001

0.01

0.1

ID, Drain Current(A)

IDR, Reverse Drain Current(A)

MTBC7N10K3

CYStek Product Specification

Spec. No. : C886K3

Issued Date : 2018.06.13

Revised Date :

CYStech Electronics Corp.

Page No. : 5/10

Typical Characteristics(Cont.)

Drain-Source On-State Resistance vs Junction Tempearture

Static Drain-Source On-State Resistance vs Gate-Source

Voltage

1000

800

600

400

200

2.4

2.2

ID=1A

VGS=10V, ID=1A

1.8

1.6

1.4

1.2

0.8

0.6

0.4

RDS(ON)@Tj=25°C : 390mΩ

-60

-20

100

140

180

VGS, Gate-Source Voltage(V)

Tj, Junction Temperature(°C)

Threshold Voltage vs Junction Tempearture

Capacitance vs Drain-to-Source Voltage

1.6

1000

100

ID=1mA

1.4

1.2

Ciss

Coss

0.8

0.6

0.4

Crss

-60 -40 -20

20 40 60 80 100 120 140 160

10 15 20 25 30 35 40 45 50

VDS, Drain-Source Voltage(V)

Tj, Junction Temperature(°C)

Forward Transfer Admittance vs Drain Current

Gate Charge Characteristics

0.1

VDS=50V

VDS=10V

Pulsed

ID=1A

TA=25°C

0.01

0.5

1.5

2.5

0.001

0.01

0.1

ID, Drain Current(A)

Qg, Total Gate Charge(nC)

MTBC7N10K3

CYStek Product Specification

Spec. No. : C886K3

Issued Date : 2018.06.13

Revised Date :

CYStech Electronics Corp.

Page No. : 6/10

Typical Characteristics(Cont.)

Maximum Safe Operating Area

Maximum Drain Current vs JunctionTemperature

1.2

RDS(ON)

Limited

100μs

0.8

0.6

0.4

0.2

1ms

0.1

10ms

100ms

TA=25°C, Tj=150°C,

VGS=10V, RθJA=125°C/W

Single Pulse

0.01

0.001

TA=25°C, VGS=10V

0.1

100

1000

100

125

Tj, Junction Temperature(°C)

150

175

VDS, Drain-Source Voltage(V)

Single Pulse Maximum Power Dissipation

Power Derating Curve

1.2

TJ(MAX)=150°C

TA=25°C

0.8

0.6

0.4

0.2

RθJA=125°C/W

100

150

200

0.0001

0.001

0.01

0.1

TA, Ambient Temperature(℃)

Pulse Width(s)

MTBC7N10K3

CYStek Product Specification

Spec. No. : C886K3

Issued Date : 2018.06.13

Revised Date :

CYStech Electronics Corp.

Page No. : 7/10

Typical Characteristics(Cont.)

Transient Thermal Response Curves

D=0.5

0.2

1.RθJA(t)=r(t)*RθJA

2.Duty Factor, D=t1/t2

3.TJM-TC=PDM*ZθJC(t)

4.RθJA=125°C/W

0.1

0.05

0.02

0.01

Single Pulse

0.01

1.E-04

1.E-03

1.E-02

1.E-01

1.E+00

1.E+01

t1, Square Wave Pulse Duration(s)

MTBC7N10K3

CYStek Product Specification

Spec. No. : C886K3

Issued Date : 2018.06.13

Revised Date :

CYStech Electronics Corp.

Page No. : 8/10

TO-92L Taping Outline

Millimeters

DIM

Item

Min.

Max.

5.10

8.20

4.10

0.55

0.80

13.00

12.90

6.65

2.80

1.00

19.00

6.50

9.50

1.00

21.00

16.50

F1, F2

△h

Component body width

Component body height

Component body thickness

Lead wire diameter

Lead wire diameter 1

Pitch of component

Feed hole pitch

Hole center to component center

Lead to lead distance

Component alignment, F-R

Tape width

Hole down tape width

Hole position

Hole down tape position

Height of component from tape center

Lead wire clinch height

Lead wire (tape portion)

Feed hole diameter

Taped lead thickness

Carrier tape thickness

Position of hole

4.70

7.80

3.70

0.35

0.60

12.40

12.50

6.05

2.20

-1.00

17.50

5.50

8.50

19.00

15.50

2.50

3.80

0.35

0.15

3.55

-1.00

4.20

0.45

0.25

4.15

1.00

△P

Component alignment

MTBC7N10K3

CYStek Product Specification

Spec. No. : C886K3

Issued Date : 2018.06.13

Revised Date :

CYStech Electronics Corp.

Page No. : 9/10

Recommended wave soldering condition

Product

Peak Temperature

Soldering Time

5 +1/-1 seconds

Pb-free devices

260 +0/-5 C

Recommended temperature profile for IR reflow

Profile feature

Average ramp-up rate

(Tsmax to Tp)

Sn-Pb eutectic Assembly

Pb-free Assembly

3C/second max.

Preheat

−Temperature Min(TS min)

−Temperature Max(TS max)

−Time(ts min to ts max)

100C

150C

60-120 seconds

150C

200C

60-180 seconds

Time maintained above:

−Temperature (TL)

− Time (tL)

183C

60-150 seconds

217C

60-150 seconds

Peak Temperature(TP)

240 +0/-5 C

260 +0/-5 C

Time within 5C of actual peak

temperature(tp)

10-30 seconds

20-40 seconds

Ramp down rate

6C/second max.

6 minutes max.

8 minutes max.

Time 25 C to peak temperature

Note : All temperatures refer to topside of the package, measured on the package body surface.

MTBC7N10K3

CYStek Product Specification

Spec. No. : C886K3

Issued Date : 2018.06.13

Revised Date :

CYStech Electronics Corp.

Page No. : 10/10

TO-92L Dimension

Marking:

Product Name

BC7

N10

Date Code: Year+Month+Lot No.

Year: 7→2017, 8→2018, etc.

Month: A→1, B→2, C→3, D→4,

E→5, F→6, G→7, H→8, J→9,

K→10, L→11, M→12

□□□□

Lot No. : Serial number : 01~99

1 2 3

Style: Pin 1.Source 2.Drain 3.Gate

3-Lead TO-92L Plastic Package

CYStek Package Code: K3

*: Typical

Millimeters

Inches

Millimeters

Min.

Inches

*0.05

DIM

Min.

DIM

Max.

4.100

1.580

0.550

0.800

0.450

5.100

Min.

0.307

Max.

0.323

Min.

Max.

0.146

0.050

0.014

0.024

0.014

0.185

0.157

0.161

0.062

0.022

0.031

0.018

0.201

3.700

1.280

0.350

0.600

0.350

4.700

4.000



7.800

8.200

*1.270

0.096

0.543

0.104

0.559

0.063

0.012

2.440

13.800

2.640

14.200

1.600

0.300

0.000

Notes: 1.Controlling dimension: millimeters.

2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material.

3.If there is any question with packing specification or packing method, please contact your local CYStek sales office.

Material:

 Lead: Pure tin plated.

 Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0.

Important Notice:

 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek.

 CYStek reserves the right to make changes to its products without notice.

 CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems.

 CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance.

MTBC7N10K3

CYStek Product Specification

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