MTE040N20P3-0-UE-S [CYSTEKEC]

N-Channel Enhancement Mode Power MOSFET;


型号：	MTE040N20P3-0-UE-S
厂家：	CYSTECH ELECTONICS CORP.
描述：	N-Channel Enhancement Mode Power MOSFET
文件：	总8页 (文件大小：566K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

Spec. No. : C872P3

Issued Date : 2014.08.13

Revised Date :

CYStech Electronics Corp.

Page No. : 1/8

N-Channel Enhancement Mode Power MOSFET

BVDSS

200V

50A

30.2mΩ(typ)

29.3mΩ(typ)

MTE040N20P3

RDS(ON)@VGS=10V, ID=28A

RDS(ON)@VGS=6V, ID=10A

Features

 Low Gate Charge

 Simple Drive Requirement

 Pb-free lead plating package

Equivalent Circuit

Outline

MTE040N20P3

TO-247

G：Gate D：Drain

S：Source

Ordering Information

Device

Package

Shipping

TO-247

(Pb-free lead plating package)

30 pcs / tube, 10 tubes/ box ,

10 boxes/carton

MTE040N20P3-0-UE-S

Environment friendly grade : S for RoHS compliant products, G for RoHS

compliant and green compound products

Packing spec, UE : 30 pcs / tube, 10 tubes/box, 10 boxes/carton

Product rank, zero for no rank products

Product name

MTE040N20P3

CYStek Product Specification

Spec. No. : C872P3

Issued Date : 2014.08.13

Revised Date :

CYStech Electronics Corp.

Page No. : 2/8

Absolute Maximum Ratings (TC=25C, unless otherwise noted)

Parameter

Symbol

Limits

Unit

Drain-Source Voltage

Gate-Source Voltage

VDS

VGS

200

±20

200

196

300

Continuous Drain Current @ TC=25C

Continuous Drain Current @ TC=100C

Pulsed Drain Current *1

IDM

IAS

EAS

EAR

Avalanche Current

Avalanche Energy @ L=2mH, IAS=14A, RG=25Ω

Repetitive Avalanche Energy @ L=0.05mH *2

Total Power Dissipation @TC=25℃

Total Power Dissipation @TC=100℃

Operating Junction and Storage Temperature Range

150

-55~+175

Tj, Tstg

C

Note : *1 Pulse width limited by maximum junction temperature

*2. Duty cycle ≤ 1%

Thermal Data

Parameter

Thermal Resistance, Junction-to-case, max

Thermal Resistance, Junction-to-ambient, max

Symbol

Rth,j-c

Rth,j-a

Value

0.5

Unit

C/W

Characteristics (Tc=25C, unless otherwise specified)

Symbol

Min.

Typ.

Max.

Unit

Test Conditions

Static

BV_DSS

V_GS(th)

I_GSS

200

2.0

4.0

V_GS=0V, I_D=250μA

V_DS=V_GS, I_D=250μA

100

V_GS= 20V, V_DS=0V

V_DS=200V, V_GS=0V

V_DS=160V, V_GS=0V, T_J=125C

V_GS=10V, I_D=28A

V_GS=6V, I_D=10A

V_DS=15V, I_D=28A

I_DSS

μA

30.2

29.3

R_{DS(ON) *1}

G_FS

Dynamic

Qgs

Qgd

t_{d(ON) *1, 2}

98.5

14.3

38.4

*1, 2

I_D=28A, V_DS=160V, V_GS=10V

V_DS=100V, I_D=28A, V_GS=10V,

*1, 2

R_G=1.8

t_{d(OFF) *1, 2}

t_f

*1, 2

MTE040N20P3

CYStek Product Specification

Spec. No. : C872P3

Issued Date : 2014.08.13

Revised Date :

CYStech Electronics Corp.

Page No. : 3/8

Ciss

Coss

Crss

4467

392

341

0.6

V_GS=0V, V_DS=25V, f=1MHz

f=1MHz

Source-Drain Diode

I_S

200

1.2

I_{SM *3}

V_{SD *1}

trr

0.81

300

I_S=28A, V_GS=0V

I_F=28A, dI_F/dt=100A/μs

Qrr

Note : *1.Pulse Test : Pulse Width 300μs, Duty Cycle2%

*2.Independent of operating temperature

*3.Pulse width limited by maximum junction temperature.

MTE040N20P3

CYStek Product Specification

Spec. No. : C872P3

Issued Date : 2014.08.13

Revised Date :

CYStech Electronics Corp.

Page No. : 4/8

Typical Characteristics

Brekdown Voltage vs Ambient Temperature

Typical Output Characteristics

1.4

1.2

150

120

10V

VGS=5V

0.8

0.6

0.4

VGS=4.5V

ID=250μA,

VGS=0V

VGS=4V

-75 -50 -25

0 25 50 75 100 125 150 175

Tj, Junction Temperature(°C)

VDS, Drain-Source Voltage(V)

Static Drain-Source On-State resistance vs Drain Current

Reverse Drain Current vs Source-Drain Voltage

1000

100

1.2

VGS=0V

0.8

0.6

0.4

0.2

Tj=25°C

VGS=4.5V

VGS=6V

VGS=10V

Tj=150°C

0.01

0.1

100

ID, Drain Current(A)

IDR, Reverse Drain Current(A)

Drain-Source On-State Resistance vs Junction Tempearture

Static Drain-Source On-State Resistance vs Gate-Source

Voltage

200

160

120

2.8

ID=28A

2.4

VGS=10V, ID=28A

1.6

1.2

0.8

0.4

RDS(ON)@Tj=25°C : 30.2mΩ

-75 -50 -25 0 25 50 75 100 125 150 175

Tj, Junction Temperature(°C)

VGS, Gate-Source Voltage(V)

MTE040N20P3

CYStek Product Specification

Spec. No. : C872P3

Issued Date : 2014.08.13

Revised Date :

CYStech Electronics Corp.

Page No. : 5/8

Typical Characteristics (Cont.)

Threshold Voltage vs Junction Tempearture

Capacitance vs Drain-to-Source Voltage

1.4

1.2

10000

Ciss

ID=250μA

1000

Coss

0.8

0.6

0.4

Crss

100

-75 -50 -25

25 50 75 100 125 150 175

0.1

100

VDS, Drain-Source Voltage(V)

Tj, Junction Temperature(°C)

Forward Transfer Admittance vs Drain Current

Gate Charge Characteristics

100

VDS=100V

VDS=40V

VDS=160V

VDS=10V

0.1

0.01

Ta=25°C

Pulsed

ID=28A

100

0.001

0.01

0.1

100

ID, Drain Current(A)

Qg, Total Gate Charge(nC)

Maximum Drain Current vs Case Temperature

Maximum Safe Operating Area

1000

RDSON

100

10μs

Limited

100μs

1ms

10ms

TC=25°C, Tj=175°C

VGS=10V, θJC=0.5°C/W

Single Pulse

VGS=10V, RθJC=0.5°C/W

0.1

100

125

150 175

200

0.1

100

1000

VDS, Drain-Source Voltage(V)

TC, Case Temperature(°C)

MTE040N20P3

CYStek Product Specification

Spec. No. : C872P3

Issued Date : 2014.08.13

Revised Date :

CYStech Electronics Corp.

Page No. : 6/8

Typical Characteristics (Cont.)

Power Derating Curve

Typical Transfer Characteristics

350

300

250

200

150

100

150

120

VDS=10V

75 100 125 150 175 200

TC, Case Temperature(℃)

VGS, Gate-Source Voltage(V)

Transient Thermal Response Curves

D=0.5

0.2

1.RθJC(t)=r(t)*RθJC

2.Duty Factor, D=t1/t2

3.TJM-TC=PDM*RθJC(t)

4.RθJC=0.5°C/W

0.1

0.05

0.02

0.01

Single Pulse

0.01

0.00001

0.0001

0.001

0.01

0.1

t1, Square Wave Pulse Duration(s)

MTE040N20P3

CYStek Product Specification

Spec. No. : C872P3

Issued Date : 2014.08.13

Revised Date :

CYStech Electronics Corp.

Page No. : 7/8

Recommended wave soldering condition

Product

Peak Temperature

Soldering Time

5 +1/-1 seconds

Pb-free devices

260 +0/-5 C

Recommended temperature profile for IR reflow

Pb-free Assembly

Profile feature

Average ramp-up rate

(Tsmax to Tp)

Sn-Pb eutectic Assembly

3C/second max.

Preheat

−Temperature Min(TS min)

−Temperature Max(TS max)

−Time(ts min to ts max)

Time maintained above:

−Temperature (TL)

100C

150C

200C

60-120 seconds

60-180 seconds

183C

60-150 seconds

217C

60-150 seconds

− Time (tL)

Peak Temperature(TP)

Time within 5C of actual peak

temperature(tp)

240 +0/-5 C

260 +0/-5 C

10-30 seconds

20-40 seconds

Ramp down rate

6C/second max.

6 minutes max.

8 minutes max.

Time 25 C to peak temperature

Note : All temperatures refer to topside of the package, measured on the package body surface.

MTE040N20P3

CYStek Product Specification

Spec. No. : C872P3

Issued Date : 2014.08.13

Revised Date :

CYStech Electronics Corp.

Page No. : 8/8

TO-247 Dimension

Marking:

E040N20

□□□□

Device Name

Date Code

Style: Pin 1.Gate 2.Drain 3.Source

3-Lead TO-247 Plastic Package

CYStek Package Code: P3

Inches

DIM

Millimeters

Inches

Min. Max.

0.142 REF

Millimeters

Min. Max.

3.600 REF

40.900 41.300

24.800 25.100

20.300 20.600

DIM

Min.

Max.

Min.

Max.

5.150

2.600

1.400

3.200

2.200

0.700

2.100

0.191

0.087

0.039

0.110

0.071

0.020

0.075

0.608

0.200

0.102

0.055

0.126

0.087

0.028

0.083

0.620

4.850

2.200

1.000

2.800

1.800

0.500

1.900

1.610

1.626

0.988

0.811

0.287

0.976

0.799

0.280

7.100

5.450 REF

5.980 REF

0.000 0.300

7.300

0.215 REF

0.235 REF

0.000 0.012

15.450 15.750

3.500 REF

0.138 REF

Notes: 1.Controlling dimension: millimeters.

2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material.

3.If there is any question with packing specification or packing method, please contact your local CYStek sales office.

Material:

 Lead: Pure tin plated.

 Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0.

Important Notice:

 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek.

 CYStek reserves the right to make changes to its products without notice.

 CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems.

 CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance.

MTE040N20P3

CYStek Product Specification

相关型号：