MTE2D0N04F7T [CYSTEKEC]

N-Channel Enhancement Mode Power MOSFET;


型号：	MTE2D0N04F7T
厂家：	CYSTECH ELECTONICS CORP.
描述：	N-Channel Enhancement Mode Power MOSFET
文件：	总9页 (文件大小：569K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

Spec. No. : C072F7T

Issued Date : 2017.01.03

Revised Date :

CYStech Electronics Corp.

Page No. : 1/9

N-Channel Enhancement Mode Power MOSFET

MTE2D0N04F7T

BVDSS

40V

ID @VGS=10V, TC=25°C

RDSON(TYP) @ VGS=10V, ID=20A

196A

1.7mΩ

Features

• Simple Drive Requirement

• Fast Switching Characteristic

• RoHS compliant package

Symbol

Outline

MTE2D0N04F7T

TO-263-7L-4C

G：Gate D：Drain S：Source

Ordering Information

Device

Package

Shipping

800 pcs / Tape & Reel

TO-263-7L-4C

(Pb-free lead plating and RoHS compliant package)

MTE2D0N04F3-0-T7-X

Environment friendly grade : S for RoHS compliant products, G for RoHS compliant

and green compound products

Packing spec, T7 : 800 pcs / tape & reel, 13” reel

Product rank, zero for no rank products

Product name

MTE2D0N04F7T

CYStek Product Specification

Spec. No. : C072F7T

Issued Date : 2017.01.03

Revised Date :

CYStech Electronics Corp.

Page No. : 2/9

Absolute Maximum Ratings (TC=25°C, unless otherwise noted)

Parameter

Symbol

Limits

Unit

Drain-Source Voltage

Gate-Source Voltage

VDS

VGS

±30

208

147

196

784

24.6

19.7

1250

166

1.3

Continuous Drain Current @ TC=25°C(silicon limit)

Continuous Drain Current @ TC=100°C(silicon limit)

Continuous Drain Current @ TC=25°C(package limit) (Note 1)

Pulsed Drain Current

(Note 3)

(Note 2)

(Note 3)

(Note 4)

(Note 1)

(Note 2)

IDM

Continuous Drain Current @ TA=25°C

Continuous Drain Current @ TA=70°C

Avalanche Current @L=0.1mH

IDSM

IAS

EAS

Avalanche Energy @ L=1mH, ID=50A, VDD=40V

TC=25°C

TC=100°C

Power Dissipation

TA=25°C

Power Dissipation

PDSM

TA=70°C

Operating Junction and Storage Temperature

Tj, Tstg

-55~+175

°C

Thermal Data

Parameter

Thermal Resistance, Junction-to-case, max

Thermal Resistance, Junction-to-ambient, max, (Note 2)

Symbol

RθJC

RθJA

Value

0.9

62.5

Unit

°C/W

Note : 1 The power dissipation P_Dis based on T_J(MAX)=175 C, using junction-to-case thermal resistance, and is more useful

in setting the upper dissipation limit for cases where additional heatsinking is used.

2 The value of R_θJAis measured with the device mounted on 1 in²FR-4 board with 2 oz. copper, in a still air environment

with T_A=25 C. The power dissipation P_DSMis based on R_θJAand the maximum allowed junction

temperature of 150°C. The value in any given application depends on the user’s specific board design, and the

maximum temperature of 175°C may be used if the PCB allows it.

3 Pulse width limited by junction temperature T_J(MAX)=175 C. Ratings are based on low frequency and low duty cycles

to keep initial TJ=25°C.

4. 100% tested by conditions of L=1mH, I^AS=20A, VGS=10V, VDD=30V.

5. The static characteristics are obtained using <300μs pulses, duty cycle 0.5% maximum.

6. The R^θJAis the sum of thermal resistance from junction to case RθJC and case to ambient.

MTE2D0N04F7T

CYStek Product Specification

Spec. No. : C072F7T

Issued Date : 2017.01.03

Revised Date :

CYStech Electronics Corp.

Page No. : 3/9

Characteristics (TC=25°C, unless otherwise specified)

Symbol

Static

Min.

Typ.

Max.

Unit

Test Conditions

BV_DSS

V_GS(th)

G_FS

2.0

4.0

V_GS=0V, I_D=250μA

V_DS= V_GS, I_D=250μA

V_DS=10V, I_D=20A

33.8

1.7

100

I_GSS

V_GS= 30V

V_DS=32V, V_GS=0V

V_DS=32V, V_GS=0V, Tj=125°C

V_GS=10V, I_D=20A

I_DSS

μA

2.3

*R_DS(ON)

Dynamic

*Qg

113

27.5

29.4

40.6

84.2

19.6

5831

751

345

0.9

I_D=20A, V_DS=20V, V_GS=10V

*Qgs

*Qgd

*t_d(ON)

*tr

*t_d(OFF)

*t_f

Ciss

Coss

Crss

V_DS=20V, I_D=20A, V_GS=10V, R_G=1

V_GS=0V, V_DS=30V, f=1MHz

f=1MHz

Source-Drain Diode

*I_S

*I_SM

*V_SD

*trr

196

784

0.68

38.2

41.1

I_S=1A, V_GS=0V

I_F=1A, V_GS=0V, dI_F/dt=100A/μs

*Qrr

*Pulse Test : Pulse Width ≤300μs, Duty Cycle≤2%

MTE2D0N04F7T

CYStek Product Specification

Spec. No. : C072F7T

Issued Date : 2017.01.03

Revised Date :

CYStech Electronics Corp.

Page No. : 4/9

Typical Characteristics

Brekdown Voltage vs Ambient Temperature

Typical Output Characteristics

1.4

1.2

300

250

5.5V

200

10V, 9V, 8V, 7V, 6V

150

100

0.8

0.6

0.4

V_GS=4.5V

I =250 A,

_GS=0V

-75 -50 -25

0 25 50 75 100 125 150 175 200

Tj, Junction Temperature(°C)

V_DS, Drain-Source Voltage(V)

Static Drain-Source On-State resistance vs Drain Current

Reverse Drain Current vs Source-Drain Voltage

1.2

0.8

0.6

0.4

0.2

Tj=25°C

V_GS=7V

Tj=150°C

V_GS=10V

0.1

1 10

I_D, Drain Current(A)

100

I_DR, Reverse Drain Current(A)

Drain-Source On-State Resistance vs Junction Tempearture

Static Drain-Source On-State Resistance vs Gate-Source

Voltage

2.4

V_GS=10V, I_D=20A

1.6

1.2

0.8

0.4

I_D=20A

R_DS(ON)@Tj=25°C :1.7mΩ typ.

-75 -50 -25

25 50 75 100 125 150 175 200

V_GS, Gate-Source Voltage(V)

Tj, Junction Temperature(°C)

MTE2D0N04F7T

CYStek Product Specification

Spec. No. : C072F7T

Issued Date : 2017.01.03

Revised Date :

CYStech Electronics Corp.

Page No. : 5/9

Typical Characteristics(Cont.)

Threshold Voltage vs Junction Tempearture

Capacitance vs Drain-to-Source Voltage

10000

1.4

1.2

Ciss

I_D=1mA

oss

0.8

0.6

0.4

0.2

1000

I_D=250μA

Crss

100

-75 -50 -25

25 50 75 100 125 150 175 200

V_DS, Drain-Source Voltage(V)

Tj, Junction Temperature(°C)

Gate Charge Characteristics

V_DS=20V

Forward Transfer Admittance vs Drain Current

100

V_DS=32V

V_DS=10V

Pulsed

0.1

0.01

Ta=25°C

I_D=20A

100

120

140

0.001

0.01

0.1

100

I_D, Drain Current(A)

Total Gate Charge---Qg(nC)

Maximum Drain Current vs Case Temperature

Silicon Limit

Maximum Safe Operating Area

250

200

150

100

1000

10 s

R_DS(ON)

Limited

100 s

100

1ms

10ms

Package Limit

100ms

T_C=25°C, Tj=175°C,

V_GS=10V, R =0.9°C/W

V_GS=10V, Rθ =0.9°C/W

Single Pulse

0.1

100 125 150 175 200

0.1

100

_DS, Drain-Source Voltage(V)

T_C, Case Temperature(°C)

MTE2D0N04F7T

CYStek Product Specification

Spec. No. : C072F7T

Issued Date : 2017.01.03

Revised Date :

CYStech Electronics Corp.

Page No. : 6/9

Typical Characteristics(Cont.)

Typical Transfer Characteristics

Single Pulse Maximum Power Dissipation

300

250

200

150

100

3000

2500

2000

1500

1000

500

V_DS=10V

T_J(MAX)=175°C

T_C=25°C

_JC=0.9°C/W

1E-05 0.0001 0.001 0.01

0.1

V_GS, Gate-Source Voltage(V)

Pulse Width(s)

Transient Thermal Response Curves

D=0.5

0.2

0.1

1.Rθ (t)=r(t)*Rθ

0.1

2.Duty Factor, D=t /t

3.T -T =P *Rθ (t)

0.05

0.02

0.01

4.Rθ =0.9 °C/W

0.01

Single Pulse

0.001

0.00001

0.0001

0.001

0.01

0.1

t₁, Square Wave Pulse Duration(s)

MTE2D0N04F7T

CYStek Product Specification

Spec. No. : C072F7T

Issued Date : 2017.01.03

Revised Date :

CYStech Electronics Corp.

Page No. : 7/9

Reel Dimension

Carrier Tape Dimension

MTE2D0N04F7T

CYStek Product Specification

Spec. No. : C072F7T

Issued Date : 2017.01.03

Revised Date :

CYStech Electronics Corp.

Page No. : 8/9

Recommended wave soldering condition

Product

Peak Temperature

Soldering Time

5 +1/-1 seconds

Pb-free devices

260 +0/-5 °C

Recommended temperature profile for IR reflow

Profile feature

Average ramp-up rate

(Tsmax to Tp)

Sn-Pb eutectic Assembly

Pb-free Assembly

3°C/second max.

Preheat

−Temperature Min(T^Smin)

−Temperature Max(TS max)

−Time(ts min to ts max)

Time maintained above:

−Temperature (TL)

− Time (tL)

100°C

150°C

200°C

60-120 seconds

60-180 seconds

183°C

60-150 seconds

240 +0/-5 °C

217°C

60-150 seconds

260 +0/-5 °C

Peak Temperature(TP)

Time within 5°C of actual peak

temperature(tp)

10-30 seconds

20-40 seconds

Ramp down rate

6°C/second max.

6 minutes max.

8 minutes max.

Time 25 °C to peak temperature

Note : All temperatures refer to topside of the package, measured on the package body surface.

MTE2D0N04F7T

CYStek Product Specification

Spec. No. : C072F7T

Issued Date : 2017.01.03

Revised Date :

CYStech Electronics Corp.

Page No. : 9/9

TO-263-7L-4C Dimension

Marking :

CYS

Device Name

Date Code

E2D0N04

□□□□

Style : Pin 1. Gate

Pin 2, 3, 5, 6, 7 : Source

Pin 4.

Drain

7-Lead Plastic Surface Mounted TO-263-7L Package

CYStek Package Code : F7T

Date Code : (From left to right)

First Code : Year code, the last digit of Christinr year. For example, 2014→4, 2015→, 2016→6, …, etc.

Second Code : Month code, Jan→A, Feb→B, Mar→C, Apr→D, May→E, Jun→F, Jul→G, Aug→H, Sep→J,

Oct→K, Nov→L, Dec→M

Third and fourth codes : production serial number, 01~99

*:Typical

Millimeters

Inches

Min.

Millimeters

Min.

Inches

DIM

Max.

0.1791

0.0551

0.1004

0.0098

0.0276

0.0331

0.0236

0.3720

Max.

4.55

1.40

2.55

0.25

0.70

0.84

0.60

9.45

Min.

Max.

Min.

9.80

Max.

10.20

0.1673

0.0472

0.0886

0.0004

0.0197

0.0228

0.0157

0.3563

0.2717

4.25

1.20

2.25

0.01

0.50

0.58

0.40

9.05

6.90

0.3858

0.4016

0.0500 BSC

1.27 BSC

0.2854

0.5768

0.0315

0.0945

0.0335

7.25

14.65

0.80

2.40

0.85

0.6043

0.0472

0.1181

0.0453

15.35

1.20

3.00

1.15

0.0098 BSC

0.25 BSC

2°

8°

2°

8°

Notes : 1.Controlling dimension : millimeters.

2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material.

3.If there is any question with packing specification or packing method, please contact your local CYStek sales office.

Material :

• Lead : Pure tin plated.

• Mold Compound : Epoxy resin family, flammability solid burning class:UL94V-0.

Important Notice:

• All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek.

• CYStek reserves the right to make changes to its products without notice.

• CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems.

• CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance.

MTE2D0N04F7T

CYStek Product Specification

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