DS1230Y-120 [DALLAS]
256k Nonvolatile SRAM; 256K非易失SRAM
| 型号： | DS1230Y-120 |
| 厂家： | 
DALLAS SEMICONDUCTOR |
| 描述： | 256k Nonvolatile SRAM |
| 文件： | 总12页 (文件大小：215K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DS1230Y/AB
256k Nonvolatile SRAM
www.dalsemi.com
FEATURES
PIN ASSIGNMENT
ꢀ 10 years minimum data retention in the
absence of external power
A14
A12
A7
1
28
27
VCC
WE
A13
A8
2
3
4
26
25
ꢀ Data is automatically protected during power
loss
ꢀ Replaces 32k x 8 volatile static RAM,
EEPROM or Flash memory
ꢀ Unlimited write cycles
ꢀ Low-power CMOS
A6
A5
A4
5
6
24
23
A9
A11
OE
A10
CE
A3
A2
7
8
22
21
A1
9
20
19
10
A0
DQ7
DQ6
DQ5
ꢀ Read and write access times as fast as 70 ns
ꢀ Lithium energy source is electrically
disconnected to retain freshness until power is
applied for the first time
11
12
18
17
DQ0
DQ1
DQ2
GND
13
14
16
15
DQ4
DQ3
ꢀ Full ±10% VCC operating range (DS1230Y)
ꢀ Optional ±5% VCC operating range
(DS1230AB)
28-Pin ENCAPSULATED PACKAGE
740-mil EXTENDED
ꢀ Optional industrial temperature range of
-40°C to +85°C, designated IND
ꢀ JEDEC standard 28-pin DIP package
ꢀ New PowerCap Module (PCM) package
NC
NC
A14
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
NC
NC
NC
NC
VCC
A13
A12
A11
A10
A9
WE
OE
CE
-
-
Directly surface-mountable module
Replaceable snap-on PowerCap provides
lithium backup battery
A8
DQ7
DQ6
DQ5
DQ4
DQ3
A7
A6
A5
A4
A3
A2
A1
A0
-
-
Standardized pinout for all nonvolatile
SRAM products
Detachment feature on PowerCap allows
easy removal using a regular screwdriver
GND VBAT
DQ2
DQ1
DQ0
GND
34-Pin POWERCAP MODULE (PCM)
(USES DS9034PC POWERCAP)
PIN DESCRIPTION
A0 - A14
DQ0 - DQ7
CE
- Address Inputs
- Data In/Data Out
- Chip Enable
- Write Enable
- Output Enable
- Power (+5V)
- Ground
WE
OE
VCC
GND
NC
- No Connect
1 of 12
111899
DS1230Y/AB
DESCRIPTION
The DS1230 256k Nonvolatile SRAMs are 262,144-bit, fully static, nonvolatile SRAMs organized as
32,768 words by 8 bits. Each NV SRAM has a self-contained lithium energy source and control circuitry
which constantly monitors VCC for an out-of-tolerance condition. When such a condition occurs, the
lithium energy source is automatically switched on and write protection is unconditionally enabled to
prevent data corruption. DIP-package DS1230 devices can be used in place of existing 32k x 8 static
RAMs directly conforming to the popular bytewide 28-pin DIP standard. The DIP devices also match the
pinout of 28256 EEPROMs, allowing direct substitution while enhancing performance. DS1230 devices
in the Low Profile Module package are specifically designed for surface-mount applications. There is no
limit on the number of write cycles that can be executed and no additional support circuitry is required for
microprocessor interfacing.
READ MODE
The DS1230 devices execute a read cycle whenever WE (Write Enable) is inactive (high) and CE (Chip
Enable) and OE (Output Enable) are active (low). The unique address specified by the 15 address inputs
(A0 - A14) defines which of the 32,768 bytes of data is to be accessed. Valid data will be available to the
eight data output drivers within tACC (Access Time) after the last address input signal is stable, providing
that CE and OE (Output Enable) access times are also satisfied. If OE and CE access times are not
satisfied, then data access must be measured from the later-occurring signal (CE or OE ) and the limiting
parameter is either tCO for CE or tOE for OE rather than address access.
WRITE MODE
The DS1230 devices execute a write cycle whenever the WE and CE signals are active (low) after
address inputs are stable. The later-occurring falling edge of CE or WE will determine the start of the
write cycle. The write cycle is terminated by the earlier rising edge of CE or WE . All address inputs must
be kept valid throughout the write cycle. WE must return to the high state for a minimum recovery time
(tWR) before another cycle can be initiated. The OE control signal should be kept inactive (high) during
write cycles to avoid bus contention. However, if the output drivers are enabled (CE and OE active) then
WE will disable the outputs in tODW from its falling edge.
DATA RETENTION MODE
The DS1230AB provides full functional capability for VCC greater than 4.75 volts and write protects by
4.5 volts. The DS1230Y provides full functional capability for VCC greater than 4.5 volts and write
protects by 4.25 volts. Data is maintained in the absence of VCC without any additional support circuitry.
The nonvolatile static RAMs constantly monitor VCC. Should the supply voltage decay, the NV SRAMs
automatically write protect themselves, all inputs become “don’t care,” and all outputs become high-
impedance. As VCC falls below approximately 3.0 volts, a power switching circuit connects the lithium
energy source to RAM to retain data. During power-up, when VCC rises above approximately 3.0 volts
the power switching circuit connects external VCC to RAM and disconnects the lithium energy source.
Normal RAM operation can resume after VCC exceeds 4.75 volts for the DS1230AB and 4.5 volts for the
DS1230Y.
FRESHNESS SEAL
Each DS1230 device is shipped from Dallas Semiconductor with its lithium energy source disconnected,
guaranteeing full energy capacity. When VCC is first applied at a level greater than 4.25 volts, the lithium
energy source is enabled for battery back-up operation.
2 of 12
DS1230Y/AB
PACKAGES
The DS1230 devices are available in two packages: 28-pin DIP and 34-pin PowerCap Module (PCM).
The 28-pin DIP integrates a lithium battery, an SRAM memory and a nonvolatile control function into a
single package with a JEDEC-standard, 600-mil DIP pinout. The 34-pin PowerCap Module integrates
SRAM memory and nonvolatile control along with contacts for connection to the lithium battery in the
DS9034PC PowerCap. The PowerCap Module package design allows a DS1230 PCM device to be
surface mounted without subjecting its lithium backup battery to destructive high-temperature reflow
soldering. After a DS1230 PCM is reflow soldered, a DS9034PC PowerCap is snapped on top of the
PCM to form a complete Nonvolatile SRAM module. The DS9034PC is keyed to prevent improper
attachment. DS1230 PowerCap Modules and DS9034PC PowerCaps are ordered separately and shipped
in separate containers. See the DS9034PC data sheet for further information.
ABSOLUTE MAXIMUM RATINGS*
Voltage on Any Pin Relative to Ground
Operating Temperature
-0.3V to +7.0V
0°C to 70°C, -40°C to +85°C for IND parts
-40°C to +70°C, -40°C to +85°C for IND parts
260°C for 10 seconds
Storage Temperature
Soldering Temperature
* This is a stress rating only and functional operation of the device at these or any other conditions
above those indicated in the operation sections of this specification is not implied. Exposure to
absolute maximum rating conditions for extended periods of time may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
(tA: See Note 10)
PARAMETER
SYMBOL MIN
TYP
5.0
MAX
5.25
5.5
UNITS NOTES
DS1230AB Power Supply Voltage
DS1230Y Power Supply Voltage
Logic 1
VCC
VCC
VIH
VIL
4.75
4.5
2.2
0.0
V
V
V
V
5.0
VCC
0.8
Logic 0
DC ELECTRICAL
CHARACTERISTICS
PARAMETER
(VCC=5V ±=5% for DS1230AB)
(tA: See Note 10) (VCC=5V ±=10% for DS1230Y)
SYMBOL MIN
TYP
MAX
UNITS NOTES
Input Leakage Current
IIL
IIO
-1.0
-1.0
-1.0
2.0
+1.0
µA
µA
mA
mA
mA
mA
mA
V
+1.0
I/O Leakage Current CE ≥ VIH ≤ VCC
Output Current @ 2.4V
IOH
Output Current @ 0.4V
IOL
ICCS1
ICCS2
ICCO1
VTP
VTP
5.0
3.0
10.0
5.0
Standby Current CE =2.2V
Standby Current CE =VCC-0.5V
Operating Current
85
Write Protection Voltage (DS1230AB)
Write Protection Voltage (DS1230Y)
4.50
4.25
4.62
4.37
4.75
4.5
V
3 of 12
DS1230Y/AB
CAPACITANCE
PARAMETER
(tA=25°C)
UNITS NOTES
SYMBOL MIN
TYP
MAX
10
Input Capacitance
CIN
5
5
pF
pF
Input/Output Capacitance
CI/O
10
AC ELECTRICAL
(VCC=5V ±=5% for DS1230AB)
CHARACTERISTICS
(tA: See Note 10) (VCC=5V ±=10% for DS1230Y)
DS1230AB-70 DS1230AB-85 DS1230AB-100
DS1230Y-70
DS1230Y-85
DS1230Y-100
PARAMETER SYMBOL
UNITS NOTES
MIN MAX MIN MAX MIN
MAX
Read Cycle
Time
tRC
70
85
100
ns
Access Time
tACC
tOE
70
35
85
45
100
50
ns
ns
OE to Output
Valid
tCO
tCOE
tOD
70
85
100
ns
CE to Output
Valid
5
5
5
5
5
5
ns
ns
5
5
OE or CE to
Output Active
Output High Z
from
Deselection
25
30
35
Output Hold
from Address
Change
tOH
ns
Write Cycle
Time
tWC
tWP
tAW
70
55
0
85
65
0
100
75
0
ns
ns
ns
ns
ns
ns
ns
ns
Write Pulse
Width
3
Address Setup
Time
Write Recovery
Time
tWR1
tWR2
5
15
5
15
5
15
12
13
Output High Z
from WE
tODW
tOEW
tDS
25
30
35
5
5
4
Output Active
from WE
5
5
5
Data Setup
Time
30
35
40
Data Hold
Time
tDH1
tDH2
0
10
0
10
0
10
12
13
4 of 12
DS1230Y/AB
AC ELECTRICAL CHARACTERISTICS (cont'd)
DS1230AB-120 DS1230AB-150 DS1230AB-200
DS1230Y-120 DS1230Y-150 DS1230Y-200
PARAMETER SYMBOL
UNITS NOTES
MIN
MAX
MIN
MAX
MIN
MAX
Read Cycle
Time
tRC
120
150
200
ns
Access Time
tACC
tOE
120
60
150
70
200
100
ns
ns
OE to Output
Valid
tCO
tCOE
tOD
120
150
200
ns
CE to Output
Valid
5
5
5
5
5
5
ns
ns
5
5
OE or CE to
Output Active
Output High Z
from
Deselection
35
35
35
Output Hold
from Address
Change
tOH
ns
Write Cycle
Time
tWC
tWP
tAW
120
90
0
150
100
0
200
100
0
ns
ns
ns
ns
ns
ns
ns
ns
Write Pulse
Width
3
Address Setup
Time
Write Recovery
Time
tWR1
tWR2
5
15
5
15
5
15
12
13
Output High Z
from WE
tODW
tOEW
tDS
35
35
35
5
5
4
Output Active
from WE
5
5
5
Data Setup
Time
50
60
80
Data Hold Time
tDH1
tDH2
0
10
0
10
0
10
12
13
5 of 12
DS1230Y/AB
READ CYCLE
SEE NOTE 1
WRITE CYCLE 1
SEE NOTES 2, 3, 4, 6, 7, 8, and 12
6 of 12
DS1230Y/AB
WRITE CYCLE 2
SEE NOTES 2, 3, 4, 6, 7, 8, and 13
POWER-DOWN/POWER-UP CONDITION
7 of 12
DS1230Y/AB
(tA: See Note 10)
UNITS NOTES
POWER-DOWN/POWER-UP TIMING
PARAMETER
SYMBOL MIN
TYP
MAX
CE, at VIH before Power-Down
tPD
tF
0
11
µs
µs
µs
ms
300
300
2
VCC slew from VTP to 0V (CE at VIH)
VCC slew from 0V to VTP (CE at VIH)
CE at VIH after Power-Up
tR
tREC
125
(tA=25°C)
PARAMETER
SYMBOL MIN
tDR 10
TYP
MAX
UNITS NOTES
Expected Data Retention Time
years
9
WARNING:
Under no circumstance are negative undershoots, of any amplitude, allowed when device is in battery
backup mode.
NOTES:
1. WE is high for a Read Cycle.
2. OE = VIH or VIL. If OE = VIH during write cycle, the output buffers remain in a high-impedance state.
3. tWP is specified as the logical AND of CE and WE . tWP is measured from the latter of CE or WE
going low to the earlier of CE or WE going high.
4. tDH, tDS are measured from the earlier of CE or WE going high.
5. These parameters are sampled with a 5 pF load and are not 100% tested.
6. If the CE low transition occurs simultaneously with or latter than the WE low transition, the output
buffers remain in a high-impedance state during this period.
7. If the CE high transition occurs prior to or simultaneously with the WE high transition, the output
buffers remain in high-impedance state during this period.
8. If WE is low or the WE low transition occurs prior to or simultaneously with the CE low transition,
the output buffers remain in a high-impedance state during this period.
9. Each DS1230Y has a built-in switch that disconnects the lithium source until VCC is first applied by
the user. The expected tDR is defined as accumulative time in the absence of VCC starting from the
time power is first applied by the user.
10. All AC and DC electrical characteristics are valid over the full operating temperature range. For
commercial products, this range is 0°C to 70°C. For industrial products (IND), this range is -40°C to
+85°C.
11. In a power-down condition the voltage on any pin may not exceed the voltage on VCC.
12. tWR1 and tDH1 are measured from WE going high.
13. tWR2 and tDH2 are measured from CE going high.
14. DS1230 DIP modules are recognized by Underwriters Laboratory (U.L. ) under file E99151.
DS1230 PowerCap modules are pending U.L. review. Contact the factory for status.
8 of 12
DS1230Y/AB
DC TEST CONDITIONS
Outputs Open
Cycle = 200 ns for operating current
All voltages are referenced to ground
AC TEST CONDITIONS
Output Load: 100 pF + 1TTL Gate
Input Pulse Levels: 0 - 3.0V
Timing Measurement Reference Levels
Input: 1.5V
Output: 1.5V
Input pulse Rise and Fall Times: 5 ns
ORDERING INFORMATION
DS1230 TTP - SSS - III
Operating Temperature Range
blank: 0° to 70°
IND: -40° to +85°C
Access Speed
70:
85:
70 ns
85 ns
100: 100 ns
120: 120 ns
150: 150 ns
200: 200 ns
Package Type
blank: 28-pin 600-mil DIP
P:
34-pin PowerCap Module
VCC Tolerance
AB: ±5%
Y: ±10%
DS1230Y/AB NONVOLATILE SRAM, 28-PIN 740-MIL EXTENDED DIP
MODULE
PKG
28-PIN
DIM
MIN
MAX
A IN.
MM
1.480
37.60
1.500
38.10
B IN.
MM
0.720
18.29
0.740
18.80
C IN.
MM
0.355
9.02
0.375
9.52
D IN.
MM
0.080
2.03
0.110
2.79
E IN.
MM
0.015
0.38
0.025
0.63
F IN.
MM
0.120
3.05
0.160
4.06
G IN.
MM
0.090
2.29
0.110
2.79
H IN.
MM
0.590
14.99
0.630
16.00
J IN.
MM
0.008
0.20
0.012
0.30
K IN.
MM
0.015
0.38
0.021
0.53
9 of 12
DS1230Y/AB
DS1230Y/AB NONVOLATILE SRAM, 34-PIN POWERCAP MODULE
INCHES
PKG
DIM
MIN
NOM
MAX
A
B
C
D
E
F
0.920
0.980
-
0.925
0.985
-
0.930
0.990
0.080
0.058
0.052
0.025
0.030
0.052
0.048
0.015
0.020
0.055
0.050
0.020
0.025
G
10 of 12
DS1230Y/AB
DS1230Y/AB NONVOLATILE SRAM, 34-PIN POWERCAP MODULE WITH
POWERCAP
INCHES
NOM
PKG
DIM
MIN
MAX
0.930
0.965
0.250
0.058
0.052
0.025
0.030
A
B
C
D
E
F
0.920
0.955
0.240
0.052
0.048
0.015
0.020
0.925
0.960
0.245
0.055
0.050
0.020
0.025
G
ASSEMBLY AND USE
Reflow soldering
Dallas Semiconductor recommends that PowerCap Module bases experience one pass through solder
reflow oriented label-side up (live-bug).
Hand soldering and touch-up
Do not touch soldering iron to leads for more than 3 seconds. To solder, apply flux to the pad, heat the
lead frame pad and apply solder. To remove part, apply flux, heat pad until solder reflows, and use a
solder wick.
LPM replacement in a socket
To replace a Low Profile Module in a 68-pin PLCC socket, attach a DS9034PC PowerCap to a module
base then insert the complete module into the socket one row of leads at a time, pushing only on the
corners of the cap. Never apply force to the center of the device. To remove from a socket, use a PLCC
extraction tool and ensure that it does not hit or damage any of the module IC components. Do not use
any other tool for extraction.
11 of 12
DS1230Y/AB
RECOMMENDED POWERCAP MODULE LAND PATTERN
INCHES
NOM
PKG
DIM
MIN
MAX
A
B
C
D
E
-
-
-
-
-
1.050
0.826
0.050
0.030
0.112
-
-
-
-
-
RECOMMENDED POWERCAP MODULE SOLDER STENCIL
INCHES
PKG
DIM
MIN
NOM
1.050
0.890
0.050
0.030
0.080
MAX
A
B
C
D
E
-
-
-
-
-
-
-
-
-
-
12 of 12
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