DS1284 [DALLAS]

Watchdog Timekeeper Chip; 看门狗时钟芯片
DS1284
型号: DS1284
厂家: DALLAS SEMICONDUCTOR    DALLAS SEMICONDUCTOR
描述:

Watchdog Timekeeper Chip
看门狗时钟芯片

外围集成电路 光电二极管 双倍数据速率 时钟
文件: 总3页 (文件大小:147K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
DS1284  
Watchdog Timekeeper Chip  
www.dalsemi.com  
FEATURES  
PIN ASSIGNMENT  
§ Keeps track of hundredths of seconds,  
seconds, minutes, hours, days, date of the  
month, months, and years; valid leap year  
compensation up to 2100  
§ Watchdog timer restarts an out-of-control  
processor  
§ Alarm function schedules real-time related  
activities  
§ Programmable interrupts and square wave  
outputs maintain 28-pin JEDEC footprint  
§ All registers are individually addressable via  
the address and data bus  
VCC  
WE  
INTB(INTB)  
VBAT  
RCLR  
SQW  
OE  
A4  
GND  
1
28  
27  
INTA  
X1  
X2  
2
3
4
26  
25  
NC  
A5  
A4  
A3  
A2  
A1  
A0  
DQ0  
5
6
24  
23  
4
3
2
1
28 27 26  
25  
5
A5  
VBAT  
RCLR  
SQW  
OE  
GND  
CE  
DQ7  
6
24  
23  
7
8
22  
21  
7
A3  
A2  
A1  
A0  
22  
21  
20  
19  
8
CE  
DQ7  
DQ6  
9
10  
20  
19  
9
10  
11  
11  
12  
18  
17  
DQ0  
12 13 14 15 16 17 18  
DQ1  
DQ2  
GND  
DQ5  
DQ4  
DQ3  
13  
14  
16  
15  
DS1284  
DS1284  
28-Pin PLCC  
§ Accuracy is better than ±2 minute/month at  
25°C  
28-Pin DIP (600-mil)  
§ 50 bytes of user NV RAM  
PIN DESCRIPTION  
§ Optional 28-pin PLCC surface mount package  
§ Low-power CMOS circuitry is maintained on  
less than 0.5 mA when power is supplied from  
battery input  
§ Optional industrial temperature range  
available on 28-pin PLCC (-40°C to +85°C)  
- Interrupt Output A (open drain)  
INTA  
(INTB) - Interrupt Output B (open drain)  
INTB  
A0-A5  
- Address Inputs  
DQ0-DQ7  
- Data Input/Output  
- Chip Enable  
CE  
OE  
- Output Enable  
- Write Enable  
WE  
VCC  
- +5 Volts  
GND  
NC  
- Ground  
- No Connection  
SQW  
X1,X2  
VBAT  
- Square Wave Output  
- 32.768 kHz Crystal Connections  
- +3 Volt Battery Input  
- RAM Clear  
RCLR  
DESCRIPTION  
The DS1284 Watchdog Timekeeper Chip is a self-contained real-time clock, alarm, watchdog timer, and  
interval timer in a 28-pin JEDEC DIP package or a 28-pin PLCC surface mount package. An external  
crystal and battery are the only components required to maintain time-of-day and memory status in the  
absence of power. For a complete description of operating conditions, electrical characteristics, bus  
timing, and pin descriptions other than X1, X2, VBAT, and  
data sheet.  
, see the DS1286 Watchdog Timekeeper  
RCLR  
1 of 3  
072799  
DS1284  
PIN DESCRIPTION  
X1, X2 - Connections for a standard 32.768 kHz quartz crystal. The internal oscillator circuitry is  
designed for operation with a crystal having a specified load capacitance (CL) of 6 pF. The crystal is  
connected directly to the X1 and X2 pins. There is no need for external capacitors or resistors. For more  
information on crystal selection and crystal layout considerations, please consult Application Note 58,  
Crystal Considerations with Dallas Real Time Clocks.”  
VBAT - Battery input for any standard 3-volt lithium cell or other energy source. Battery voltage must be  
held between 2.4 and 3.7 volts for proper operation. The nominal write-protect trip point voltage at which  
access to registers containing time, watchdog, alarm, and RAM information is denied is set by internal  
circuitry as 1.26 x VBAT. A maximum load of 0.5 mA at 25°C in the absence of power should be used to  
size the external energy source. The battery should be connected directly to the VBAT pin. A diode must  
not be placed in series with the battery to the VBAT pin. Furthermore, a diode is not necessary because  
reverse charging current protection circuitry is provided internal to the device and has passed the  
requirements of Underwriters Laboratories for UL listing. An optional ground pin is provided for  
connection to battery negative. This pin should be grounded but can be left floating.  
- The  
pin is used to clear (set to logic 1) all 50 bytes of user NV RAM but does not affect  
RCLR  
RCLR  
the registers involved with time, alarm, and watchdog functions. In order to clear the RAM,  
must  
RCLR  
be forced to an input logic 0 (-0. 3 to +0.8 volts) during battery back-up mode when VCC is not applied.  
The function is designed to be used via human interface (shorting to ground or by switch) and not  
RCLR  
be driven with external buffers. This pin is internally pulled up and should be left floating when not in  
use.  
DS1284Q 28-PIN PLCC WATCHDOG TIMEKEEPER  
PKG  
DIM  
28-PIN  
MIN MAX  
A IN.  
MM  
0.300 BSC  
7.62  
B IN.  
MM  
D IN.  
MM  
0.442  
17.68  
0.480  
12.2  
0.462  
11.73  
0.500  
12.7  
D2 IN.  
MM  
E IN.  
MM  
0.390  
9.91  
0.090  
2.29  
0.430  
10.92  
0.120  
3.05  
E2 IN.  
MM  
0.390  
9.91  
0.430  
10.92  
F IN.  
MM  
H IN.  
MM  
0.015  
0.38  
0.100  
2.54  
0.020  
0.518  
0.020  
0.518  
2 of 3  
DS1284  
DS1284 28-PIN DIP WATCHDOG TIMEKEEPER  
PKG  
DIM  
28-PIN  
MIN  
MAX  
A IN.  
MM  
B IN.  
MM  
C IN.  
MM  
D IN.  
MM  
E IN.  
MM  
F IN.  
MM  
G IN.  
MM  
H IN.  
MM  
1.445  
0.530  
0.140  
0.600  
0.015  
0.120  
0.090  
0.625  
0.008  
0.015  
1.470  
0.550  
0.160  
0.625  
0.040  
0.145  
0.110  
0.675  
0.012  
0.022  
J IN.  
MM  
K IN.  
MM  
3 of 3  

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