DS1350W [DALLAS]
3.3V 4096K Nonvolatile SRAM with Battery Monitor; 3.3V 4096K非易失SRAM，带有电池监控器
| 型号： | DS1350W |
| 厂家： | 
DALLAS SEMICONDUCTOR |
| 描述： | 3.3V 4096K Nonvolatile SRAM with Battery Monitor |
| 文件： | 总11页 (文件大小：112K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DS1350W
PRELIMINARY
DS1350W
3.3V 4096K Nonvolatile SRAM
with Battery Monitor
FEATURES
PIN ASSIGNMENT
• 10 years minimum data retention in the absence of
external power
BW
A15
A16
RST
1
2
3
4
5
6
7
8
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
A18
A17
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
• Data is automatically protected during power loss
• Power supply monitor resets processor when V
powerloss occurs andholdsprocessorinresetduring
V
CC
CC
WE
OE
CE
V
CC
ramp–up
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
GND
9
• Battery monitor checks remaining capacity daily
• Read and write access times as fast as 150 ns
• Unlimited write cycle endurance
10
11
12
13
14
15
16
17
A4
A3
A2
A1
GND
V
BAT
• Typical standby current 50 µA
A0
• Upgrade for 512K x 8 SRAM, EEPROM or Flash
34–PIN POWERCAP MODULE (PCM)
(USES DS9034PC POWERCAP)
• Lithium battery is electrically disconnected to retain
freshness until power is applied for the first time
PIN DESCRIPTION
• Optional industrial temperature range of –40°C to
+85°C, designated IND
A0–A18
DQ0–DQ7
CE
–
–
–
–
–
–
–
–
–
–
Address Inputs
Data In/Data Out
Chip Enable
• New PowerCap Module (PCM) package
–
–
Directly surface–mountable module
Replaceable snap–on PowerCap provides lith-
ium backup battery
WE
Write Enable
OE
RST
BW
Output Enable
Reset Output
Battery Warning Output
Power (+3.3 Volts)
Ground
–
–
Standardized pinout for all nonvolatile SRAM
products
Detachment feature on PowerCap allows easy
removal using a regular screwdriver
V
CC
GND
NC
No Connect
DESCRIPTION
The DS1350W 3.3V 4096K Nonvolatile SRAM is a
4,194,304–bit, fully static, nonvolatile SRAM organized
as 524,288 words by eight bits. Each NV SRAM has a
self–contained lithium energy source and control cir-
data corruption. Additionally, the DS1350W has dedi-
cated circuitry for monitoring the status of V and the
CC
status of the internal lithium battery. DS1350W devices
in the PowerCap Module package are directly surface
mountable and are normally paired with a DS9034PC
PowerCap to form a complete Nonvolatile SRAM mod-
ule. The devices can be used in place of 512K x 8
SRAM, EEPROM or Flash components.
cuitry which constantly monitors V for an out–of–tol-
CC
erance condition. When such a condition occurs, the
lithium energy source is automatically switched on and
write protection is unconditionally enabled to prevent
022598 1/11
DS1350W
supplyconditionisdetected, theNVSRAMwarnsapro-
cessor–based system of impending power failure by
asserting RST. On power up, RST is held active for 200
ms nominal to prevent system operation during pow-
READ MODE
The DS1350W executes a read cycle whenever WE
(Write Enable) is inactive (high) and CE (Chip Enable)
and OE (Output Enable) are active (low). The unique
address specified by the 19 address inputs (A - A
defines which of the 524,288 bytes of data is to be
accessed. Valid data will be available to the eight data
)
er–on transients and to allow t
an open–drain output driver.
to elapse. RST has
0
18
REC
output drivers within t
(Access Time) after the last
ACC
BATTERY MONITORING
address input signal is stable, providing that CE and OE
(Output Enable) access times are also satisfied. If OE
and CE access times arenotsatisfied, thendataaccess
mustbemeasuredfromthelateroccurringsignal(CE or
The DS1350W automatically performs periodic battery
voltage monitoring on a 24 hour time interval. Such
monitoringbeginswithint
after V rises above V
CC TP
REC
and is suspended when power failure occurs.
OE)andthelimitingparameteriseithert forCEort
CO
OE
After each 24 hour period has elapsed, the battery is
connected to an internal 1MΩ test resistor for one
second. During this one second, if battery voltage falls
below the battery voltage trip point (2.6V), the battery
warning output BW is asserted. Once asserted, BW
remainsactive until the module is replaced. The battery
for OE rather than address access.
WRITE MODE
The DS1350W excutes a write cycle whenever the WE
andCEsignalsareintheactive(low)stateafteraddress
inputs are stable. The later occurring falling edge of CE
or WE will determine the start of the write cycle. The
write cycle is terminated by the earlier rising edge of CE
or WE. All address inputs must be kept valid throughout
the write cycle. WE must return to the high state for a
isstillretestedaftereachV power–up,however, even
CC
ifBWisactive. Ifthebatteryvoltageisfoundtobehigher
than 2.6V during such testing, BW is de–asserted and
regular 24–hour testing resumes. BW has an open–
drain output driver.
minimum recovery time (t ) before another cycle can
WR
be initiated. The OE control signal should be kept inac-
tive (high) during write cycles to avoid bus contention.
However, if the output drivers are enabled (CE and OE
FRESHNESS SEAL
Each DS1350W is shipped from Dallas Semiconductor
with its lithium energy source disconnected, guarantee-
active) then WE will disable the outputs in t
falling edge.
from its
ODW
ing full energy capacity. When V is first applied at a
CC
level greater than V , the lithium energy source is
TP
enabled for battery backup operation.
DATA RETENTION MODE
TheDS1350WprovidesfullfunctionalcapabilityforV
CC
PACKAGES
greater than 3.0 volts and write protects by 2.8 volts.
The 34–pin PowerCap Module integrates SRAM
memory and nonvolatile control into a module base
along with contacts for connection to the lithium battery
in the DS9034PC PowerCap. The PowerCap Module
package design allows a DS1350W device to be sur-
face mounted without subjecting its lithium backup bat-
tery to destructive high–temperature reflow soldering.
After a DS1350W module base is reflow soldered, a
DS9034PCissnappedontopofthebasetoformacom-
plete Nonvolatile SRAM module. The DS9034PC is
keyedtopreventimproperattachment. DS1350Wmod-
ulebases and DS9034PC PowerCaps are ordered sep-
arately and shipped in separate containers. See the
DS9034PC data sheet for further information.
Data is maintained in the absence of V without any
additionalsupportcircuitry. ThenonvolatilestaticRAMs
CC
constantly monitor V
. Should the supply voltage
CC
decay, the NV SRAMs automatically write protect them-
selves, all inputs become “don’t care,” and all outputs
become high impedance. As V falls below approxi-
CC
mately 2.5 volts, the power switching circuit connects
the lithium energy source to RAM to retain data. During
power–up, when
2.5 volts, the power switching circuit connects external
to the RAM and disconnects the lithium energy
V
CC
rises above approximately
V
CC
source. Normal RAM operation can resume after V
exceeds 3.0 volts.
CC
SYSTEM POWER MONITORING
The DS1350W has the ability to monitor the external
V
CC
power supply. When an out–of–tolerance power
022598 2/11
DS1350W
ABSOLUTE MAXIMUM RATINGS*
Voltage On Any Pin Relative To Ground
Operating Temperature
Storage Temperature
Soldering Temperature
–0.3V to +4.6V
0°C to 70°C, –40°C to +85°C for IND parts
–40°C to +70°C, –40°C to +85°C for IND parts
260°C For 10 seconds
* This is a stress rating only and functional operation of the device at these or any other conditions above those
indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods of time may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
(tA: See Note 10)
PARAMETER
Power Supply Voltage
Logic 1
SYMBOL
MIN
3.0
2.2
0.0
TYP
MAX
UNITS
NOTES
V
CC
3.3
3.6
V
V
V
V
IH
V
CC
Logic 0
V
IL
0.4
DC ELECTRICAL CHARACTERISTICS
(tA: See Note 10) (VCC=3.3V ±0.3V)
PARAMETER
SYMBOL
MIN
–1.0
–1.0
TYP
MAX
+1.0
+1.0
UNITS
µA
NOTES
Input Leakage Current
I/O Leakage Current
I
IL
I
IO
µA
CE ≥ VIH ≤ V
CC
Output Current @ 2.2V
Output Current @ 0.4V
Standby Current CE = 2.2V
I
–1.0
2.0
mA
mA
µA
µA
mA
V
14
14
OH
I
OL
I
I
50
30
250
150
50
CCS1
CCS2
CCO1
Standby Current CE = V –0.2V
CC
Operating Current
I
Write Protection Voltage
V
2.8
2.9
3.0
TP
CAPACITANCE
PARAMETER
(tA = 25°C)
SYMBOL
MIN
TYP
5
MAX
10
UNITS
pF
NOTES
Input Capacitance
Input/Output Capacitance
C
IN
C
5
10
pF
I/O
022598 3/11
DS1350W
AC ELECTRICAL CHARACTERISTICS
(tA: See Note 10) (VCC=3.3V ±0.3V)
DS1350W–150
MIN
MAX
PARAMETER
SYMBOL
TYPE
UNITS
ns
NOTES
Read Cycle Time
t
150
RC
Access Time
t
150
70
ns
ACC
OE to Output Valid
CE to Output Valid
OE or CE to Output Active
Output High Z from Deselection
t
ns
OE
CO
t
150
ns
t
5
5
ns
5
5
COE
t
t
35
ns
OD
Output Hold from Address
Change
ns
OH
Write Cycle Time
t
150
100
0
ns
ns
ns
ns
WC
Write Pulse Width
Address Setup Time
Write Recovery Time
t
3
WP
t
AW
t
t
5
20
12
13
WR1
WR2
Output High Z from WE
Output Active from WE
Data Setup Time
t
35
ns
ns
ns
ns
5
5
4
ODW
t
5
OEW
t
60
DS
Data Hold Time
t
t
0
20
12
13
DH1
DH2
READ CYCLE
t
RC
V
V
V
V
V
V
IH
IL
IH
IL
IH
IL
ADDRESSES
t
OH
t
V
ACC
IH
V
IH
CE
OE
t
CO
V
IL
t
OD
V
IH
t
OE
V
IH
V
IL
t
OD
t
COE
t
COE
V
V
OUTPUT
DATA VALID
OH
OL
OH
OL
D
OUT
V
V
SEE NOTE 1
022598 4/11
DS1350W
WRITE CYCLE 1
t
WC
V
V
V
V
V
V
IH
IH
IL
IH
IL
ADDRESSES
IL
t
AW
CE
V
V
IL
IL
t
t
WR1
WP
WE
V
V
IH
IH
V
V
IL
IL
t
OEW
t
ODW
HIGH
IMPEDANCE
D
OUT
t
t
DH1
DS
V
V
V
V
IH
IL
IH
IL
D
DATA IN STABLE
IN
SEE NOTES 2, 3, 4, 6, 7, 8 AND 12
WRITE CYCLE 2
t
WC
V
V
V
V
V
IH
IH
IL
IH
IL
ADDRESSES
CE
V
IL
t
AW
t
t
WR2
WP
V
V
V
IH
IH
IH
V
V
IL
IL
V
IL
WE
V
V
IL
IL
t
COE
t
ODW
D
OUT
t
t
DH2
DS
V
V
IH
IH
DATA IN STABLE
D
IN
V
V
IL
IL
SEE NOTES 2, 3, 4, 6, 7, 8 AND 13
022598 5/11
DS1350W
POWER–DOWN/POWER–UP CONDITION
V
CC
V
TP
t
DR
2.7V
t
F
t
R
t
REC
t
t
PU
PD
SLEWS WITH
V
CC
CE,
WE
V
IH
BACKUP CURRENT-
SUPPLIED FROM
LITHIUM BATTERY
t
t
RPD
RPU
RST
V
V
IL
IH
t
BPU
SLEWS WITH
V
CC
BW
V
IL
SEE NOTES 11 AND 14
BATTERY WARNING DETECTION
V
TP
V
CC
t
BPU
V
BAT
2.6V
BTC
t
t
BTPW
BATTERY
TEST
ACTIVE
t
BW
BW
V
IL
SEE NOTE 14
022598 6/11
DS1350W
POWER–DOWN/POWER–UP TIMING
(tA: See Note 10)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
NOTES
V
CC
Fail Detect to CE and WE
t
1.5
µs
11
PD
Inactive
V
CC
V
CC
V
CC
V
CC
slew from V to 0V
t
F
150
150
µs
µs
µs
ms
TP
14
Fail Detect to RST Active
t
15
RPD
slew from 0V to V
t
R
TP
Valid to CE and WE
t
2
PU
Inactive
V
Valid to End of Write
t
t
125
ms
CC
REC
Protection
V
Valid to RST Inactive
Valid to BW Valid
150
200
350
1
ms
s
14
14
CC
CC
RPU
V
t
BPU
BATTERY WARNING TIMING
PARAMETER
(tA: See Note 10)
SYMBOL
MIN
TYP
MAX
UNITS
NOTES
Battery Test Cycle
t
24
hr
s
BTC
Battery Test Pulse Width
Battery Test to BW Active
t
1
1
BTPW
t
s
BW
(tA = 25°C)
NOTES
9
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
Expected Data Retention Time
t
10
years
DR
WARNING:
Under no circumstance are negative undershoots, of any amplitude, allowed when device is in battery backup mode.
NOTES:
1. WE is high for a Read Cycle.
2. OE = V or V . If OE = V during write cycle, the output buffers remain in a high impedance state.
IH
IL
IH
3. t
is specified as the logical AND of CE and WE. t
is measured from the latter of CE or WE going low to the
WP
WP
earlier of CE or WE going high.
4. t is measured from the earlier of CE or WE going high.
DS
5. These parameters are sampled with a 5 pF load and are not 100% tested.
6. If the CE low transition occurs simultaneously with or latter than the WE low transition, the output buffers remain
in a high impedance state during this period.
7. If the CE high transition occurs prior to or simultaneously with the WE high transition, the output buffers remain
in high impedance state during this period.
8. If WE is low or the WE low transition occurs prior to or simultaneously with the CE low transition, the output buffers
remain in a high impedance state during this period.
022598 7/11
DS1350W
9. Each DS1350W has a built–in switch that disconnects the lithium source until V is first applied by the user. The
CC
expected t is defined as accumulative time in the absence of V starting from the time power is first applied
DR
CC
by the user.
10.All AC and DC electrical characteristics are valid over the full operating temperature range. For commercial prod-
ucts, this range is 0°C to 70°C. For industrial products (IND), this range is –40°C to +85°C.
11. In a power down condition the voltage on any pin may not exceed the voltage on V
.
CC
12.t
13.t
and t
are measured from WE going high.
are measured from CE going high.
WR1
WR2
DH1
DH2
and t
14.RST and BW are open–drain outputs and cannot source current. External pull–up resistors should be connected
to these pins for proper operation. Both pins will sink 10 mA.
DC TEST CONDITIONS
Outputs Open
Cycle = 200 ns for operating current
All voltages are referenced to ground
AC TEST CONDITIONS
Output Load: 100 pF + 1TTL Gate
Input Pulse Levels: 0 – 3.0V
Timing Measurement Reference Levels
Input: 1.5V
Output: 1.5V
Input pulse Rise and Fall Times: 5 ns
ORDERING INFORMATION
DS1350 W P –
SSS –
III
Operating Temperature Range
blank: 0° to 70°
IND: –40° to +85°C
Speed
150 ns
Access
150:
Package Type
blank: 28–pin 600 mil DIP
P: 34–pin PowerCap Module
022598 8/11
DS1350W
DS1350W NONVOLATILE SRAM, 34–PIN POWERCAP MODULE
INCHES
PKG
DIM
MIN
0.920
0.980
–
NOM
0.925
0.985
–
MAX
0.930
0.990
0.080
0.058
0.052
0.025
0.030
A
B
C
D
E
F
0.052
0.048
0.015
0.020
0.055
0.050
0.020
0.025
G
TOP VIEW
SIDE VIEW
BOTTOM VIEW: REFERENCE ONLY
COMPONENTS AND PLACEMENTS
MAY DIFFER FROM THOSE SHOWN
022598 9/11
DS1350W
DS1350W NONVOLATILE SRAM, 34–PIN POWERCAP MODULE WITH POWERCAP
INCHES
PKG
DIM
MIN
NOM
0.925
0.960
0.245
0.055
0.050
0.020
0.025
MAX
0.930
0.965
0.250
0.058
0.052
0.025
0.030
A
0.920
0.955
0.240
0.052
0.048
0.015
0.020
B
C
D
E
F
G
ASSEMBLY AND USE
Reflow soldering
DallasSemiconductorrecommendsthat
PowerCap Module bases experience
one pass through solder reflow oriented
label–side up (live–bug).
TOP VIEW
Hand soldering and touch–up
Do not touch soldering iron to leads for
more than 3 seconds. To solder, apply
flux to the pad, heat the lead frame pad
and apply solder. To remove part, apply
flux, heat pad until solder reflows, and
use a solder wick.
SIDE VIEW
LPM replacement in a socket
To replace a Low Profile Module in a
68–pin PLCC socket, attach
a
DS9034PCPowerCap to a module base
then insert the complete module into the
socket one row of leads at a time, push-
ingonly on the corners of the cap. Never
apply force to the center of the device.
To remove from a socket, use a PLCC
extraction tool and ensure that it does
not hit or damage any of the module IC
components. Do not use any other tool
for extraction.
COMPONENTS AND PLACEMENTS
MAY DIFFER FROM THOSE SHOWN
BOTTOM VIEW: REFERENCE ONLY
022598 10/11
DS1350W
RECOMMENDED POWERCAP MODULE LAND PATTERN
A
INCHES
D
C
PKG
DIM
MIN
–
NOM
1.050
0.826
0.050
0.030
0.112
MAX
16 PL
A
B
C
D
E
–
–
–
–
–
–
–
–
–
B
E
RECOMMENDED POWERCAP MODULE SOLDER STENCIL
A
INCHES
D
C
PKG
DIM
MIN
–
NOM
1.050
0.890
0.050
0.030
0.080
MAX
16 PL
A
B
C
D
E
–
–
–
–
–
–
–
–
–
B
E
022598 11/11
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