DA9232-82VZ2 [DIALOG]
High Efficiency, Ultra-Low Quiescent Current and Ultra-Low Output Ripple Buck Regulator;型号: | DA9232-82VZ2 |
厂家: | Dialog Semiconductor |
描述: | High Efficiency, Ultra-Low Quiescent Current and Ultra-Low Output Ripple Buck Regulator |
文件: | 总50页 (文件大小:1321K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
DA9232
High Efficiency, Ultra-Low Quiescent Current and Ultra-
Low Output Ripple Buck Regulator
General Description
DA9232 is a high efficiency, ultra-low quiescent current and ultra-low output ripple buck regulator in a
compact I2C configurable WLCSP package targeting battery powered applications needing low ripple
and highly efficient power supplies.
The battery life of these devices is significantly improved due to the low quiescent current delivered by
DA9232 during operation and shutdown.
The buck regulator extends high light load efficiency down to 10µA further extending battery life.
Dynamic Voltage Control in the Buck regulator facilitates optimization across the system power modes
enabling further improvement in System efficiency and battery life.
DA9232 provides multiple protection features and comes with the ability to monitor the events and
indicators in the GPO pin.
Suitable for space constrained applications, the DA9232 comes in a 1.70 mm x 1.30 mm x 0.5 mm,
12-pin WLCSP package.
Key Features
■
60mA buck regulator
■
I2C interface for device configuration and
control
□
□
□
750nA total input current (buck enabled,
no load)
■
■
Protection features and System Monitors
Small 1.7 mm x 1.3 mm x 0.5 mm, 12-pin
WLCSP package
Up to 81% efficiency at 1.8V output,
10µA load currents
Input voltage 2.5V to 5.5V (Minimum
2.75V for start-up)
□
□
Output voltage 0.6V to 1.9V
Dynamic Voltage Control (DVC)
Applications
■
■
■
Wearables – wrist wear, hearables
Smart devices - thermostats and door locks
Smoke detectors
■
■
■
Portable medical devices
Remote sensors
High efficiency, low power applications
Datasheet
Revision 2.3
23-Apr-2018
CFR0011-120-00 Rev 5
1 of 50
© 2019 Dialog Semiconductor
DA9232
High Efficiency, Ultra-Low Quiescent Current and Ultra-
Low Output Ripple Buck Regulator
Contents
General Description ............................................................................................................................ 1
Key Features ........................................................................................................................................ 1
Applications ......................................................................................................................................... 1
Contents ............................................................................................................................................... 2
Figures.................................................................................................................................................. 3
Tables ................................................................................................................................................... 4
1
2
3
4
5
6
7
8
9
Terms and Definitions................................................................................................................... 6
Block and Application Diagrams ................................................................................................. 7
Pinout ............................................................................................................................................. 8
Absolute Maximum Ratings ....................................................................................................... 10
Recommended Operating Conditions....................................................................................... 11
ESD Ratings................................................................................................................................. 12
Electrical Characteristics ........................................................................................................... 13
Thermal Characteristics ............................................................................................................. 16
Typical Operating Characteristics............................................................................................. 17
9.1 Buck No Load Quiescent Current vs Temperature, Device is Switching............................ 17
9.2 RDSon vs Temperature ...................................................................................................... 17
9.3 Efficiency vs Load Current .................................................................................................. 18
9.4 Switching Frequency vs Load Current................................................................................ 19
9.5 Buck VOUT Ripple vs Load Current...................................................................................... 20
9.6 Buck VOUT vs Load Current.................................................................................................. 21
9.7 Typical Mode Operation...................................................................................................... 22
9.8 Buck Load Transient Response.......................................................................................... 23
9.9 Buck Dynamic Voltage Control ........................................................................................... 24
9.10 Device Enable and Start up ................................................................................................ 25
10 Feature Descriptions................................................................................................................... 26
10.1 Chip Enable and Disable Through IC_EN .......................................................................... 26
10.2 VDD Under-Voltage Lockout............................................................................................... 26
10.3 Buck Regulator.................................................................................................................... 26
10.3.1 Buck Output Voltage Programmability................................................................. 26
10.3.2 Start-up Operation ............................................................................................... 27
10.3.3 Power Saving Mode Operation............................................................................ 27
10.3.4 Dynamic Voltage Control..................................................................................... 28
10.3.5 Cycle-by-cycle Over-Current Protection.............................................................. 28
10.3.6 Output Over-Voltage Protection .......................................................................... 28
Datasheet
Revision 2.3
23-Apr-2018
CFR0011-120-00 Rev 5
2 of 50
© 2019 Dialog Semiconductor
DA9232
High Efficiency, Ultra-Low Quiescent Current and Ultra-
Low Output Ripple Buck Regulator
10.3.7 Output Under-Voltage Protection ........................................................................ 28
10.3.8 Automatic Output voltage Discharge................................................................... 28
10.3.9 Event Flag and Fault Control............................................................................... 29
10.4 I2C Programming................................................................................................................. 30
10.4.1 Interface Description............................................................................................ 30
10.4.2 Details of the I2C Protocol.................................................................................... 30
10.5 GPO Pin Function Programming ........................................................................................ 32
10.5.1 Power Good Indicator.......................................................................................... 32
10.5.2 Event Indicator..................................................................................................... 32
10.5.3 Reset Pulse Generation....................................................................................... 32
10.5.4 Always Pull-Down or Hi-Z.................................................................................... 33
11 Register Overview....................................................................................................................... 34
11.1 Register Map....................................................................................................................... 34
11.1.1 Buck Control ........................................................................................................ 34
11.1.2 System Module.................................................................................................... 35
11.2 Register Definitions............................................................................................................. 35
11.2.1 Buck Control ........................................................................................................ 35
11.2.1.1
11.2.1.2
Event/Status/Mask Registers .......................................................... 35
User Registers................................................................................. 38
11.2.2 System Module.................................................................................................... 43
11.2.2.1
System Reset Registers .................................................................. 43
11.2.2.2
System ID Registers...................................................................... 44
12 Package Information................................................................................................................... 46
12.1 Package Outlines................................................................................................................ 46
12.2 Moisture Sensitivity Level.................................................................................................... 47
12.3 Soldering Information.......................................................................................................... 47
13 Ordering Information .................................................................................................................. 48
Contacting Dialog Semiconductor .................................................................................................. 49
Figures
Figure 1: Block Diagram........................................................................................................................ 7
Figure 2: DA9232 Application Diagram ................................................................................................. 7
Figure 3: Pinout Diagram (Top View).................................................................................................... 8
Figure 4: Buck VOUT = 1.8 V.............................................................................................................. 17
Figure 5: Buck VOUT = 0.7 V.............................................................................................................. 17
Figure 6: High-Side FET...................................................................................................................... 17
Figure 7: Low-Side FET....................................................................................................................... 17
Figure 8: Buck VOUT = 1.8 V.............................................................................................................. 18
Figure 9: Buck VOUT = 1.2 V.............................................................................................................. 18
Datasheet
Revision 2.3
23-Apr-2018
CFR0011-120-00 Rev 5
3 of 50
© 2019 Dialog Semiconductor
DA9232
High Efficiency, Ultra-Low Quiescent Current and Ultra-
Low Output Ripple Buck Regulator
Figure 10: Buck VOUT = 0.9V............................................................................................................. 18
Figure 11: Buck VOUT = 0.7 V............................................................................................................ 18
Figure 122: Buck VOUT = 1.8 V.......................................................................................................... 19
Figure 133: Buck VOUT = 1.2 V.......................................................................................................... 19
Figure 144: Buck VOUT = 0.9 V.......................................................................................................... 19
Figure 15: Buck VOUT = 0.7 V............................................................................................................ 19
Figure 166: Buck VOUT = 1.8 V.......................................................................................................... 20
Figure 17: Buck VOUT = 1.2 V............................................................................................................ 20
Figure 180: Buck VOUT = 1.8 V.......................................................................................................... 21
Figure 191: Buck VOUT = 1.2 V.......................................................................................................... 21
Figure 204: Buck VIN = 3.6 V, Buck VOUT = 1.8 V, Buck ILOAD = 1 mA.......................................... 22
Figure 215: Buck VIN = 3.6 V, Buck VOUT = 1.8 V, Buck ILOAD = 60 mA........................................ 22
Figure 226: Buck VIN = 3.6 V, Buck VOUT = 0.7 V, Buck ILOAD = 1 mA.......................................... 22
Figure 237: Buck VIN = 3.6 V, Buck VOUT = 0.7 V, Buck ILOAD = 60 mA........................................ 22
Figure 248: Buck ILOAD = 0.5 mA to 60 mA to 0.5 mA (0.1A/µs); Buck VIN = 3.6 V, Buck
VOUT = 1.8 V ...................................................................................................................................... 23
Figure 250: Buck VOUT 0.6 V to 1.2 V; Buck VIN = 3.6 V, Buck ILOAD = 60 mA............................. 24
Figure 261: Buck VOUT 1.2 V to 0.6 V; Buck VIN = 3.6 V, Buck ILOAD = 60 mA............................. 24
Figure 272: Buck VOUT 1.3 V to 1.9 V; Buck VIN = 3.6 V, Buck ILOAD = 60 mA............................. 24
Tables
Table 1: Pin Description ........................................................................................................................ 8
Table 2: Pin Type Definition .................................................................................................................. 9
Table 3: Absolute Maximum Ratings................................................................................................... 10
Table 4: Recommended Operating Conditions ................................................................................... 11
Table 5: Input Current.......................................................................................................................... 13
Table 6: Buck Output........................................................................................................................... 13
Table 7: GPO - Electrical performance ............................................................................................... 14
Table 8: Analog Core - Electrical performance ................................................................................... 14
Table 9: I2C interface .......................................................................................................................... 15
Table 10: Thermal Characteristics ...................................................................................................... 16
Table 11: Buck Output Voltage Settings ............................................................................................. 26
Table 12: GPO as Power Good Indicator............................................................................................ 32
Table 13: Event/Status/Mask and User Registers .............................................................................. 34
Table 14: System Reset Registers...................................................................................................... 35
Table 15: Register EVENT .................................................................................................................. 35
Table 16: Register STATUS................................................................................................................ 36
Table 17: Register MASK.................................................................................................................... 37
Table 18: Register GPO ...................................................................................................................... 38
Table 19: Register BUCK .................................................................................................................... 39
Table 20: Register BUCK_CFG .......................................................................................................... 41
Table 21: Register FAUL_CTL............................................................................................................ 42
Table 22: Register PIN_MONITOR..................................................................................................... 43
Table 23: Register SYS_RST_EVENT................................................................................................ 43
Table 24: Register SYS_SRST ........................................................................................................... 44
Table 25: Register SYS_DEVICE_ID................................................................................................. 44
Table 26: Register SYS_VARIANT_ID............................................................................................... 45
Table 27: Register SYS_CONFIG_ID ................................................................................................ 45
Datasheet
Revision 2.3
23-Apr-2018
CFR0011-120-00 Rev 5
4 of 50
© 2019 Dialog Semiconductor
DA9232
High Efficiency, Ultra-Low Quiescent Current and Ultra-
Low Output Ripple Buck Regulator
Table 28: MSL Classification............................................................................................................... 47
Table 29: Ordering Information ........................................................................................................... 48
Table 30: OTP List............................................................................................................................... 48
Datasheet
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CFR0011-120-00 Rev 5
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© 2019 Dialog Semiconductor
DA9232
High Efficiency, Ultra-Low Quiescent Current and Ultra- NDA Confidential
Low Output Ripple Buck Regulator
1
Terms and Definitions
CDM
DC
Charged Device Model
Direct Current
DCM
FET
Discontinuous Conduction Mode
Field Effect Transistor
NMOS
OTP
N-channel Metal-Oxide-Semiconductor
One-Time Programmable (memory)
Power Management IC
PMIC
PMOS
R/W
P-channel Metal-Oxide-Semiconductor
Read/Write
SCL
Serial Clock SDA
T&R
Tape and Reel
UVLO
WLCSP
Under-Voltage Lock Out
Wafer-Level Chip-Scale Package
Datasheet
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DA9232
High Efficiency, Ultra-Low Quiescent Current and Ultra- NDA Confidential
Low Output Ripple Buck Regulator
2 Block and Application Diagrams
VDD_SYS
VDD
Buck Control
Comp
IC_EN
VDAC
Logic
&
SW
Drivers
PGND
SDA
SCL
I2C
Interface
VBUCK_SNS
Fault Handling
VBUCK Over-
Voltage
UVLO
GPO
Control
GPO
VBUCK
Over-Current
VBUCK
Under-Voltage
DA9232
GND
Figure 1: Block Diagram
Buck VIN: 2.5 to 5.5 V
(Minimum 2.75V for start up)
4.7 µF
1 µF
VDD
VDD_SYS
Buck VOUT
1.5 µH
MCU/
SW
System I/O
22 µF
22 µF
PGND
DA9232
SDA
SCL
GPO
VBUCK_SNS
HOST
IC_EN
GND
Figure 2: DA9232 Application Diagram
Datasheet
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DA9232
High Efficiency, Ultra-Low Quiescent Current and Ultra- NDA Confidential
Low Output Ripple Buck Regulator
3
Pinout
1
2
3
A
VDD_SYS
SW
PGND
SDA
SCL
GPO
VBUCK_SNS
B
C
NC
GND
IC_EN
NC
VDD
D
Figure 3: Pinout Diagram (Top View)
Table 1: Pin Description
Pin # Pin Name
Type
(See Table 2)
Drive Reset
(mA) State
Description
A1
A2
A3
B1
B2
B3
C1
C2
C3
D1
VDD_SYS
SW
AI
Buck VIN
AIO
AIO
DIO
DO
AI
Buck switch node
Buck ground
PGND
SDA
I2C serial data
GPO
General purpose output
Buck VOUT /feedback voltage
I2C serial clock
No connection
VBUCK_SNS
SCL
DI
NC
GND
AI
DI
Analog ground
Chip enable
IC_EN
Datasheet
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DA9232
High Efficiency, Ultra-Low Quiescent Current and Ultra- NDA Confidential
Low Output Ripple Buck Regulator
Type
(See Table 2)
Drive Reset
(mA) State
Pin # Pin Name
Description
D2
D3
NC
No connection
Analog VIN
VDD
AI
Table 2: Pin Type Definition
Pin Type
DI
Description
Digital Input
Digital Output
Pin Type
AI
Description
Analog Input
DO
AO
Analog Output
DIO
Digital Input / Output
AIO
Analog Input / Output
Back drive Protection
Switchable pull-up resistor
Switchable pull-down resistor
DIOD
PU
Digital Input / Output open Drain
Fixed pull-up resistor
BP
SPU
SPD
PD
Fixed pull-down resistor
Datasheet
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© 2019 Dialog Semiconductor
DA9232
High Efficiency, Ultra-Low Quiescent Current and Ultra- NDA Confidential
Low Output Ripple Buck Regulator
4
Absolute Maximum Ratings
Table 3: Absolute Maximum Ratings
Symbol
Description
Conditions
Min
Max
Unit
TSTG
Storage temperature
-65
150
°C
Operating junction
temperature
TJ
-40
125
°C
VDD
Analog VIN pin
Power VIN pin
Tied to VDD_SYS
Tied to VDD
-0.3
-0.3
-0.3
6
6
6
V
V
V
VDD_SYS
I/O pins
Maximum voltage
I/O pin voltage ≤ VDD
Stresses beyond those listed under Absolute maximum ratings may cause permanent damage to the device.
These are stress ratings only, so functional operation of the device at these or any other conditions beyond
those indicated in the operational sections of the specification are not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
Datasheet
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DA9232
High Efficiency, Ultra-Low Quiescent Current and Ultra- NDA Confidential
Low Output Ripple Buck Regulator
5
Recommended Operating Conditions
Table 4: Recommended Operating Conditions
Parameter Description
Conditions
Min
Typ
Max
Unit
2.5
VDD Analog VIN
Tied to VDD_SYS
5.5
V
Note 1
2.5
VDD_SYS Power VIN
Tied to VDD
5.5
60
V
Note 1
Output current from SW
pin, continuous DC current
IOUT
Load Current
mA
Note 1 Requires minimum 2.75V for start-up. Once started, input voltage can go down to 2.5V.
Datasheet
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DA9232
High Efficiency, Ultra-Low Quiescent Current and Ultra- NDA Confidential
Low Output Ripple Buck Regulator
6
ESD Ratings
Parameter
Description
Conditions
Value
Unit
Human body model (HBM), per
ANSI/ESDA/JEDEC JS-001
± 2000
Note 2
VESD
Electrostatic discharge
V
Charged device model (CDM),
per JEDEC specification JESD22-
C101
± 500
Note 3
Note 2 JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD
control process.
Note 3 JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD
control process.
Datasheet
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DA9232
High Efficiency, Ultra-Low Quiescent Current and Ultra- NDA Confidential
Low Output Ripple Buck Regulator
7
Electrical Characteristics
VDD = VDD_SYS = 3.6 V, TA= -40C to 85C. Typical values are at TA = 25°C (unless otherwise
noted).
Table 5: Input Current
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Electrical performance
-40 °C < TA < 85 °C
Buck enabled and regulating,
no load
2.5 V ≤ VVDD_SYS ≤ 5.5 V
VBUCK = 1.8 V
IQ_BUCK_ON_ Buck no load quiescent
0.75
3.5
μA
current
NO_LD
Table 6: Buck Output
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Electrical performance
On resistance of PMOS
pass device
VVDD_SYS = 3.6 V
IOUT = 50 mA
RON_PMOS
RON_NMOS
RSYS_DHCG
600
300
33
800
450
mΩ
mΩ
Ω
On resistance of NMOS
pass device
VVDD_SYS = 3.6 V
IOUT = 50 mA
MOSFET on-resistance
for buck discharge
VVDD_SYS = 3.6 V
IOUT = -10 mA into VOUT pin
VVDD_SYS = 3.6 V
VBUCK = 1.8 V
IOUT = 0 A from BUCK_EN =
1 to switching start
tSTART
Buck start-up time
3
ms
VVDD_SYS = 3.6 V
VBUCK = 1.8 V
ILIM_SW_PMOS
SW current limit PMOS
550
mA
Switching frequency in
continuous conduction
mode
fSW
1.5
1.9
MHz
ILIM_PMOS_SOFT PMOS switch current
Current limit is reduced
during soft-start
250
mA
V
limit during soft-start
START
VOUT_VBUCK_SN Buck output voltage
Programmable range, 50 mV
steps
0.6
range
S
Datasheet
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© 2019 Dialog Semiconductor
DA9232
High Efficiency, Ultra-Low Quiescent Current and Ultra- NDA Confidential
Low Output Ripple Buck Regulator
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
HI programmable range,
50 mV steps
VOUT_RANGE_HI = 1
VOUT_VBUCK_SN Buck output voltage
1.3
1.9
V
range
S_HI
LO programmable range,
50 mV steps
VOUT_RANGE_HI = 0
VOUT_VBUCK_SN Buck output voltage
0.6
1.3
1.5
V
range
S_LO
VVDD_SYS = 2.5 - 5.5V
IOUT = 0 - 60 mA
VOUT_RANGE_HI = 1
VBUCK = 1.8 V
VOUT_VBUCK_AC Buck output voltage
-1.5
%
accuracy (Note 1)
C_HI
VVDD_SYS = 2.5 - 5.5 V
IOUT = 0 - 60 mA
VOUT_RANGE_HI = 0
VBUCK = 0.7 V
VOUT_VBUCK_AC Buck output voltage
-2.5
2.5
%
accuracy (Note 1)
C_LO
Note 1: Includes all variations caused by Line and Load Regulations, Ripple and Temperature.
Table 7: GPO - Electrical performance
Symbol
RPD
Parameter
Conditions
Min
Typ
Max
Unit
Ω
GPO pull-down resistance
GPO Output high voltage
GPO Output low voltage
VVDD_SYS = 3.6 V
VPULLUP = 1.8 V
VPULLUP = 1.8 V
12
VOH
1.4
V
VOL
0.4
V
Table 8: Analog Core - Electrical performance
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Under-voltage lockout
threshold
VTH_UVLO
Input voltage falling
2.4
2.5
V
VTH_UVLO_RI Under-voltage lockout
Input voltage rising.
Input voltage rising
2.75
V
threshold rising.
SE
Under-voltage lockout
VHYS_UVLO
hysteresis
200
mV
Datasheet
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© 2019 Dialog Semiconductor
DA9232
High Efficiency, Ultra-Low Quiescent Current and Ultra- NDA Confidential
Low Output Ripple Buck Regulator
Table 9: I2C interface
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Electrical performance
I2C bus specification
standard and fast mode
frequency support
fI2C_CLK
100
1.4
400
kHz
Input high threshold level
for SDA and SCL
VIN_HI_THR
V
V
Input low threshold level for
SDA and SCL
VIN_LO_THR
0.4
0.4
1
VOUT_LO_TH Output low threshold level
V
for SDA
R
High-level leakage current
ILKG_HILVL
VPU = VVDD
SDA and SCL
μA
for SDA and SCL.
Datasheet
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DA9232
High Efficiency, Ultra-Low Quiescent Current and Ultra- NDA Confidential
Low Output Ripple Buck Regulator
8
Thermal Characteristics
Table 10: Thermal Characteristics
Parameter Description
Conditions
Typ
Unit
Junction-to-ambient thermal
resistance
RTH_JA
JEDEC 6-layer pcb, no airflow
73.2
°C/W
Junction-to-top characterization
parameter
ΨJT
JEDEC 6-layer pcb, no airflow
JEDEC 6-layer pcb, no airflow
6.66
34.8
°C/W
°C/W
Junction-to-board thermal
resistance
RTH_JB
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DA9232
High Efficiency, Ultra-Low Quiescent Current and Ultra- NDA Confidential
Low Output Ripple Buck Regulator
9
Typical Operating Characteristics
Test Circuit of Figure 2, Buck VIN = VDD_SYS = VDD, TA = 25°C, unless specified otherwise.
9.1 Buck No Load Quiescent Current vs Temperature, Device is Switching
Figure 4: Buck VOUT = 1.8 V
Figure 5: Buck VOUT = 0.7 V
9.2 RDSon vs Temperature
Figure 6: High-Side FET
Figure 7: Low-Side FET
Datasheet
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DA9232
High Efficiency, Ultra-Low Quiescent Current and Ultra- NDA Confidential
Low Output Ripple Buck Regulator
9.3 Efficiency vs Load Current
Figure 8: Buck VOUT = 1.8 V
Figure 9: Buck VOUT = 1.2 V
Figure 10: Buck VOUT = 0.9V
Figure 11: Buck VOUT = 0.7 V
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DA9232
High Efficiency, Ultra-Low Quiescent Current and Ultra- NDA Confidential
Low Output Ripple Buck Regulator
9.4 Switching Frequency vs Load Current
Figure 122: Buck VOUT = 1.8 V
Figure 133: Buck VOUT = 1.2 V
Figure 144: Buck VOUT = 0.9 V
Figure 15: Buck VOUT = 0.7 V
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DA9232
High Efficiency, Ultra-Low Quiescent Current and Ultra- NDA Confidential
Low Output Ripple Buck Regulator
9.5 Buck VOUT Ripple vs Load Current
Figure 166: Buck VOUT = 1.8 V
Figure 17: Buck VOUT = 1.2 V
Figure 18: Buck VOUT = 0.9 V
Figure19: Buck VOUT = 0.7 V
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DA9232
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Low Output Ripple Buck Regulator
9.6 Buck VOUT vs Load Current
Figure 191: Buck VOUT = 1.2 V
Figure 180: Buck VOUT = 1.8 V
Figure 22: Buck VOUT = 0.9 V
Figure 23: Buck VOUT = 0.7 V
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Low Output Ripple Buck Regulator
9.7 Typical Mode Operation
Buck Vout
20mV/div
Buck Vout
20mV/div
SW
SW
2V/div
2V/div
100µs/div
5µs/div
Figure 204: Buck VIN = 3.6 V, Buck VOUT = 1.8 V,
Buck ILOAD = 1 mA
Figure 215: Buck VIN = 3.6 V, Buck VOUT = 1.8 V,
Buck ILOAD = 60 mA
Buck Vout
20mV/div
Buck Vout
20mV/div
SW
2V/div
SW
2V/div
500ns/div
500ns/div
Figure 226: Buck VIN = 3.6 V, Buck VOUT = 0.7 V,
Buck ILOAD = 1 mA
Figure 237: Buck VIN = 3.6 V, Buck VOUT = 0.7 V,
Buck ILOAD = 60 mA
Datasheet
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DA9232
High Efficiency, Ultra-Low Quiescent Current and Ultra- NDA Confidential
Low Output Ripple Buck Regulator
9.8 Buck Load Transient Response
Buck Vout
50mV/div
Buck Vout
50mV/div
ILoad
ILoad
100mA/div
100mA/div
SW
SW
2V/div
2V/div
10µs/div
10µs/div
Figure 248: Buck ILOAD = 0.5 mA to 60 mA to 0.5 mA
(0.1A/µs); Buck VIN = 3.6 V, Buck VOUT = 1.8 V
Figure 29: Buck ILOAD = 0.5 mA to 60 mA to 0.5 mA
(0.1A/µs); Buck VIN = 3.6 V, Buck VOUT = 0.7 V
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9.9 Buck Dynamic Voltage Control
SDA
2V/div
SDA
2V/div
Buck Vout
200mV/div
Buck Vout
200mV/div
SW
2V/div
SW
2V/div
5ms/div
5ms/div
Figure 250: Buck VOUT 0.6 V to 1.2 V;
Buck VIN = 3.6 V, Buck ILOAD = 60 mA
Figure 261: Buck VOUT 1.2 V to 0.6 V;
Buck VIN = 3.6 V, Buck ILOAD = 60 mA
SDA
2V/div
SDA
2V/div
Buck Vout
400mV/div
Buck Vout
400mV/div
SW
SW
2V/div
2V/div
5ms/div
5ms/div
Figure 272: Buck VOUT 1.3 V to 1.9 V;
Buck VIN = 3.6 V, Buck ILOAD = 60 mA
Figure 33: Buck VOUT 1.9 V to 1.3 V;
Buck VIN = 3.6 V, Buck ILOAD = 60 mA
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9.10 Device Enable and Start up
IC_EN
2V/div
IC_EN
2V/div
Buck Vout
1V/div
Buck Vout
1V/div
SW
SW
2V/div
2V/div
5ms/div
10µs/div
Figure 34: Device Enable:
Buck VIN = 3.6 V, Buck VOUT 1.8 V,
Buck ILOAD = 60 mA
Figure 35: VOUT ramp-up after Enabled
(Zoom-in of
Figure34)
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10 Feature Descriptions
10.1 Chip Enable and Disable Through IC_EN
DA9232 features a dedicated IC_EN pin to enable and disable the chip. When IC_EN = high, the
device is turned on. IC_EN voltage should not exceed VDD_SYS voltage on the device. When
EN = low, the device is shut down completely, including I2C communications.
10.2 VDD Under-Voltage Lockout
DA9232 features an under-voltage lockout (UVLO) on VDD. When VDD falls below UVLO falling
threshold, buck is disabled, see Section 10.3.9 for fault behaviour and control, A VIN_UV_Event will
be flagged if it is not masked. When VDD rises above the UVLO rising threshold, the device will be
alive. VDD should be always tied to VDD_SYS on the PCB board so both VDD and VDD_SYS will
share the same UVLO protection.
10.3 Buck Regulator
DA9232 includes a nano-ampere standby buck regulator with an adjustable output voltage, Dynamic
Voltage Scaling capability and a maximum load current of 60 mA. It also has power saving mode
operation and different protection features.
10.3.1 Buck Output Voltage Programmability
The DA9232 buck regulator can be set to two different ranges based on the value of
VOUT_RANGE_HI. The value of BUCK_VOUT<4:0> is locked to a certain range based on the value
of VOUT_RANGE_HI, and VOUT_RANGE_HI can only be changed while the buck is disabled. The
buck can be set to the output voltages shown in Table 11. If a command is received outside of the
allowable range (that is above 1.3 V for VOUT_RANGE_HI = 0 or below 1.3 V for
VOUT_RANGE_HI = 1), digital will force the value of BUCK_VOUT<3:0> to 01110 (1.3 V).
Table 11: Buck Output Voltage Settings
VOUT_RANGE_HI
BUCK_VOUT<4:0>
00000
Buck Output Voltage (V)
0
0
0
0
0
0
0
0
0
0
0.60
0.65
0.70
0.75
0.80
0.85
0.90
0.95
1.00
1.05
00001
00010
00011
00100
00101
00110
00111
01000
01001
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VOUT_RANGE_HI
BUCK_VOUT<4:0>
01010
01011
01100
01101
01110
01111
10000
10001
10010
10011
10100
10101
10110
10111
11000
11001
11010
11011
11100
11101
11110
11111
Buck Output Voltage (V)
0
1.10
1.15
1.20
1.25
1.30
1.35
1.40
1.45
1.50
1.55
1.60
1.65
1.70
1.75
1.80
1.85
1.90
1.90
1.90
1.90
1.90
1.90
0
0
0
0 or 1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
10.3.2 Start-up Operation
DA9232 buck integrates a start-up circuit to minimize output voltage over-shoot and input voltage
drop during start-up. When writing 1 to BUCK_EN (Bit 7 of Reg0x05), the buck is enabled and starts
switching after a typical delay time of 3 ms. During start-up, the cycle-by-cycle current limit is reduced
to limit inrush current.
10.3.3 Power Saving Mode Operation
DA9232 buck regulator features power saving mode that greatly reduces the quiescent current when
device has very light load condition. Buck regulator operates in discontinuous mode with Pulse
Frequency Modulation (PFM). The low-side FET will be turned off based on a zero-crossing
comparator to prevent negative inductor current flowing through the FET which can result in
additional conduction loss. If both FETs remain in the OFF state for a certain delay time after inductor
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current crosses zero, the device will enter power saving mode. In power saving mode, DA9232 shuts
down most of the internal circuitry to save current consumption. The lighter the load, the longer the
duration of power saving mode will be, to achieve the lowest quiescent current and improve light load
efficiency.
10.3.4 Dynamic Voltage Control
DA9232 buck regulator has dynamic voltage control (DVC) feature which allows the buck output
voltage to track the internal reference voltage when it changes at a rate of 50 mV/2 ms. Since the
buck output voltage can only be changed within an allowable range while still keeping the buck
enabled, DVC also follows the same behaviour. The DVC is done via I2C, whereby the buck output
voltage setting is stepped in 50 mV steps within either the low range or high range. Each voltage step
lasts for 2 ms.
10.3.5 Cycle-by-cycle Over-Current Protection
For the Over-current Protection (OCP) in DA9232, the peak current through high-side FET is
monitored cycle-by-cycle. When the sensed current exceeds the pre-set current limit, the high-side
FET will be turned OFF immediately to limit the inductor current. The high-side FET will be turned on
again after the constant-off time expires. If the OC condition persists for 64 µs, buck will be forced off
and buck output will be pull-down until the fault clears, see Section 10.3.9 for fault behavior and
control and Section 10.3.8 for output voltage discharge and control. An OC_BUCK_Event will be
flagged if it is not masked.
10.3.6 Output Over-Voltage Protection
DA9232 features an output over-voltage protection (OVP) to protect the load from damage. When
both IC_EN and BUCK_EN are high and the buck output voltage is 200 mV greater than the internal
reference voltage, the high side FET is immediately OFF, see Section 10.3.9 for fault behavior and
control. Then the internal buck output discharge FET will be turned on to discharge buck output
capacitor, see Section 10.3.8 for output voltage discharge and control. An OV_BUCK_Event will be
flagged if it is not masked. Buck will remain off and buck output will be pull-down until the fault is
cleared.
10.3.7 Output Under-Voltage Protection
When buck output short happens, inductor current will increase until the peak reaches the cycle-by-
cycle current limit. Then the high-side FET turns OFF and low-side FET turns on. Since buck output
is shorted, inductor current slope is very small during low-side FET on time. The inductor current
could gradually go higher and higher. To effectively prevent the inductor current running away at VOUT
short condition, buck VOUT is also monitored. If over-current condition happens and buck VOUT drops
400 mV below the reference voltage, the buck regulator will be shut off immediately and an
UV_BUCK_Event will be flagged if it is not masked, see Section 10.3.9 for fault behavior and control.
10.3.8 Automatic Output voltage Discharge
To speed up the discharging of buck output capacitor and ensure a safer start-up next time, the buck
regulator provides automatic output voltage discharge when IC_EN is pulled low or buck shutdown
caused by any fault. Automatic output discharge when buck is forced OFF by fault needs to set
register bit BUCK_PD_CFG1 = 0; automatic output discharge when buck is disabled by
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BUCK_EN = 0 needs to set register bit BUCK_PD_CFG2 = 0. The output of the buck regulator is
discharged through VBUCK_SNS pin and an internal buck output discharge FET with typical 33 Ω
resistance.
10.3.9 Event Flag and Fault Control
DA9232 has the flexibility for customers to control the behavior of buck when there is a fault
condition. There are five register bits (UVLO_FRC_DIS, OV_DIS_BUCK, OC_BUCK_EVENT,
SC_DIS_BUCK) controlling whether the buck will be disabled when the corresponding fault condition
happens. In addition, users can choose whether to mask or unmask the event flag when the fault
condition happens.
When there is a VDD Under-voltage condition, buck will be forced OFF if UVLO_FRC_DIS = 1. Buck
will remain alive if UVLO_FRC_DIS = 0. During the VDD Under-voltage condition, the event register
bit VIN_UV_EVENT = 1 if the corresponding mask register bit M_VIN_UV is set to 0 otherwise
VIN_UV_EVENT = 0.
When there is an over-voltage fault at buck output, buck will be forced OFF if OV_DIS_BUCK = 1.
Buck will continue switching if OV_DIS_BUCK = 0. During the fault, OV_BUCK_EVENT is set to 1 if
M_OV_BUCK_EVENT = 0 otherwise OV_BUCK_EVENT = 0.
When the over-current condition in buck persists for 64 µs and M_OC_BUCK_EVENT is set to 0,
OC_BUCK_EVENT will be set to 1. If OC_DIS_BUCK = 1, BUCK is forced disabled. If
OC_DIS_BUCK = 0, buck will continue switching during the over-current condition.
When there is a buck Output under-voltage condition and M_UV_BUCK_EVENT = 0,
UV_BUCK_EVENT is set to 1. If both buck output under-voltage and over-current condition exist and
SC_DIS_BUCK = 1, buck will be forced OFF. If SC_DIS_BUCK = 0, buck will continue switching
without shutting down by the under-voltage protection.
DA9232 also has a fault recovery mechanism that can be customized through the 3-bits
RCVRY_NUM. This value determines the fault recovery trial number for buck and is counted down
by every fault that triggers buck OFF. When RCVRY_NUM reaches 0, recovery trial is ended and
buck will remain OFF even if the buck enable signals are toggled HI. If RCVRY_NUM is set to 0x7,
there will be no count down on the recovery trial number and recovery trail will not be ended. Before
RCVRY_NUM reaches 0, buck will be recovered automatically if the fault condition disappears.
Event flags are not automatically cleared when the fault conditions disappear. They have to be
cleared by changing the values in register EVENT through I2C.
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10.4 I2C Programming
10.4.1 Interface Description
DA9232 includes an I2C compatible interface based on the following signals:
●
●
SCL: standard 400 kHz I2C bus serial clock generated by the Host processor
SDA: standard 400 kHz I2C bus serial address/data input output
SDA and SCL are open drain I/O terminals. The standard frequency of the I2C bus is 400 kHz in fast
mode or 100 kHz in slow mode.
SCL
Serial Interface
I2C
SDA
Figure 36: I2C Serial Interface Pins
The I2C bus is used to control most functions and change register values depending on the
application requirements. In active battery, the I2C circuitry is powered from the battery. The interface
maintains a proper operation as long as VDD_SYS is valid.
The device is compatible with the standard I2C protocol but only operates as a slave. The transfer
protocol is the same whether operating in fast or slow mode.
10.4.2 Details of the I2C Protocol
The device supports 7-bit addressing only, the address is 0x2F. The 8-bit shifted address is 0x5E.
A timer runs during I2C transitions. If the timer expires while SDA is held low, all additional
commands are ignored and the I2C state machine is reset. The timer is reset with a START condition
and stopped with a STOP condition.
The I2C bus is monitored at all times for a valid SLAVE address, and an acknowledge bit is
generated if the SLAVE address was true.
●
●
●
A START condition is initiated by a high to low transition on the SDA line while the SCL is in the
high state.
A STOP condition is indicated by a low to high transition on the SDA line while the SCL is in the
high state.
An ACKNOWLEDGE is indicated by the receiver pulling the SDA line low during the following
clock cycle.
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SDA
SCL
Data SDA must be stable
during high part of clock
Start(S ) is SDA falling while
SCL high
Stop (P ) is SDA rising while
SCL high
Data sampled on SCL
rising edge and driven on
SCL falling edge
SCL
Figure 37: I2C Start and Stop Conditions
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When the address is matching the following event sequence happens:
1. The device generates an ACKNOWLEDGE to indicate to the master that the communication link
has been established
2. The master generates SCL clock cycles to transmit or receive data
3. After receiving data, an ACKNOWLEDGE is generated either by the device or the master
(whichever is transmitting the data)
A data sequence is 9-bit, consisting of 8-bit data and 1-bit ACKNOWLEDGE. It can be repeated
as long as necessary.
4. The master generates a STOP condition to end the data transfer
The bus returns to IDLE-mode if during a message a new START or STOP condition occurs. Data is
transmitted MSB first for both R/W operations.
10.5 GPO Pin Function Programming
DA9232 has a General-purpose output (GPO) pin which can be programmed to have multiple
functions.
10.5.1 Power Good Indicator
When GPO pin is configured to the VDD power good indicator, it is an open drain output and can be
configured to either active high or active low. When GPO status is Hi-Z, an external pull-up is
required for GPO to be high.
Table 12: GPO as Power Good Indicator
GPO Configuration
VIN > VIN_UVLO
GPO Status
No
Yes
No
0
Active High
Hi-Z
Hi-Z
0
Active Low
Yes
10.5.2 Event Indicator
GPO pin can also be configured as the event indicator in open drain output. Whenever there is an
event or multiple events (VIN_UV_EVNT or OV_BUCK_EVENT or OC_BUCK_EVENT or
UV_BUCK_EVENT) happen, GPO will be pulled down Low. This can be used as an interrupt to host
CPU to inform events happened. When there is no event, GPO will remain in Hi-Z status and an
external pull-up is required for GPO to be high.
10.5.3 Reset Pulse Generation
GPO pin can be configured to generate a reset pulse signal when buck starts. The reset signal can
be used by host CPU or other device that are connected to buck output. When GPO is Low, it
indicates a reset pulse period; when GPO is in Hi-Z status (An external pull-up is required for GPO to
be high), it indicates a non-reset period.
There is also a timing control to negate the reset pulse signal. The GPO reset pulse width can be
adjusted between 8 and 112 ms measured from written 1 to BUCK_EN register bit.
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10.5.4 Always Pull-Down or Hi-Z
When GPO pin is not used, it can be configured to either always Hi-Z or pull-down to Low.
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11 Register Overview
11.1 Register Map
11.1.1 Buck Control
Table 13: Event/Status/Mask and User Registers
User Registers
Register
Addr
7
6
5
4
3
2
1
0
Reserve
d
EVENT
0x0000 Reserved
0x0002 Reserved
0x0003 Reserved
VIN_UV_EVENT Reserved
OC_BUCK_EVENT
OV_BUCK_EVENT
UV_BUCK_EVENT
Reserved
Reserve BUCK_EN_STA
d
STATUS
VIN_UV_STAT
M_VIN_UV
Reserved
Reserved
OC_BUCK_STAT
OV_BUCK_STAT
UV_BUCK_STAT
T
M_OC_BUCK_EVEN M_OV_BUCK_EVEN M_UV_BUCK_EVEN Reserve
MASK
GPO
Reserved
T
T
T
d
0x0004 GPO_RST_CTRL<3:0>
VOUT_RANGE_H
GPO_CTRL<3:0>
BUCK
0x0005 BUCK_EN
Reserved
BUCK_VOUT<4:0>
BUCK_PD_CFG1
I
BUCK_PD_CFG
2
BUCK_CFG 0x0006 Reserved
Reserved
Reserved
Reserved
SEL_BUCK_ILIM<1:0>
SC_DIS_BUC
K
FAULT_CTL 0x0008
PIN_MONTO 0x000
OC_DIS_BUCK
Reserved
OV_DIS_BUCK TSD_FRC_DIS
UVLO_FRC_DIS
Reserved
RCVRY_NUM<2:0>
Reserved
Reserve
Reserved
Reserved
Reserved
GPO_OUT_MON
d
R
A
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11.1.2 System Module
Table 14: System Reset Registers
User Registers
Register
SYS_RST_EVENT 0x0001 Reserved
SYS_SRST 0x0009 Reserved
Addr
7
6
5
4
3
2
1
0
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
SRST<3:0>
Reserved
Reserved
RESET_EVENT
SYS_DEVICE_ID 0x0080 DEV_ID<7:0>
SYS_VARIANT_ID 0x0081 MRC<3:0>
VRC<3:0>
SYS_CONFIG_ID 0x0082 CONFIG_REV<7:0>
11.2 Register Definitions
11.2.1 Buck Control
11.2.1.1
Event/Status/Mask Registers
Table 15: Register EVENT
Address
0x0000
7
Register Name
POR Value
0x00
Event flag
EVENT
6
5
4
3
2
1
0
Reserved
VIN_UV_EVENT
Reserved
OC_BUCK_EVENT OV_BUCK_EVENT UV_BUCK_EVENT Reserved
Reserved
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Field Name
Bits
Type
POR
Description
Under Voltage on VDD event flag. When Under Voltage (UVLO) condition is detected, this bit is set
to 1. When I2C writes '1' to this bit, the event flag is cleared.
VIN_UV_EVENT
[6]
evnt
0x0
Over Current on BUCK OUT event flag. When the buck Over Current condition is detected (when
BUCK_EN==1 && M_OC_BUCK==0), this bit is set to 1. When I2C writes '1' to this bit, the event flag
is cleared.
OC_BUCK_EVENT
OV_BUCK_EVENT
UV_BUCK_EVENT
[4]
[3]
[2]
evnt
evnt
evnt
0x0
0x0
0x0
Over Voltage on BUCK OUT event flag. When the buck Over Voltage condition is detected (when
BUCK_EN==1 && M_OV_BUCK==0), this bit is set to 1. When I2C writes '1' to this bit, the event flag
is cleared.
Under voltage on BUCK OUT event flag. When the under voltage condition (i.e. short circuit) is
detected on the buck (when BUCK_EN==1 && M_UV_BUCK==0), this bit is set to 1. When I2C
writes '1' to this bit, this event flag is cleared.
Table 16: Register STATUS
Address
Register Name
POR Value
0x00
Status
0x0002
STATUS
7
6
5
4
3
2
1
0
Reserved
VIN_UV_STAT
Reserved
Type
OC_BUCK_STAT
Description
OV_BUCK_STAT
UV_BUCK_STAT
Reserved
BUCK_EN_STAT
Field Name
VIN_UV_STAT
OC_BUCK_STAT
OV_BUCK_STAT
Bits
[6]
POR
0x0
0x0
0x0
virtual
virtual
virtual
Indicate present VIN under-voltage status.
[4]
Indicate present BUCK VOUT over current status.
Indicate present BUCK VOUT over voltage status.
[3]
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Field Name
Bits
Type
POR
Description
UV_BUCK_STAT
[2]
virtual
0x0
Indicate present BUCK VOUT under voltage status.
Indicate present Buck Enable status.
1:Buck enabled
BUCK_EN_STAT
[0]
virtual
0x0
0:Buck disabled
Table 17: Register MASK
Address
0x0003
Register Name
POR Value
Mask
MASK
6
0x7C
7
5
4
3
2
1
0
Reserved
Field Name
M_VIN_UV
M_VIN_UV
Reserved
M_OC_BUCK_EVENTM_OV_BUCK_EVENT M_UV_BUCK_EVENT Reserved
Type POR Description
Reserved
Bits
[6]
cfg OTP 0x1
cfg OTP 0x1
cfg OTP 0x1
cfg OTP 0x1
Mask to set VIN_UV_EVNT. VIN_UV_STAT is updated regardless of this mask.
Masks to set OC_BUCK_EVENT. OC_BUCK_STAT is updated regardless of this mask.
Masks to set OV_BUCK_EVENT. OV_BUCK_STAT is updated regardless of this mask.
Masks to set UV_BUCK_EVENT. UV_BUCK_STAT is updated regardless of this mask.
M_OC_BUCK_EVENT
M_OV_BUCK_EVENT
M_UV_BUCK_EVENT
[4]
[3]
[2]
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11.2.1.2
User Registers
Table 18: Register GPO
Address
0x0004
7
Register Name
POR Value
GPO control
GPO
0x00
6
5
4
3
2
1
0
GPO_RST_CTRL<3:0>
GPO_CTRL<3:0>
Field Name
Bits
Type
POR
Description
Reset pulse signal nagate timing control
Value
0x0
0x1
0x2
0x3
0x4
0x5
0x6
0x7
Description
8ms after BUCK_EN = 1, GPO reset pulse is negated.
16ms after BUCK_EN = 1, GPO reset pulse is negated.
32ms after BUCK_EN = 1, GPO reset pulse is negated.
48ms after BUCK_EN = 1, GPO reset pulse is negated.
64ms after BUCK_EN = 1, GPO reset pulse is negated.
80ms after BUCK_EN = 1, GPO reset pulse is negated.
96ms after BUCK_EN = 1, GPO reset pulse is negated.
112ms after BUCK_EN = 1, GPO reset pulse is negated.
GPO_RST_CTRL
[7:4]
cfg OTP 0x0
GPO Control
GPO_CTRL
[3:0]
cfg OTP 0x0
Value
Description
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Field Name
Bits
Type
POR
Description
0x1
0x2
0x3
0x4
0x8
0x9
Reset Pulse generation output
PowerGood indicator, Active Low
PowerGood indicator, Active High
Event indicator
Force GPO output low
Force GPO output hi-z
Table 19: Register BUCK
Address
0x0005
Register Name
POR Value
Buck enable & vout control
BUCK
0x58
7
6
5
4
3
2
1
0
BUCK_EN
Field Name
BUCK_EN
VOUT_RANGE_HI Reserved
BUCK_VOUT<4:0>
Bits
Type
POR
Description
[7]
cfg OTP 0x0
cfg OTP 0x1
datablk
BUCK enable
Range selection for buck. This can only be changed while BUCK_EN = 0
Value
0x0
Description
VOUT_RANGE_HI
[6]
0.60 V <= VBUCK <= 1.30 V
1.30 V <= VBUCK <= 1.90 V
0x1
BUCK_VOUT
[4:0]
0x18
Buck output voltage
OTP
Datasheet
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DA9232
High Efficiency, Ultra-Low Quiescent Current and Ultra- NDA Confidential
Low Output Ripple Buck Regulator
Value
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0A
0x0B
0x0C
0x0D
0x0E
0x0F
0x10
0x11
0x12
Description
0.60 V
0.65 V
0.70 V
0.75 V
0.80 V
0.85 V
0.90 V
0.95 V
1.00 V
1.05 V
1.10 V
1.15 V
1.20 V
1.25 V
1.30 V
1.35 V
1.40 V
1.45 V
1.50 V
Datasheet
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DA9232
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Low Output Ripple Buck Regulator
Field Name
Bits
Type
POR
Description
0x13
0x14
0x15
0x16
0x17
0x18
0x19
0x1A
0x1B
0x1C
0x1D
0x1E
0x1F
1.55 V
1.60 V
1.65 V
1.70 V
1.75 V
1.80 V
1.85 V
1.90 V
1.90 V
1.90 V
1.90 V
1.90 V
1.90 V
Table 20: Register BUCK_CFG
Address
0x0006
7
Register Name
BUCK_CFG
6
POR Value
Buck config
0x00
5
4
3
2
1
0
Reserved
Reserved
BUCK_PD_CFG2
BUCK_PD_CFG1
Reserved
Reserved
SEL_BUCK_ILIM<1:0>
Datasheet
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Low Output Ripple Buck Regulator
Field Name
Bits
[5]
Type
POR
Description
BUCK_PD_CFG2
BUCK_PD_CFG1
cfg OTP 0x0
cfg OTP 0x0
0: If BUCK_EN = 0, BUCK_PD_EN = 1 1: If BUCK_EN = 0, BUCK_PD_EN = 0
0: When BUCK is forced off by faults, BUCK_PD_EN = 1 1: When BUCK is forced off by faults, BUCK_PD_EN = 0
Buck peak current limit setting
[4]
Value
0x0
Description
Default current limit
Default +50mA
Default +100mA
Default +150mA
SEL_BUCK_ILIM
[1:0]
cfg OTP 0x0
0x1
0x2
0x3
Table 21: Register FAUL_CTL
Address
Register Name
POR Value
Fault & Recovery control
0x0008
FAULT_CTL
6
0x1F
7
5
4
3
2
1
0
SC_DIS_BUCK
Field Name
SC_DIS_BUCK
OC_DIS_BUCK
OV_DIS_BUCK
OC_DIS_BUCK
OV_DIS_BUCK
TSD_FRC_DIS
UVLO_FRC_DIS
RCVRY_NUM<2:0>
Bits
[7]
Type
POR
Description
cfg OTP 0x0
1: Force disable BUCK during SHORT CIRCUIT condition oc_buck=1 & uv_buck=1
1: Force disable BUCK during oc_buck=1 for over 64 cycles
1: Force disable BUCK during ov_buck=1
[6]
cfg OTP 0x0
cfg OTP 0x0
[5]
1: Force disable BUCK
during Over Temp
TSD_FRC_DIS
[4]
cfg OTP 0x1
Datasheet
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Low Output Ripple Buck Regulator
Field Name
Bits
Type
POR
Description
1: Force disable BUCK
during UVLO
UVLO_FRC_DIS
[3]
cfg OTP 0x1
data
0x7
BUCK recovery trial fault number. This is counted down by every fault forcing BUCK off. If RCVRY_NUM becomes 0,
Recovery trial is ended. If RCVRY_NUM is set 0x7, this is not counted down and recovery trail is not ended.
RCVRY_NUM
[2:0]
OTP
Table 22: Register PIN_MONITOR
Address
0x000A
Register Name
PIN_MONTOR
6
POR Value
PIN MONITOR
0x00
7
5
4
3
2
1
0
Reserved
Field Name
GPO_OUT_MON
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
GPO_OUT_MON
Bits
Type
POR
Description
Indicate current GPO output
[0]
virtual 0x0
11.2.2 System Module
11.2.2.1
System Reset Registers
Table 23: Register SYS_RST_EVENT
Address
0x0001
7
Register Name
POR Value
Reset Event flag
SYS_RST_EVENT 0x01
6
5
4
3
2
1
0
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
RESET_EVENT
Datasheet
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Low Output Ripple Buck Regulator
Field Name
Bits
Type
POR
Description
RESET_EVENT
[0]
evnt
0x1
RESET event flag. After Reset, this bit is set. When I2C write '1' to this bit, this event flag is cleared.
Table 24: Register SYS_SRST
Address
0x0009
7
Register Name
SYS_SRST
6
POR Value
0x00
Soft Reset
5
4
3
2
1
0
Reserved
Field Name
SRST
Reserved
Reserved
Reserved
SRST<3:0>
Bits
Type
cfg
POR
Description
[3:0]
0x0
Initiate Soft Reset by writing 0x5.
11.2.2.2
System ID Registers
Table 25: Register SYS_DEVICE_ID
Address
0x0080
Register Name
POR Value
DEVICE_ID
SYS_DEVICE_ID 0x00
7
6
5
4
3
2
1
0
DEV_ID<7:0>
Field Name
DEV_ID
Bits
Type
POR
Description
[7:0]
virtual 0x0
Device ID; hard-coded or metal-programmed
Datasheet
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Low Output Ripple Buck Regulator
Table 26: Register SYS_VARIANT_ID
Address
0x0081
7
Register Name
POR Value
VARIANT_ID
SYS_VARIANT_ID 0x00
6
5
4
3
2
1
0
MRC<3:0>
Field Name
MRC
VRC<3:0>
Bits
Type
POR
Description
[7:4]
virtual 0x0
Mask Revision Code; mask design changes increment reset value.
Chip Variant Code; e.g. package variants.
trim
0x0
VRC
[3:0]
OTP
Table 27: Register SYS_CONFIG_ID
Address
0x0082
Register Name
POR Value
0x00
CONFIG_ID
SYS_CONFIG_ID
7
6
5
4
3
2
1
0
CONFIG_REV<7:0>
Field Name
Bits
Type
POR
Description
OTP settings revision
trim
OTP
CONFIG_REV
[7:0]
0x0
Datasheet
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12 Package Information
12.1 Package Outlines
Figure 38: Package Outline Drawing
Datasheet
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12.2 Moisture Sensitivity Level
The Moisture Sensitivity Level (MSL) is an indicator for the maximum allowable time period (floor
lifetime) in which a moisture sensitive plastic device, once removed from the dry bag, can be
exposed to an environment with a maximum temperature of 30 °C and a maximum relative humidity
of 60% RH before the solder reflow process. The MSL classification is defined in Table 28.
The device package is qualified for MSL 1.
Table 28: MSL Classification
MSL level
Floor Lifetime
MSL 1
unlimited at 30 °C/85% RH
12.3 Soldering Information
Refer to the JEDEC standard J-STD-020 for relevant soldering information. This document can be
downloaded from http://www.jedec.org.
Datasheet
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13 Ordering Information
The ordering number consists of the part number followed by a suffix indicating the packing method.
For details and availability or other custom OTP parts, please consult Dialog Semiconductor’s
customer portal or your local sales representative.
Table 29: Ordering Information
Part number
Package
Size (mm)
Shipment Form
Pack Quantity
DA9232 -xxxx
WLCSP-12
1.3 x 1.7
T&R
4500
Table 30: OTP List
Order code
Description
Buck VOUT
DA9232-81VZ2
DA9232-82VZ2
OTP with buck voltage preconfigured
OTP with buck voltage preconfigured
1.8 V
0.7 V
Datasheet
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Low Output Ripple Buck Regulator
Status Definitions
Revision Datasheet Status
Product Status
Definition
This datasheet contains the design specifications for product
development. Specifications may be changed in any manner
without notice.
1.<n>
2.<n>
Target
Development
This datasheet contains the specifications and preliminary
characterization data for products in pre-production. Specifications
may be changed at any time without notice in order to improve the
design.
Preliminary
Qualification
This datasheet contains the final specifications for products in
volume production. The specifications may be changed at any
time in order to improve the design, manufacturing and supply.
Relevant changes will be communicated via Customer Product
Notifications.
3.<n>
Final
Production
Archived
This datasheet contains the specifications for discontinued
products. The information is provided for reference only.
4.<n>
Obsolete
Disclaimer
Information in this document is believed to be accurate and reliable. However, Dialog Semiconductor does not give any
representations or warranties, expressed or implied, as to the accuracy or completeness of such information. Dialog
Semiconductor furthermore takes no responsibility whatsoever for the content in this document if provided by any information
source outside of Dialog Semiconductor.
Dialog Semiconductor reserves the right to change without notice the information published in this document, including without
limitation the specification and the design of the related semiconductor products, software and applications.
Applications, software, and semiconductor products described in this document are for illustrative purposes only. Dialog
Semiconductor makes no representation or warranty that such applications, software and semiconductor products will be
suitable for the specified use without further testing or modification. Unless otherwise agreed in writing, such testing or
modification is the sole responsibility of the customer and Dialog Semiconductor excludes all liability in this respect.
Customer notes that nothing in this document may be construed as a license for customer to use the Dialog Semiconductor
products, software and applications referred to in this document. Such license must be separately sought by customer with
Dialog Semiconductor.
All use of Dialog Semiconductor products, software and applications referred to in this document are subject to Dialog
Semiconductor’s Standard Terms and Conditions of Sale, unless otherwise stated.
© Dialog Semiconductor. All rights reserved.
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Dialog Semiconductor’s statement on RoHS can be found on the customer portal https://support.diasemi.com/. RoHS
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DA9232
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Low Output Ripple Buck Regulator
Dialog Semiconductor GmbH
Dialog Semiconductor K. K.
Dialog Semiconductor Hong Kong
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Phone: +49 7021 805-0
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