PI6C10806BLEX [DIODES]
Clock Generator, 160MHz, CMOS, PDSO16, TSSOP-16;
| 型号： | PI6C10806BLEX |
| 厂家： | 
DIODES INCORPORATED |
| 描述： | Clock Generator, 160MHz, CMOS, PDSO16, TSSOP-16 时钟 光电二极管 外围集成电路 晶体 |
| 文件： | 总13页 (文件大小：689K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PI6C10806B
1.8V/2.5V/3.3V, 100MHz, Low Skew 1:6 Crystal to LVCMOS Clock Buffer
Features
Description
• Six low skew outputs: < 80ps
Pericom Semiconductor’s PI6C10806B is a low skew six output
crystal oscillator driver. Crystal oscillator input range is from
10MHz to 50MHz. If XTAL_IN is driven with a signal source,
then the input frequency can be as high as 100MHz. PI6C10806B,
the outputs are configured into 2 groups: a five output and a single
output; each with independent output enable.
• Crystal oscillator input: 10MHz to 50MHz
• Switching frequency up to 100 MHz
• Fast output rise/fall time: < 800ps
• Synchronous output enables
• Industrial Temperature range: –40°C to +85°C
• 1.8V, 2.5V and 3.3V operation
– Mixed 3.3V core/2.5V output, 3.3V core/1.8V output, and
2.5V core/1.8V output operating voltages
• Packaging (Pb-free & Green available):
– 16-pin 173-mil wide TSSOP (L)
PI6C10806Bhasawiderangeofoperatingvoltages:1.8V,2.5V,and
3.3V. This feature paired with the low output-to-output and part-to-
part skew makes the device ideal for low voltage, low power, high
frequency single ended applications; such as networking
Block Diagram
Pin Configuration
5
XTAL_IN
XTAL_OUT
ENABLE2
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
XTAL_IN
ENABLE1
BCLK5
BCLK[0:4]
BCLK5
XTAL_OUT
ENABLE1
Sync
Sync
V
BCLK0
DDO
BCLK4
GND
V
DDO
BCLK1
GND
BCLK3
ENABLE2
BCLK2
V
DD
(1)
Pin Description
Truth Table
Pin Name
Description
Inputs
Outputs
BCLK[0:4]
ENABLE1
ENABLE2
BCLK5
L
ENABLE1,
ENABLE2
Active High Output Enable Inputs
L
L
L
H
L
L
XTAL_IN
XTAL_OUT
BCLK[0:5]
GND
Crystal interface
Crystal interface
Clock Outputs
Ground
L
Switching
L
H
H
Switching
Switching
H
Switching
Note:
1.
H = High Voltage Level, L = Low Voltage Level
V
DD
Core Power
V
Output Power
DDO
PS9038C
06/29/10
10-0151
1
PI6C10806B
1.8V/2.5V/3.3V, 100MHz, Low Skew 1:6 Crystal to LVCMOS Clock Buffer
Power Supply DC Characteristics (VDD/VDDO = 3.3V ± 5%, T = -40°C to 85°C)
A
Symbols
Parameters
Test Conditions
Min.
3.135
3.135
Typ
3.3
Max.
3.465
3.465
10
Units
V
V
V
Core Supply Voltage
DD
Output Supply Voltage
Power Supply Current
Output Supply Current
3.3
V
DDO
I
ENABLE1:2 = '00'
ENABLE1:2 = '00'
mA
mA
DD
DDO
I
5
Power Supply DC Characteristics (VDD/VDDO = 2.5V ± 5%, T = -40°C to 85°C)
A
Symbols
Parameters
Test Conditions
Min.
2.375
2.375
Typ
2.5
Max.
2.625
2.625
8
Units
V
V
V
Core Supply Voltage
DD
Output Supply Voltage
Power Supply Current
Output Supply Current
2.5
V
DDO
I
ENABLE1:2 = '00'
ENABLE1:2 = '00'
mA
mA
DD
DDO
I
4
Power Supply DC Characteristics (VDD/VDDO = 1.8V ± 0.2V, T = -40°C to 85°C)
A
Symbols
Parameters
Test Conditions
Min.
Typ
1.8
Max.
2.0
2.0
5
Units
V
V
V
Core Supply Voltage
1.6
DD
Output Supply Voltage
Power Supply Current
Output Supply Current
1.6
1.8
V
DDO
I
ENABLE1:2 = '00'
ENABLE1:2 = '00'
mA
mA
DD
DDO
I
3
Power Supply DC Characteristics (VDD = 3.3V ± 5%, VDDO = 2.5V ± 5%, T = -40°C to 85°C)
A
Symbols
Parameters
Test Conditions
Min.
3.135
2.375
Typ
Max.
3.465
2.625
10
Units
V
V
V
Core Supply Voltage
3.3
DD
Output Supply Voltage
Power Supply Current
Output Supply Current
2.5
V
DDO
I
ENABLE1:2 = '00'
ENABLE1:2 = '00'
mA
mA
DD
DDO
I
4
Power Supply DC Characteristics (VDD = 3.3V ± 5%, VDDO = 1.8V ± 0.2V, T = -40°C to 85°C)
A
Symbols
Parameters
Test Conditions
Min.
3.135
1.6
Typ
Max.
3.465
2.0
Units
V
V
V
Core Supply Voltage
3.3
DD
Output Supply Voltage
Power Supply Current
Output Supply Current
1.8
V
DDO
I
ENABLE1:2 = '00'
ENABLE1:2 = '00'
10
mA
mA
DD
DDO
I
3
PS9038C
06/29/10
10-0151
2
PI6C10806B
1.8V/2.5V/3.3V, 100MHz, Low Skew 1:6 Crystal to LVCMOS Clock Buffer
Power Supply DC Characteristics (VDD = 2.5V ± 5%, VDDO = 1.8V ± 0.2V, T = -40°C to 85°C)
A
Symbols
Parameters
Test Conditions
Min.
2.375
1.6
Typ
Max.
2.625
2.0
8
Units
V
V
V
Core Supply Voltage
2.5
DD
Output Supply Voltage
Power Supply Current
Output Supply Current
1.8
V
DDO
I
ENABLE1:2 = '00'
ENABLE1:2 = '00'
mA
mA
DD
DDO
I
3
I/O DC Characteristics (T = -40°C to 85°C)
A
Symbols
Parameters
Test Conditions
Min.
2
Typ
Max.
Units
V
V
V
V
V
V
V
V
V
= 3.3V ± 5%
= 2.5V ± 5%
= 1.8V ± 0.2V
= 3.3V ± 5%
= 2.5V ± 5%
= 1.8V ± 0.2V
V
V
V
+ 0.3
+ 0.3
+ 0.3
DD
DDO
DDO
DDO
ENABLE 1,
Input High
V
1.7
V
IH
IL
DD
Voltage
ENABLE 2
1.65* V
-0.3
V
DD
DDO
0.8
0.7
V
DD
ENABLE 1,
Input Low
V
-0.3
V
DD
Voltage
ENABLE 2
-0.3
0.35* V
V
DD
DDO
(1)
(1)
= 3.3V ± 5%
2.6
V
DDO
= 2.5V ± 5%;
DDO
2
V
V
V
V
V
V
V
I
= -1mA
OH
V
Output High Voltage
Output Low Voltage
OH
V
= 2.5V ± 5%
= 1.8V ±
1.8
DDO
V
DDO
V
- 0.3
DDO
(1)
0.2V
(1)
V
V
I
= 3.3V ± 5%
0.5
DD
= 2.5V ± 5%;
DDO
0.4
= -1mA
OH
V
OL
(1)
V
V
= 2.5V ± 5%
0.45
DDO
= 1.8V ± 0.2V
DDO
0.35
(1)
Notes:
1. For Max. or Min. conditions, use appropriate operating VDD and TA values.
PS9038C
06/29/10
10-0151
3
PI6C10806B
1.8V/2.5V/3.3V, 100MHz, Low Skew 1:6 Crystal to LVCMOS Clock Buffer
3.3V Absolute Maximum Ratings (Above which the useful life may be impaired. For user guidelines only, not tested.)
Note:
Storage Temperature...........................................................–65°C to +150°C
Voltage...............................................................–0.5V to +3.6V
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the
device. This is a stress rating only and functional operation
of the device at these or any other conditions above those
indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating condi-
tions for extended periods may affect reliability.
V
V
DD, DDO
Output Voltage (max. 4.6V) .......................................... –0.5V to V +0.5V
DD
Input Voltage (max 4.6V).............................................. –0.5V to V +0.5V
DD
3.3V I/O DC Characteristics (Over Operating Range: V = 3.3V ± 5%, T = -40° to 85°C)
DD
A
(1)
(2)
Parameters
Description
I/O Supply Voltage
Input HIGH Voltage
Input LOW Voltage
Test Conditions
Min.
3.135
2
Typ.
Max.
Units
V
DDO
3.3
3.465
V
Logic HIGH level
Logic LOW level
V
+0.3
IH
DD
V
V
IL
-0.3
2
1.3
I
OH
I
OH
I
OL
I
OL
= -1mA
= -8mA
= 1mA
= 8mA
V
OH
Output High Voltage
Output LOW Voltage
V
V
= Min., V = V or V
IN IH IL
DDO
2
V
0.4
0.4
V
OL
= Min., V = V or V
IN IH IL
DDO
Notes:
1. For Max. or Min. conditions, use appropriate operating range values.
2. Typical values are at VDD =3.3V, +25°C ambient and maximum loading.
3.3V I/O AC Characteristics (Over Operating Range: V /V
= 3.3V ± 5%, T = -40° to 85°C)
DD DDO
A
(1)
Parameters
Description
Test Conditions
Min.
10
Typ
Max.
50
Units
Using Crystal
f
Output Frequency
MHz
OUT
(2)
External Clock
@ V /2
0
100
53
t
Output Duty Cycle
47
%
DC
DDO
t /t
R F
CLKn Rise/Fall Time
20% to 80%
150
800
ps
25MHz @ Integration
Range
RMS
Random RMS Phase Jitter
0.098
ps
100Hz - 1MHz
Output to Output Skew between any two
outputs of the same device @ same transition
(3)
t
t
@V
@V
/2
/2
80
ps
SK(O)
DDO
( 4)
DIS, EN
t
Output Enable/Disable
4
cycles
DDO
Notes:
1. Unless noted otherwise, all parameters are tested with xtal @ f <= Fxtal_max,; outputs are terminated @ 50Ω to V
2. External clock source is driving XTAL_IN input
/2, see waveforms.
DDO
3. Identical conditions: loading, transitions, supply voltage, temperature, package type and speed grade.
4. These parameters are guaranteed, but not tested. Max delay is 4 cycles. Min. setup time = 3ns.
PS9038C
06/29/10
10-0151
4
PI6C10806B
1.8V/2.5V/3.3V, 100MHz, Low Skew 1:6 Crystal to LVCMOS Clock Buffer
2.5V Absolute Maximum Ratings (Above which the useful life may be impaired. For user guidelines only, not tested.)
Note:
Storage Temperature...........................................................–65°C to +150°C
Voltage...............................................................–0.5V to +3.6V
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the
device. This is a stress rating only and functional operation
of the device at these or any other conditions above those
indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating condi-
tions for extended periods may affect reliability.
V
V
DD, DDO
Output Voltage (max. 3.6V) .......................................... –0.5V to V +0.5V
DD
Input Voltage (max 3.6V).............................................. –0.5V to V +0.5V
DD
2.5V I/O DC Characteristics (Over Operating Range: V = 2.5V ± 5%, T = -40° to 85°C)
DD
A
(1)
(2)
Parameters
Description
I/O Supply Voltage
Input HIGH Voltage
Input LOW Voltage
Test Conditions
Min.
2.375
1.7
-0.3
2
Typ.
Max.
Units
V
DDO
2.5
2.625
V
Logic HIGH level
Logic LOW level
V
+0.3
IH
DD
V
V
IL
0.7
I
OH
I
OH
I
OL
I
OL
= -1mA
= -8mA
= 1mA
= 8mA
V
OH
Output High Voltage
Output LOW Voltage
V
V
= Min., V = V or V
IN IH IL
DDO
2
V
0.4
0.4
V
OL
= Min., V = V or V
IN IH IL
DDO
Notes:
1. For Max. or Min. conditions, use appropriate operating range values.
2. Typical values are at VDD =3.3V, +25°C ambient and maximum loading.
2.5V I/O AC Characteristics (Over Operating Range: V /V
= 2.5V ± 5%, T = -40° to 85°C)
DD DDO
A
(1)
Parameters
Description
Test Conditions
Min.
10
Typ
Max.
50
Units
Using Crystal
f
Output Frequency
MHz
OUT
(2)
External Clock
@ V /2
0
100
55
t
Output Duty Cycle
47
%
DC
DDO
t /t
R F
CLKn Rise/Fall Time
20% to 80%
150
800
ps
25MHz @ Integration
Range
RMS
Random RMS Phase Jitter
0.112
ps
100Hz - 1MHz
Output to Output Skew between any two
outputs of the same device @ same transition
(3)
t
t
@V
@V
/2
/2
80
ps
SK(O)
DDO
( 4)
DIS, EN
t
Output Enable/Disable
4
cycles
DDO
Notes:
1. Unless noted otherwise, all parameters are tested with xtal @ f <= Fxtal_max,; outputs are terminated @ 50Ω to V
2. External clock source is driving XTAL_IN input
/2, see waveforms.
DDO
3. Identical conditions: loading, transitions, supply voltage, temperature, package type and speed grade.
4. These parameters are guaranteed, but not tested. Max delay is 4 cycles. Min. setup time = 3ns.
PS9038C
06/29/10
10-0151
5
PI6C10806B
1.8V/2.5V/3.3V, 100MHz, Low Skew 1:6 Crystal to LVCMOS Clock Buffer
1.8V Absolute Maximum Ratings (Above which the useful life may be impaired. For user guidelines only, not tested.)
Note:
Storage Temperature...........................................................–65°C to +150°C
,V Voltage................................................................–0.5V to +2.5V
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the
device. This is a stress rating only and functional operation
of the device at these or any other conditions above those
indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating condi-
tions for extended periods may affect reliability.
V
DDO DD
Output Voltage (max 2.5V) .......................................... –0.5V to V +0.5V
DD
Input Voltage (max 2.5V) ............................................. –0.5V to V +0.5V
DD
1.8V I/O DC Characteristics (Over Operating Range: V
= 1.8V ± 0.2V, T = -40° to 85°C)
DDO
A
(1)
(2)
Parameters Description
Test Conditions
Min.
Typ.
Max.
Units
V
V
I/O Supply Voltage
Input HIGH Voltage
Input LOW Voltage
Input Current
1.6
1.8
2.0
DDO
V
Logic HIGH level
Logic LOW level
0.65*V
-0.3
V
+0.3
DD
IH
DD
V
0.35*V
IL
L
DD
I
V
DD
= Max, V = V or GND I pin
15
µA
IN
DD
I
OH
I
OH
I
OL
I
OL
= -2mA
= -8mA
= 2mA
= 8mA
1.2
1.2
V
Output High Voltage
Output Low Voltage
V
= Min., V = V or V
IN IH IL
OH
DD
V
0.35
0.35
V
V
= Min., V = V or V
OL
DD IN IH IL
Notes:
1. For Max. or Min. conditions, use appropriate operating VDD and Ta values.
2. Typical values are at VDD = 1.8V, +25°C ambient and maximum loading.
1.8V I/O AC Characteristics (Over Operating Range: V / V
= 1.8V ± 0.2V, T = -40° to 85°C)
DD
DDO
A
(1)
Parameters
Description
Test Conditions
Min.
10
Typ
Max.
50
Units
MHz
%
Using Crystal
f
Output Frequency
OUT
(2)
External Clock
@ V /2
0
100
55
t
Output Duty Cycle
47
DC
DDO
25MHz @ Integration
0.096
@1.8V
Range
RMS
t /t
Random RMS Phase Jitter
ps
100Hz - 1MHz
20% to 80%
CLKn Rise/Fall Time
150
800
80
4
ps
ps
R F
Output to Output Skew between any two
outputs of the same device @ same transition
(3)
t
t
@V
/2
SK(O)
DDO
( 4)
DIS, EN
t
Output Enable/Disable
@V
/2
cycles
DDO\
Notes:
1. Unless noted otherwise, all parameters are tested with xtal @ f <= Fxtal_max,; outputs are terminated @ 50Ω to V
2. External clock source is driving XTAL_IN input
/2, see waveforms.
DDO
3. Identical conditions: loading, transitions, supply voltage, temperature, package type and speed grade.
4. These parameters are guaranteed, but not tested. Max delay is 4 cycles. Min. setup time = 3ns.
PS9038C
06/29/10
10-0151
6
PI6C10806B
1.8V/2.5V/3.3V, 100MHz, Low Skew 1:6 Crystal to LVCMOS Clock Buffer
AC Characteristics (V = 3.3V±5%, V
= 2.5V±5%, T = -40°C to 85°C)
DD
Parameters
Using Exter-
DDO
A
(1)
Symbols
Test Conditions
Min.
Typ
Max.
Units
10
50
MHz
nal Crystal
Output
Frequency
Using Ex-
f
MAX
ternal Clock
(2)
DC
48
100
MHz
Source
Output Duty
Cycle
odc
52
%
Otuput Skew
(3)
t
80
ps
SK(O)
(2) (4)
25MHz @ Integration
Range: 100Hz-1MHz
RMS
Phase Jitter
(Random)
t
0.091
ps
jit(Ø)
Output Rise/
Fall Time
t /t
R F
20% to 80%
200
800
ps
ENABLE1
ENABLE2
ENABLE1
4
4
4
cycles
cycles
cycles
Output Enable
Time
(4)
t
t
EN
(3)
Output
Disable Time
DIS
(3)
ENABLE2
4
cycles
Notes:
1. Unless noted otherwise, all parameters are tested with xtal @ f <= Fxtal_max,; outputs are terminated @ 50Ω to V
2. External clock source is driving XTAL_IN input
/2, see waveforms.
DDO
3. Identical conditions: loading, transitions, supply voltage, temperature, package type and speed grade.
4. These parameters are guaranteed, but not tested. Max delay is 4 cycles. Min. setup time = 3ns.
PS9038C
06/29/10
10-0151
7
PI6C10806B
1.8V/2.5V/3.3V, 100MHz, Low Skew 1:6 Crystal to LVCMOS Clock Buffer
AC Characteristics (V = 3.3V±5%, V
= 1.8V±0.2V, T = -40°C to 85°C)
DD
Parameters
Using Exter-
DDO
A
(1)
Symbols
Test Conditions
Min.
Typ
Max.
Units
10
50
MHz
nal Crystal
Output
Frequency
Using Ex-
f
MAX
ternal Clock
(2)
DC
48
100
MHz
Source
Output Duty
Cycle
odc
52
%
Otuput Skew
(3)
t
80
ps
SK(O)
(2) (4)
25MHz @ Integration
Range: 100Hz-1MHz
RMS
Phase Jitter
(Random)
t
0.122
ps
jit(Ø)
Output Rise/
Fall Time
t /t
R F
20% to 80%
200
900
ps
ENABLE1
ENABLE2
ENABLE1
4
4
4
cycles
cycles
cycles
Output Enable
Time
(4)
t
t
EN
(3)
Output
Disable Time
DIS
(3)
ENABLE2
4
cycles
Notes:
1. Unless noted otherwise, all parameters are tested with xtal @ f <= Fxtal_max,; outputs are terminated @ 50Ω to V
2. External clock source is driving XTAL_IN input
/2, see waveforms.
DDO
3. Identical conditions: loading, transitions, supply voltage, temperature, package type and speed grade.
4. These parameters are guaranteed, but not tested. Max delay is 4 cycles. Min. setup time = 3ns.
PS9038C
06/29/10
10-0151
8
PI6C10806B
1.8V/2.5V/3.3V, 100MHz, Low Skew 1:6 Crystal to LVCMOS Clock Buffer
AC Characteristics (V = 2.5V±5%, V
= 1.8V±0.2V, T = -40°C to 85°C)
A
DD
Parameters
Using Exter-
DDO
Symbols
Test Conditions
Min.
Typ
Max.
Units
10
50
MHz
nal Crystal
Output
Frequency
Using Ex-
f
MAX
ternal Clock
(1)
DC
47
100
MHz
Source
Output Duty
Cycle
odc
53
80
%
Otuput Skew
t
ps
SK(O)
(2) (4)
25MHz @ Integration
Range: 100Hz-1MHz
RMS
Phase Jitter
(Random)
t
0.131
ps
jit(Ø)
Output Rise/
Fall Time
t /t
R F
20% to 80%
200
900
ps
ENABLE1
ENABLE2
ENABLE1
4
4
4
cycles
cycles
cycles
Output Enable
Time
t
t
EN
(3)
Output
Disable Time
DIS
(3)
ENABLE2
4
cycles
Notes:
All parameters measured at ƒ=f MAX using a crystal input unless noted otherwise.
Outputs are terminated at 50Ω to VDDO /2.
1. XTAL_IN can be overdriven relatively to a signal a crystal provides.
2. Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at VDDO /2.
3. These parameters are guaranteed, but not tested.
4. This parameter is defined in accordance with JEDEC Standard 65.
PS9038C
06/29/10
10-0151
9
PI6C10806B
1.8V/2.5V/3.3V, 100MHz, Low Skew 1:6 Crystal to LVCMOS Clock Buffer
Jitter (typical phase noise at 25MHz)
2.5V Core/2.5V Output
RMS phase jitter (Random)
100Hz to 1MHz =0.112ps (typical)
3.3V Core/3.3V Output
RMS phase jitter (Random)
100Hz to 1MHz =0.098ps (typical)
PS9038C
06/29/10
10-0151
10
PI6C10806B
1.8V/2.5V/3.3V, 100MHz, Low Skew 1:6 Crystal to LVCMOS Clock Buffer
Waveforms
Output to Output Skew – tsk(O)
Duty Cycle – tDC
tPW
VOH
VDDO
BCLKx
VDDO/2
VOL
VDDO/2
tPERIOD
tDC = (tPW / tPERIOD ) x 100%
0V
tSK(O)
tSK(O)
tPZL
VOH
BCLKy
VDDO/2
VOL
ENABLE1, ENABLE2 Timing Diagram
BCLK5
BCLK[0:4]
ENABLE2
ENABLE1
AC Test Circuit Load
Note:
/V
[VDD - VDDO/2]
[+VDDO/2]
V
= 1.8V ± 0.2V,
2.5V ± 5%,
3.3V ± 5%
DD DDO
VDD
Scope
VDDO
Z = 50-Ohm
GND
50-
Ohm
[-VDDO/2]
Crystal Characteristic (link to "http://www.pericom.com/saronix" for more detailed crystal specifications)
Parameters
OSCmOde
FReQ
Description
Min
Typ
Fundamental
25
Max.
Units
Mode of Oscillation
Frequency
10
30
50
50
MHz
Ohm
pF
(1)
eSR
Equivalent Series Resistance
Load Capacitance
ClOad
18
CShunt
Shunt Capacitance
7
pF
dRIVe level
1
mW
Note: 1. ESR value is dependent upon frequency of oscillation
PS9038C
06/29/10
10-0151
11
PI6C10806B
1.8V/2.5V/3.3V, 100MHz, Low Skew 1:6 Crystal to LVCMOS Clock Buffer
Application Notes
Crystal circuit connection
The following diagram shows PI6C10806B crystal circuit connection with a parallel crystal. For the C =18pF
L
crystal, it is suggested to use C1=15pF, C2=15pF. C1 and C2 can be adjusted to fine tune to the target ppm of
crystal oscillator according to different board layouts. R1 is not recommended.
Crystal Oscillator Circuit
XTAL_IN
C1
15pF
Crystal�(CL�=�18pF)
0Ω
XTAL_OUT
R1
C2
15pF
PS9038C
06/29/10
10-0151
12
PI6C10806B
1.8V/2.5V/3.3V, 100MHz, Low Skew 1:6 Crystal to LVCMOS Clock Buffer
DOCUMENT CONTROL NO.
PD - 1310
REVISION: E
16
DATE: 03/09/05
.169
.177
4.3
4.5
1
0.09
0.20
.193
.201
.004
.008
4.9
5.1
.047
0.45 .018
0.75 .030
max.
1.20
SEATING
PLANE
.252
BSC
6.4
.002
.006
0.05
0.15
.0256
BSC
.007
.012
0.65
0.19
0.30
Pericom Semiconductor Corporation
3545 N. 1st Street, San Jose, CA 95134
1-800-435-2335 • www.pericom.com
Note:
1. Package Outline Exclusive of Mold Flash and Metal Burr
2. Controlling dimentions in millimeters
3. Ref: JEDEC MO-153F/AB
DESCRIPTION: 16-Pin, 173-Mil Wide,TSSOP
PACKAGE CODE: L
Note:
• For latest package info, please check: http://www.pericom.com/products/packaging/mechanicals.php
(1,2,3)
PI6C10806B Ordering Information
Ordering Code
Package Code
Package Description
PI6C10806BLE
L
Pb-Free and Green 16-pin 173-mil TSSOP
Notes:
1. Thermal characteristics can be found on the company web site at www.pericom.com/packaging/
2. E = Pb-free and Green
3. X suffix = Tape/Reel
Pericom Semiconductor Corporation • 1-800-435-2336 • www.pericom.com
PS9038C
06/29/10
10-0151
13
相关型号：
PI6C10807HE
Low Skew Clock Driver, 6C Series, 10 True Output(s), 0 Inverted Output(s), PDSO20, 0.209 INCH, GREEN, MS-150B/AE, SSOP-20
PERICOM
PI6C10807LE
Low Skew Clock Driver, 6C Series, 10 True Output(s), 0 Inverted Output(s), PDSO20, 0.173 INCH, GREEN, MO-153F/AC, TSSOP-20
PERICOM
PI6C10807LEX
Low Skew Clock Driver, 6C Series, 10 True Output(s), 0 Inverted Output(s), PDSO20, 0.173 INCH, GREEN, MO-153F/AC, TSSOP-20
PERICOM
PI6C10810HE
Clock Driver, 6C Series, 10 True Output(s), 0 Inverted Output(s), PDSO20, 0.209 INCH, GREEN, MS-150B/AE, SSOP-20
DIODES
PI6C10810HEX
Low Skew Clock Driver, 6C Series, 10 True Output(s), 0 Inverted Output(s), PDSO20, 0.209 INCH, GREEN, MS-150B/AE, SSOP-20
PERICOM
PI6C10810LE
Low Skew Clock Driver, 6C Series, 10 True Output(s), 0 Inverted Output(s), PDSO20, 0.173 INCH, GREEN, MO-153F/AC, TSSOP-20
PERICOM
PI6C10810LE
Clock Driver, 6C Series, 10 True Output(s), 0 Inverted Output(s), PDSO20, 0.173 INCH, GREEN, MO-153F/AC, TSSOP-20
DIODES
©2020 ICPDF网 联系我们和版权申明