PI6C10810LE [DIODES]
Clock Driver, 6C Series, 10 True Output(s), 0 Inverted Output(s), PDSO20, 0.173 INCH, GREEN, MO-153F/AC, TSSOP-20;
| 型号： | PI6C10810LE |
| 厂家： | 
DIODES INCORPORATED |
| 描述： | Clock Driver, 6C Series, 10 True Output(s), 0 Inverted Output(s), PDSO20, 0.173 INCH, GREEN, MO-153F/AC, TSSOP-20 驱动 光电二极管 逻辑集成电路 |
| 文件： | 总10页 (文件大小：776K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PI6C10810
1.2V-2.5V, 250MHz, 1:10 Networking Clock Buffer
Features
Description
•ꢀ High-speed,ꢀlow-noise,ꢀnon-invertingꢀsplitꢀ1-10ꢀbufferꢀ
•ꢀ MaximumꢀFrequencyꢀupꢀtoꢀ250ꢀMHz
•ꢀ Lowꢀoutputꢀskewꢀ<ꢀ60psꢀ(BankꢀA,ꢀ2.5V)
•ꢀ Lowꢀdutyꢀcycleꢀdistortionꢀ<ꢀ200psꢀ
•ꢀ Lowꢀpropagationꢀdelayꢀ<ꢀ2.0nsꢀ(2.5V)
Theꢀ PI6C10810ꢀ isꢀ aꢀ 1.2Vꢀ toꢀ 2.5Vꢀ high-speed,ꢀ low-noiseꢀ
1-10ꢀnon-invertingꢀclockꢀbuffer.ꢀTheꢀkeyꢀgoalꢀinꢀdesigningꢀtheꢀ
PI6C10810ꢀꢀisꢀtoꢀtargetꢀnetworkingꢀapplicationsꢀthatꢀrequireꢀlow-
skew,ꢀlow-jitter,ꢀandꢀhigh-frequencyꢀclockꢀdistribution.ꢀ
Providingꢀoutput-to-outputꢀskewꢀasꢀlowꢀasꢀ60ps,ꢀtheꢀPI6C10810ꢀ
isꢀ anꢀ idealꢀ clockꢀ distributionꢀ deviceꢀ forꢀ synchronousꢀ systems.ꢀ
•ꢀ Choiceꢀofꢀ1.2V,ꢀ1.5V,ꢀ1.8Vꢀorꢀ2.5VꢀsupplyꢀvoltageꢀonꢀBankꢀA,ꢀ
BankꢀB,ꢀBankꢀC
Designingꢀsynchronousꢀnetworkingꢀsystemsꢀrequiresꢀaꢀtightꢀlevelꢀ
ofꢀskewꢀfromꢀaꢀlargeꢀnumberꢀofꢀoutputs.
•ꢀ Industrialꢀtemperatureꢀrange:ꢀ–40°C to 85°C
CLK0-4ꢀoperateꢀfromꢀV
CLK5-6ꢀoperateꢀfromꢀV
CLK7-9ꢀoperateꢀfromꢀV
ꢀsupply.
ꢀsupply.
ꢀsupply.
DDA
DDC
DDB
•ꢀ Packagesꢀ(Pb-freeꢀ&ꢀGreen):ꢀ20-pin,ꢀTSSOPꢀ(L20)ꢀ
ꢀ ꢀ
ꢀ ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀꢀꢀꢀꢀꢀꢀꢀ20-pin,ꢀSSOPꢀ(H20)
ꢀꢀꢀꢀꢀꢀꢀꢀ20-pin,ꢀQSOPꢀ(Q20)
Block Diagram
Pin Configuration
V
DDA
CLK0
BUF_IN
1
V
20
19
18
17
16
15
14
13
12
11
DDB
CLK1
GND
2
CLK9
CLK0
3
BUF_IN
CLK8
GND
CLK7
CLK2
CLK3
CLK4
V
DDA
CLK1
GND
4
5
V
6
DDC
CLK2
CLK6
GND
CLK5
CLK4
7
V
DDA
8
CLK3
GND
9
CLK5
CLK6
10
CLK7
CLK8
CLK9
Pin Description
Pin Name
BUF_IN
Description
Input
CLK [0:9]
GND
Outputs
Ground
V
, V
, V
DDC
Power (1.2V, 1.5V, 1.8V, 2.5V)
DDA
DDB
V
DDC
V
DDB
PS9014A
02/23/11
11-0015
1
PI6C10810
1.2V-2.5V, 250MHz, 1:10 Networking Clock Buffer
2.5V Absolute Maximum Ratings (Aboveꢀwhichꢀtheꢀusefulꢀlifeꢀmayꢀ
beꢀimpaired.ꢀꢀForꢀuserꢀguidelinesꢀonly,ꢀnotꢀtested.)
Note: Stressesꢀ greaterꢀ thanꢀ thoseꢀ listedꢀ underꢀ MAXI-
MUMꢀ RATINGSꢀ mayꢀ causeꢀ permanentꢀ damageꢀ toꢀ theꢀ
device.ꢀThisꢀisꢀaꢀstressꢀratingꢀonlyꢀandꢀfunctionalꢀoperationꢀ
ofꢀtheꢀdeviceꢀatꢀtheseꢀorꢀanyꢀotherꢀconditionsꢀaboveꢀthoseꢀ
indicatedꢀinꢀtheꢀoperationalꢀsectionsꢀofꢀthisꢀspecificationꢀisꢀ
notꢀimplied.ꢀꢀExposureꢀtoꢀabsoluteꢀmaximumꢀratingꢀconditionsꢀ
forꢀextendedꢀperiodsꢀmayꢀaffectꢀreliability.
StorageꢀTemperature...........................................................–65°Cꢀtoꢀ+150°C
V
Voltage ..........................................................................–0.5Vꢀtoꢀ+3.6Vꢀ
DD
OutputꢀVoltageꢀ(max.ꢀ3.6V) .......................................... –0.5V to V +0.5Vꢀ
DD
InputꢀVoltageꢀ(maxꢀ3.6V).............................................. –0.5V to V +0.5Vꢀ
DD
2.5V DC Characteristics (OverꢀOperatingꢀRange:ꢀV
V
V
ꢀ=ꢀ2.5Vꢀ±ꢀ0.2V,ꢀT ꢀ=ꢀ-40°ꢀtoꢀ85°C)
DDA, DDB, DDC
(1)
A
(2)
Parameters Description
Test Conditions
Min.
2.3
Typ.
Max.
2.7
Units
V
DD
SupplyꢀVoltage
2.5
V
InputꢀHIGHꢀVoltage
InputꢀLOWꢀVoltage
Input Current
LogicꢀHIGHꢀlevel
LogicꢀLOWꢀlevel
1.7
3.6
IH
V
V
I
-0.3
0.7
IL
I
V
ꢀ=ꢀMax,ꢀVinꢀ=ꢀV or GND
Iꢀpin
15
µA
DD
DD
I
I
I
ꢀ=ꢀ-1mA
ꢀ=ꢀ-2mA
ꢀ=ꢀ-8mA
2.0
1.7
1.7
OH
OH
OH
V
OutputꢀHighꢀVoltage
OutputꢀLOWꢀVoltage
V
ꢀ=ꢀMin.,ꢀV = V or V
DD IN IH
OH
IL
V
I
ꢀ=ꢀ1mA
ꢀ=ꢀ2mA
ꢀ=ꢀ8mA
0.1
0.2
0.2
OL
OL
OL
V
V
DD
ꢀ=ꢀMin.,ꢀꢀV ꢀ-ꢀV or V
I
OL
IN
IH
IL
I
Notes:
1.ꢀꢀꢀꢀꢀForꢀMax.ꢀorꢀMin.ꢀconditions,ꢀuseꢀappropriateꢀoperatingꢀrangeꢀvalues.
2.ꢀ TypicalꢀvaluesꢀareꢀatꢀVDDꢀ=ꢀ2.5V,ꢀ+25°Cꢀambientꢀandꢀmaximumꢀloading.
2.5V AC Characteristicsꢀ(OverꢀOperatingꢀRange:ꢀV
V
V
ꢀ=ꢀ2.5Vꢀ±ꢀ0.2V,ꢀT ꢀ=ꢀ-40°ꢀtoꢀ85°C)
DDA, DDB, DDC
A
(1)
Parameters Description
Min.
0
Typ
Max. Units
Test Conditions
F
IN
InputꢀFrequency
250
2.0
MHz
(2)
t
t
PropagationꢀDelayꢀBUF_INꢀtoꢀCLKn
1.0
1.5
PLH,ꢀ PHL
OutputꢀtoꢀOutputꢀSkewꢀ
betweenꢀanyꢀtwoꢀoutputsꢀ
ofꢀtheꢀsameꢀdeviceꢀ@ꢀ
sameꢀtransition
BankꢀAꢀ(CLK0ꢀ-ꢀCLK4)
60
30
–60
–30
(3)
t
BankꢀCꢀ(CLK5ꢀ-ꢀCLK6)
BankꢀBꢀ(CLK7ꢀ-ꢀCLK9)
SK(O)
R ꢀ=ꢀ500-Ohm,ꢀC =
3pF,ꢀ125ꢀMHzꢀOut-
putsꢀareꢀmeasuredꢀ@ꢀ
150
–150
L
L
ps
PulseꢀSkewꢀbetweenꢀoppositeꢀtransitions
(t -t )ꢀofꢀtheꢀsameꢀoutput
(3)
SK(P)
t
100
200
PHL PLH
V
/2
DD
PartꢀtoꢀPartꢀSkewꢀbetweenꢀtwoꢀidenticalꢀoutputsꢀofꢀdif-
ferentꢀpartsꢀonꢀtheꢀsameꢀboard
(3)(5)
t
300
SK(T)
(4)
t
DutyꢀCycleꢀInꢀ@ꢀInsꢀedgeꢀrate
DutyꢀCycleꢀOut
45
40
55
57.5
50
dc_in
%
ps
ns
t
dc_out
(5)
t
j
AdditiveꢀJitter
t
OutputꢀRiseꢀTimeꢀ20%-80%ꢀCLKn
OutputꢀFallꢀTimeꢀ80%-20%ꢀCLKn
0.5
0.5
0.7
0.7
R(O)
R ꢀ=ꢀ500-Ohm,ꢀC =
L
L
3pF
t
F(O)
Notes:
1.ꢀSeeꢀtestꢀcircuitꢀandꢀwaveforms.
2.ꢀMinimumꢀlimitsꢀareꢀguaranteedꢀbutꢀnotꢀtestedꢀonꢀPropagationꢀDelays.
3.ꢀSkewꢀmeasuredꢀatꢀworstꢀcaseꢀtemperatureꢀ(max.ꢀtemp).
4.ꢀIdenticalꢀconditions:ꢀloading,ꢀtransitions,ꢀsupplyꢀvoltage,ꢀtemperature,ꢀpackageꢀtypeꢀandꢀspeedꢀgrade.
5.ꢀGuaranteedꢀbyꢀdesign.
PS9014A
02/23/11
2
11-0015
PI6C10810
1.2V-2.5V, 250MHz, 1:10 Networking Clock Buffer
1.8V Absolute Maximum Ratings (Aboveꢀwhichꢀtheꢀusefulꢀlifeꢀmayꢀ
beꢀimpaired.ꢀꢀForꢀuserꢀguidelinesꢀonly,ꢀnotꢀtested.)
Note: Stressesꢀ greaterꢀ thanꢀ thoseꢀ listedꢀ underꢀ MAXI-
MUMꢀ RATINGSꢀ mayꢀ causeꢀ permanentꢀ damageꢀ toꢀ theꢀ
device.ꢀThisꢀisꢀaꢀstressꢀratingꢀonlyꢀandꢀfunctionalꢀoperationꢀ
ofꢀtheꢀdeviceꢀatꢀtheseꢀorꢀanyꢀotherꢀconditionsꢀaboveꢀthoseꢀ
indicatedꢀinꢀtheꢀoperationalꢀsectionsꢀofꢀthisꢀspecificationꢀisꢀ
notꢀimplied.ꢀꢀExposureꢀtoꢀabsoluteꢀmaximumꢀratingꢀcondi-
tionsꢀforꢀextendedꢀperiodsꢀmayꢀaffectꢀreliability.
StorageꢀTemperature...........................................................–65°Cꢀtoꢀ+150°C
V
Voltage ..........................................................................–0.5Vꢀtoꢀ+2.5Vꢀ
DD
OutputꢀVoltageꢀ(maxꢀ2.5V)ꢀ .......................................... –0.5V to V +0.5Vꢀ
DD
InputꢀVoltageꢀ(maxꢀ2.5V)ꢀ............................................. –0.5V to V +0.5Vꢀ
DD
1.8V DC Characteristics (OverꢀOperatingꢀRange:ꢀV
, V
, V
ꢀ=ꢀ1.8Vꢀ±ꢀ0.15V,ꢀT ꢀ=ꢀ-40°ꢀtoꢀ85°C)
DDA
DDB
DDC
(1)
A
(2)
Parameters Description
Test Conditions
Min.
1.65
1.1
Typ.
Max.
1.95
2.7
Units
V
DD
SupplyꢀVoltage
1.8
V
InputꢀHIGHꢀVoltage
InputꢀLOWꢀVoltage
LogicꢀHIGHꢀlevel
LogicꢀLOWꢀlevel
ꢀ=ꢀMax,ꢀ
IH
V
V
-0.3
0.35*V
IL
I
DD
V
DD
(3)
I
Input Current
Iꢀpin
15
µA
Vinꢀ=ꢀV or GND
DD
I
I
ꢀ=ꢀ-2mA
ꢀ=ꢀ-8mA
1.35
OH
V
OutputꢀHighꢀVoltage
OutputꢀLOWꢀVoltage
V
ꢀ=ꢀMin.,ꢀV = V or V
OH
DD IN IH
IL
IL
1.2
OH
V
I
ꢀ=ꢀ2mA
OL
0.1
0.2
V
V
ꢀ=ꢀMin.,ꢀꢀV ꢀ-ꢀV or V
OL
DD IN IH
I
ꢀ=ꢀ8mA
OL
Notes:
1.ꢀ ForꢀMax.ꢀorꢀMin.ꢀconditions,ꢀuseꢀappropriateꢀoperatingꢀV ꢀandꢀTaꢀvalues.
DD
2.ꢀ TypicalꢀvaluesꢀareꢀatꢀVDDꢀ=ꢀ1.8V,ꢀ+25°Cꢀambientꢀandꢀmaximumꢀloading.
3.ꢀꢀꢀꢀꢀThisꢀparameterꢀisꢀdeterminedꢀbyꢀdeviceꢀcharacterizationꢀbutꢀisꢀnotꢀproductionꢀtested.
1.8V AC Characteristicsꢀ(OverꢀOperatingꢀꢀRange:ꢀV
, V
, V
ꢀ=ꢀ1.8Vꢀ±ꢀ0.15V,ꢀT ꢀ=ꢀ-40°ꢀtoꢀ85°C)
DDA
DDB
DDC
A
(1)
Parameters Description
Min.
0
Typ
Max.
200
2.8
Units
Test Conditions
F
InputꢀFrequency
MHz
IN
(2)
t
t
PropagationꢀDelayꢀBUF_INꢀtoꢀCLKn
1.0
2.3
PLH,ꢀ PHL
Output to Output
Skewꢀbetweenꢀanyꢀ
twoꢀoutputsꢀofꢀtheꢀ
sameꢀdeviceꢀ@ꢀsameꢀ
transition
BankꢀAꢀ(CLK0ꢀ-ꢀCLK4)
BankꢀCꢀ(CLK5ꢀ-ꢀCLK6)
60
30
–60
(3)
30
t
SK(O)
BankꢀBꢀ(CLK7ꢀ-ꢀCLK9)
C ꢀ=ꢀ3pF,ꢀR =
500-Ohm,ꢀ125ꢀMHzꢀ
Outputsꢀareꢀmeasuredꢀ
200
200
300
–200
L
L
ps
PulseꢀSkewꢀbetweenꢀoppositeꢀtransitions
(t -t )ꢀofꢀtheꢀsameꢀoutput
(3)
SK(P)
t
100
PHL PLH
@ꢀV /2
DD
PartꢀtoꢀPartꢀSkewꢀbetweenꢀtwoꢀidenticalꢀoutputsꢀ
ofꢀdifferentꢀpartsꢀonꢀtheꢀsameꢀboard
(3)(5)
t
SK(T)
(4)
t
DutyꢀCycleꢀInꢀ@ꢀ1ꢀnsꢀedgeꢀrate
DutyꢀCycleꢀOut
45
40
55
57.5
50
dc_in
%
ps
ns
t
dc_out
(5)
t
AdditiveꢀJitter
j
t
OutputꢀRiseꢀTimeꢀ20%ꢀ-ꢀ80%ꢀCLKn
OutputꢀFallꢀTimeꢀ80%ꢀ-ꢀ20%ꢀCLKn
0.5
0.5
0.8
0.8
R(o)
t
F(o)
Notes:
1.ꢀꢀꢀꢀSeeꢀtestꢀcircuitꢀandꢀwaveforms.
2.ꢀ MinimumꢀlimitsꢀareꢀguaranteedꢀbutꢀnotꢀtestedꢀonꢀPropagationꢀDelays.
3.ꢀ Skewꢀmeasuredꢀatꢀworstꢀcaseꢀtemperatureꢀ(max.ꢀtemp).
4.ꢀꢀꢀꢀIdenticalꢀconditions:ꢀloading,ꢀtransitions,ꢀsupplyꢀvoltage,ꢀtemperature,ꢀpackageꢀtypeꢀandꢀspeedꢀgrade.
5.ꢀ Guaranteedꢀbyꢀdesign.
PS9014A
02/23/11
3
11-0015
PI6C10810
1.2V-2.5V, 250MHz, 1:10 Networking Clock Buffer
1.5V Absolute Maximum Ratings (Aboveꢀwhichꢀtheꢀusefulꢀlifeꢀmayꢀ
beꢀimpaired.ꢀꢀForꢀuserꢀguidelinesꢀonly,ꢀnotꢀtested.)
Note: Stressesꢀ greaterꢀ thanꢀ thoseꢀ listedꢀ underꢀ MAXI-
MUMꢀ RATINGSꢀ mayꢀ causeꢀ permanentꢀ damageꢀ toꢀ theꢀ
device.ꢀThisꢀisꢀaꢀstressꢀratingꢀonlyꢀandꢀfunctionalꢀoperationꢀ
ofꢀtheꢀdeviceꢀatꢀtheseꢀorꢀanyꢀotherꢀconditionsꢀaboveꢀthoseꢀ
indicatedꢀinꢀtheꢀoperationalꢀsectionsꢀofꢀthisꢀspecificationꢀisꢀ
notꢀimplied.ꢀꢀExposureꢀtoꢀabsoluteꢀmaximumꢀratingꢀconditionsꢀ
forꢀextendedꢀperiodsꢀmayꢀaffectꢀreliability.
StorageꢀTemperature...........................................................–65°Cꢀtoꢀ+150°C
V
Voltage ..........................................................................–0.5Vꢀtoꢀ+3.6Vꢀ
DD
OutputꢀVoltageꢀ(max.ꢀ3.6V) .......................................... –0.5V to V +0.5Vꢀ
DD
InputꢀVoltageꢀ(maxꢀ3.6V).............................................. –0.5V to V +0.5Vꢀ
DD
1.5V DC Characteristics (OverꢀOperatingꢀRange:ꢀV
V
V
ꢀ=ꢀ1.5Vꢀ±ꢀ0.1V,ꢀT ꢀ=ꢀ-40°ꢀtoꢀ85°C)
DDA, DDB, DDC
(1)
A
(2)
Parameters Description
Test Conditions
Min.
Typ.
Max.
Units
V
DD
SupplyꢀVoltage
1.4
1.5
1.6
V
InputꢀHIGHꢀVoltage
InputꢀLOWꢀVoltage
Input Current
LogicꢀHIGHꢀlevel
LogicꢀLOWꢀlevel
0.65×V
-0.3
V
DD
IH
DD
V
V
I
0.35×V
IL
I
DD
V
ꢀ=ꢀMax,ꢀVinꢀ=ꢀV or GND
Iꢀpin
15
µA
DD
DD
I
I
ꢀ=ꢀ-2mA
ꢀ=ꢀ-8mA
1.05
1.75
OH
OH
V
OutputꢀHighꢀVoltage
V
ꢀ=ꢀMin.,ꢀV = V or V
OH
DD IN IH
IL
V
I
ꢀ=ꢀ2mA
OL
OL
0.35
0.65
V
OutputꢀLOWꢀVoltage
V
ꢀ=ꢀMin.,ꢀꢀV ꢀ-ꢀV or V
DD IN IH
OL
IL
I
ꢀ=ꢀ8mA
Notes:
1.ꢀꢀꢀꢀꢀForꢀMax.ꢀorꢀMin.ꢀconditions,ꢀuseꢀappropriateꢀoperatingꢀrangeꢀvalues.
2.ꢀ TypicalꢀvaluesꢀareꢀatꢀVDDꢀ=ꢀ1.5V,ꢀ+25°Cꢀambientꢀandꢀmaximumꢀloading.
1.5V AC Characteristicsꢀ(OverꢀOperatingꢀRange:ꢀV
, V
, V
ꢀ=ꢀ1.5Vꢀ±ꢀ0.1V,ꢀT ꢀ=ꢀ-40°ꢀtoꢀ85°C)
DDA
DDB
DDC
A
(1)
Parameters Description
Min.
Typ
Max. Units
Test Conditions
F
InputꢀFrequency
0
200
1.0
3.5
100
50
MHz
ns
IN
t /t
R F
CLKnꢀRise/FallꢀTime
20% to 80%
(2)
t
t
PropagationꢀDelayꢀBUF_INꢀtoꢀCLKn
2.0
–100
–50
2.8
ns
PLH,ꢀ PHL
OutputꢀtoꢀOutputꢀSkewꢀ
betweenꢀanyꢀtwoꢀoutputsꢀ
ofꢀtheꢀsameꢀdeviceꢀ@ꢀ
sameꢀtransition
BankꢀAꢀ(CLK0ꢀ-ꢀCLK4)
BankꢀCꢀ(CLK5ꢀ-ꢀCLK6)
BankꢀBꢀ(CLK7ꢀ-ꢀCLK9)
(3)
t
SK(O)
200
200
–200
C ꢀ=ꢀ3pF,ꢀ
L
ps
R ꢀ=ꢀ500-Ohms,ꢀ125ꢀ
MHzꢀOutputsꢀareꢀ
L
PulseꢀSkewꢀbetweenꢀoppositeꢀtransitions
(t -t )ꢀofꢀtheꢀsameꢀoutput
(3)
SK(P)
t
100
PHL PLH
measuredꢀ@ꢀV /2
DD
PartꢀtoꢀPartꢀSkewꢀbetweenꢀtwoꢀidenticalꢀoutputsꢀofꢀ
differentꢀpartsꢀonꢀtheꢀsameꢀboard
(3)(5)
t
300
SK(T)
(4)
t
DutyꢀCycleꢀInꢀ@ꢀInsꢀedgeꢀrate
DutyꢀCycleꢀOut
45
40
55
60
dc_in
%
ps
ns
(5)
t
dc_out
t
j
AdditiveꢀJitter
50
t
OutputꢀRiseꢀTimeꢀ20%ꢀ-ꢀ80%ꢀCLKn
OutputꢀFallꢀTimeꢀ80%ꢀ-ꢀ20%ꢀCLKn
0.6
0.6
0.9
0.9
R(o)
t
F(o)
Notes:
1.ꢀ Seeꢀtestꢀcircuitꢀandꢀwaveforms.
2.ꢀ MinimumꢀlimitsꢀareꢀguaranteedꢀbutꢀnotꢀtestedꢀonꢀPropagationꢀDelays.
3.ꢀ Skewꢀmeasuredꢀatꢀworstꢀcaseꢀtemperatureꢀ(max.ꢀtemp).
4.ꢀꢀꢀꢀꢀIdenticalꢀconditions:ꢀloading,ꢀtransitions,ꢀsupplyꢀvoltage,ꢀtemperature,ꢀpackageꢀtypeꢀandꢀspeedꢀgrade.
5.ꢀꢀꢀꢀꢀGuaranteedꢀbyꢀdesign.
PS9014A
02/23/11
4
11-0015
PI6C10810
1.2V-2.5V, 250MHz, 1:10 Networking Clock Buffer
1.2V Absolute Maximum Ratings (Aboveꢀwhichꢀtheꢀusefulꢀlifeꢀmayꢀ
beꢀimpaired.ꢀꢀForꢀuserꢀguidelinesꢀonly,ꢀnotꢀtested.)
Note: Stressesꢀ greaterꢀ thanꢀ thoseꢀ listedꢀ underꢀ MAXI-
MUMꢀ RATINGSꢀ mayꢀ causeꢀ permanentꢀ damageꢀ toꢀ theꢀ
device.ꢀThisꢀisꢀaꢀstressꢀratingꢀonlyꢀandꢀfunctionalꢀoperationꢀ
ofꢀtheꢀdeviceꢀatꢀtheseꢀorꢀanyꢀotherꢀconditionsꢀaboveꢀthoseꢀ
indicatedꢀinꢀtheꢀoperationalꢀsectionsꢀofꢀthisꢀspecificationꢀisꢀ
notꢀimplied.ꢀꢀExposureꢀtoꢀabsoluteꢀmaximumꢀratingꢀconditionsꢀ
forꢀextendedꢀperiodsꢀmayꢀaffectꢀreliability.
StorageꢀTemperature...........................................................–65°Cꢀtoꢀ+150°C
V
Voltage ..........................................................................–0.5Vꢀtoꢀ+3.6Vꢀ
DD
OutputꢀVoltageꢀ(max.ꢀ3.6V) .......................................... –0.5V to V +0.5Vꢀ
DD
InputꢀVoltageꢀ(maxꢀ3.6V).............................................. –0.5V to V +0.5Vꢀ
DD
1.2V DC Characteristics (OverꢀOperatingꢀRange:ꢀV
V
V
ꢀ=ꢀ1.2Vꢀ±ꢀ0.1V,ꢀT ꢀ=ꢀ-40°ꢀtoꢀ85°C)
DDA, DDB, DDC
(1)
A
(2)
Parameters Description
Test Conditions
Min.
Typ.
Max.
Units
V
DD
SupplyꢀVoltage
1.1
1.2
1.3
V
InputꢀHIGHꢀVoltage
InputꢀLOWꢀVoltage
LogicꢀHIGHꢀlevel
LogicꢀLOWꢀlevel
0.65×V
-0.3
V
+0.3
DD
IH
DD
V
V
0.35×V
IL
I
DD
V
DD
ꢀ=ꢀMax,ꢀVinꢀ=ꢀV or
DD
I
Input Current
Iꢀpin
15
µA
GND
I
I
ꢀ=ꢀ-2mA
ꢀ=ꢀ-8mA
1.05
1.75
OH
OH
V
OutputꢀHighꢀVoltage
V
DD
ꢀ=ꢀMin.,ꢀV = V or V
OH
IN
IH
IL
IL
V
I
ꢀ=ꢀ2mA
OL
OL
0.35
0.65
V
OutputꢀLOWꢀVoltage
V ꢀ=ꢀMin.,ꢀꢀV ꢀ-ꢀV or V
DD IN IH
OL
I
ꢀ=ꢀ8mA
Notes:
1.ꢀꢀꢀꢀꢀForꢀMax.ꢀorꢀMin.ꢀconditions,ꢀuseꢀappropriateꢀoperatingꢀrangeꢀvalues.
2.ꢀ TypicalꢀvaluesꢀareꢀatꢀVDDꢀ=ꢀ1.2V,ꢀ+25°Cꢀambientꢀandꢀmaximumꢀloading.
1.2V AC Characteristicsꢀ(OverꢀOperatingꢀRange:ꢀV
, V
, V
ꢀ=ꢀ1.2Vꢀ±ꢀ0.1V,ꢀT ꢀ=ꢀ-40°ꢀtoꢀ85°C)
DDA
DDB
DDC
A
(1)
Parameters Description
Min.
0
Typ
Max.
150
6
Units
MHz
ns
Test Conditions
F
InputꢀFrequency
IN
(2)
t
t
PropagationꢀDelayꢀBUF_INꢀtoꢀCLKn
4
5
PLH,ꢀ PHL
BankꢀAꢀ(CLK0ꢀ-ꢀCLK4)
BankꢀCꢀ(CLK5ꢀ-ꢀCLK6)
150
50
Output to Output
Skewꢀbetweenꢀanyꢀ
twoꢀoutputsꢀofꢀtheꢀ
sameꢀdeviceꢀ@ꢀsameꢀ
transition
–150
–50
(3)
t
SK(O)
C ꢀ=ꢀ3pF,ꢀR =
500-Ohm,ꢀ125ꢀMHzꢀ
Outputsꢀareꢀmeasuredꢀ
L
L
BankꢀBꢀ(CLK7ꢀ-ꢀCLK9)
300
–300
ps
@ꢀV /2
DD
PulseꢀSkewꢀbetweenꢀoppositeꢀtransitions
(t -t )ꢀofꢀtheꢀsameꢀoutput
(3)
SK(P)
t
200
300
300
PHL PLH
PartꢀtoꢀPartꢀSkewꢀbetweenꢀtwoꢀidenticalꢀoutputsꢀ
ofꢀdifferentꢀpartsꢀonꢀtheꢀsameꢀboard
(3)(5)
t
SK(T)
(4)
t
DutyꢀCycleꢀInꢀ@ꢀ1nsꢀedgeꢀrate
DutyꢀCycleꢀOut
45
40
55
60
50
1
DC_IN
%
ps
ns
t
DC_OUT
(5)
t
AdditiveꢀJitter
j
t
OutputꢀRiseꢀTimeꢀ20%ꢀ-ꢀ80%ꢀCLKn
OutputꢀFallꢀTimeꢀ80%ꢀ-ꢀ20%ꢀCLKn
0.9
0.9
R(o)
t
1
F(o)
Notes:
1.ꢀ Seeꢀtestꢀcircuitꢀandꢀwaveforms.
2.ꢀ MinimumꢀlimitsꢀareꢀguaranteedꢀbutꢀnotꢀtestedꢀonꢀPropagationꢀDelays.
3.ꢀ Skewꢀmeasuredꢀatꢀworstꢀcaseꢀtemperatureꢀ(max.ꢀtemp).
4.ꢀꢀꢀꢀꢀIdenticalꢀconditions:ꢀloading,ꢀtransitions,ꢀsupplyꢀvoltage,ꢀtemperature,ꢀpackageꢀtypeꢀandꢀspeedꢀgrade.
5.ꢀꢀꢀꢀꢀGuaranteedꢀbyꢀdesign.
PS9014A
02/23/11
5
11-0015
PI6C10810
1.2V-2.5V, 250MHz, 1:10 Networking Clock Buffer
Power Supply Characteristics
Parameters Description
(1)
(2)
Test Conditions
Min. Typ.
Max. Units
V
V
= V
=
DDA
DDB
16
= 2.7V
DDC
V
V
= V
=
DDA
DDB
12
8
NoꢀLoad.ꢀF ꢀ=ꢀ40MHzꢀ
(BankꢀA,ꢀBankꢀB,ꢀBankꢀCꢀ
included)
IN
= 1.95V
DDC
QuiescentꢀPowerꢀ
SupplyꢀCurrentꢀ
I
mA
DDQ
V
= V
=
DDA
DDB
V
ꢀ=ꢀ1.6V
DDC
V
V
= V
DDB
=
DDA
8
= 1.2V
DDC
2.7V
1.95V
1.6V
1.2V
±80
±50
±35
±15
V
= V
=
DDA
DDB
I
ShortꢀCircuitꢀCurrent
mA
OS
V
DDC
Notes:
1.ꢀ ForꢀMax.ꢀorꢀMin.ꢀconditions,ꢀuseꢀappropriateꢀvalueꢀspecifiedꢀunderꢀElectricalꢀCharacteristics.
2.ꢀ TypicalꢀvaluesꢀareꢀatꢀVDDꢀ=ꢀ1.2V,ꢀ1.5V,ꢀ1.8Vꢀorꢀ2.5V,ꢀandꢀ+25°Cꢀambient.
3.ꢀꢀꢀꢀꢀꢀPerꢀTTLꢀdrivenꢀinputꢀ(VIN = VDD - 0.6V);ꢀallꢀotherꢀinputsꢀatꢀVDD or GND.
Capacitance (T =ꢀ25°C,ꢀfꢀ=ꢀ1ꢀMHz)
A
(1)
Description
Test Conditions
= 0V
Typ
3.0
—
Max.
Units
Parameters
C
InputꢀCapacitance
OutputꢀCapacitance
V
4
IN
IN
pF
C
OUT
V
OUT
= 0V
6
Note:
1.ꢀ
Thisꢀparameterꢀisꢀdeterminedꢀbyꢀdeviceꢀcharacterizationꢀbutꢀisꢀnotꢀproductionꢀtested.
Test Circuits for All Outputs
V
DD
Pulse
Generator
f = 125MHz
D.U.T.
C
3pF
500-Ohm
L
50-Ohm
Definitions:
CLꢀ=ꢀLoadꢀcapacitance:ꢀincludesꢀjigꢀandꢀprobeꢀcapacitance.
PS9014A
02/23/11
6
11-0015
PI6C10810
1.2V-2.5V, 250MHz, 1:10 Networking Clock Buffer
Switching Waveforms
Pulse Skew – tSK(P)
Propagation Delay
VDD
VIH
Input
Input
VDD/2
VDD/2
VIL
0V
tPLH
tPHL
tPLH
tPHL
VOH
VOH
Output
Output
VDD/2
VOL
VDD/2
VOL
tR
tF
tSK(P) = | tPLH - tPLH |
Output Skew – t
Package Skew – t
SK(O)
SK(T)
VDD
VDD
VDD/2
0V
Input
Input
VDD/2
0V
tPLH1
tSK(T)
tPLH2
tPHL1
tPLHx
tPHLx
VOH
VOH
Part #1
Output
VDD/2
VOL
CLKx
VDD/2
VOL
tSK(T)
tPHL2
tSK(O)
tSK(O)
VOH
VOH
Part #2
Output
VDD/2
VOL
CLKy
VDD/2
VOL
tPLHy
tPHLy
tSK(O) = | tPLHy - tPLHx | or | tPHLy - tPHLx |
tSK(T) = | tPLH2 - tPLH1 | or | tPHL2 - tPHL1 |
PS9014A
02/23/11
7
11-0015
PI6C10810
1.2V-2.5V, 250MHz, 1:10 Networking Clock Buffer
DOCUMENT CONTROL NO.
PD - 1311
20
REVISION: E
DATE: 03/09/05
.169
.177
4.3
4.5
1
.252
.260
0.09
0.20
.004
.008
6.4
6.6
.047
1.20
Max
0.45 .018
0.75 .030
SEATING
PLANE
.238
.269
6.1
6.7
.002
.006
0.05
0.15
.007
.012
0.19
0.30
.0256
BSC
0.65
Pericom Semiconductor Corporation
3545 N. 1st Street, San Jose, CA 95134
1-800-435-2336 • www.pericom.com
Note:
1. Package Outline Exclusive of Mold Flash and Metal Burr
2. Controlling dimentions in millimeters
3. Ref: JEDEC MO-153F/AC
DESCRIPTION: 20-Pin, 173-Mil Wide,TSSOP
PACKAGE CODE: L
PS9014A
02/23/11
8
11-0015
PI6C10810
1.2V-2.5V, 250MHz, 1:10 Networking Clock Buffer
DATE: 04/10/08
DESCRIPTION: 20-Pin, 209-Mil Wide, SSOP
H20
PACKAGE CODE:
REVISION:
E
DOCUMENT CONTROL #: PD-1240
08-0140
PS9014A
02/23/11
9
11-0015
PI6C10810
1.2V-2.5V, 250MHz, 1:10 Networking Clock Buffer
DOCUMENT CONTROL NO.
PD - 1202
20
REVISION: H
.008
DATE: 10/22/07
0.20
MIN.
.008
.013
0.20
0.33
.150
.157
3.81
3.99
Guage Plane
0˚-6˚
.010
.016
0.254
.035
0.41
0.89
1
Detail A
.337 8.56
.344 8.74
.041
1.04
REF
.015 x 45˚
.058
1.47
REF
0.38
.053 1.35
.069
1.75
Detail A
0.178
0.254
.007
.010
SEATING
PLANE
.004 0.101
.010 0.254
.025
BSC
0.635
.228
.244
.008
.012
0.203
0.305
5.79
6.19
X.XX
X.XX
DENOTES DIMENSIONS
IN MILLIMETERS
Pericom Semiconductor Corporation
3545 N. 1st Street, San Jose, CA 95134
1-800-435-2335 • www.pericom.com
Note:
1) Controlling dimensions in inches.
2) Ref: JEDEC MO-137B/AD
DESCRIPTION: 20-Pin, 150-Mil Wide, QSOP
3) Dimensions do not include mold flash, protrusions or gate burrs
PACKAGE CODE: Q
(1-3)
Ordering Information
Ordering Code
PI6C10810LE
PI6C10810HE
PI6C10810QE
Package Code
Package Type
L
H
Q
Pb-freeꢀ&ꢀGreen,ꢀ20-pinꢀ173-milꢀwideꢀTSSOP
Pb-freeꢀ&ꢀGreen,ꢀ20-pinꢀ209-milꢀwideꢀSSOP
Pb-freeꢀ&ꢀGreen,ꢀ20-pinꢀ150-milꢀwideꢀQSOP
Notes:
1.ꢀꢀꢀ ThermalꢀCharacteristicsꢀcanꢀbeꢀfoundꢀonꢀtheꢀwebꢀatꢀwww.pericom.com/packaging/
2.ꢀꢀ Eꢀ=ꢀLead-freeꢀandꢀGreenꢀ
3.ꢀꢀ AddingꢀanꢀXꢀsuffixꢀ=ꢀTape/Reel
PericomꢀSemiconductorꢀCorporationꢀꢀ•ꢀ1-800-435-2336ꢀ •ꢀwww.pericom.comꢀ
PS9014A
02/23/11
10
11-0015
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