PT7C4512W [DIODES]
Clock Generator,;
| 型号： | PT7C4512W |
| 厂家： | 
DIODES INCORPORATED |
| 描述： | Clock Generator, |
| 文件： | 总6页 (文件大小：53K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Data Sheet
PT7C4512 PLL Clock Multiplier
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Features
Description
• Zero ppm multiplication error
This serial is the most effective cost way to generate a
high quality, high frequency clock output from lower fre-
quency crystal or clock input. It is designed to replace
crystal oscillators in most electronic systems, clock mul-
tiplier and frequency translation with low output jitter.
Using PLL techniques, the device uses a standard fun-
damental mode, inexpensive crystal to produce output
clocks up to 200 MHz.
• Input crystal frequency of 5 - 40 MHz
• Input clock frequency of 4 - 50 MHz
• Output clock frequencies up to 200 MHz
• Low period jitter 80ps (100~200MHz)
• Duty cycle 45/55% of output clock
• 9 selectable frequencies controlled by S0, S1 pins
• Operating voltages of 3.0 to 5.5V
Ordering Information
The internal Logic divider is to generate nine different
popular multiplication factors, allowing one chip to output
many common frequencies.
Part Number
Package
8 - Pin SOIC
PT7C4512W
PT7C4512WE
Lead free 8 - Pin SOIC
Block Diagram
S0
S1
PLL Clock Synthesis
and
Output
CLK
Buffer
Control Circuit
X1/ICLK
X2
Crystal
Oscillator
Output
REF
Buffer
VCC
GND
PT0152(09/07)
Ver:3
1
Data Sheet
PT7C4512 PLL Clock Multiplier
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Pin Assignment
1
8
X1/ICLK X2
2
3
7
6
Vcc
S1
S0
GND
4
5
REF
CLK
SOIC-8 package
Pin Description
Pin
Name
Type
Description
1
X1/ICLK
I
Crystal connection or clock input.
Connect to +3.3Vor +5V.
Ground
2
3
4
5
6
7
8
Vcc
GND
REF
CLK
S0
P
P
O
O
I
Buffered crystal oscillator output clock
Clock output per table below
Multiplier select pin 0. Connect to GND or Vcc or float (no connection)
Multiplier select pin 1. Connect to GND or Vcc or float (no connection)
Crystal connection. Leave unconnected for clock input.
S1
I
X2
O
Clock Output Table
S1
0
S0
0
M 2)
CLK
x 4 1)
x(16/3)
x5
0
0
1
M
M
M
1
0
x2.5
x2
M
1
x(10/3)
x6
0
1
M
1
x3
1
x8
1) Note: CLK output frequency = ICLK x 4.
2) Note: M = leave unconnected (self-biases to Vcc/2).
PT0152(09/07)
Ver:3
2
Data Sheet
PT7C4512 PLL Clock Multiplier
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Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested)
Note:
Stresses greater than those listed under MAXI-
Storage temperature ........................................................... -65 to 150OC
MUM RATINGS may cause permanent damage to
Ambient Operating Temperature ..........................................-40 to 85OC
the device. This is a stress rating only and func-
Supply Voltage to Ground Potential (VCC) ..........................-0.3 to +7.0V
tional operation of the device at these or any other
Inputs (Referenced to GND) ........................................-0.5 to Vcc+0.5V
conditions above those indicated in the operational
Clock Output (Referenced to GND)..............................-0.5 to Vcc+0.5V
sections of this specification is not implied. Expo-
Soldering Temperature (Max of 10 seconds) ............... 260OC (Max.10s)
sure to absolute maximum rating conditions for ex-
tended periods may affect reliability.
Recommended Operation Conditions
Sym.
VCC
TA
Description
Supply Voltage
Operating Temperature
Test conditions
Min
3
Typ
Max
5.5
Unit
-
-
-
-
V
-40
85
C
°
DC Electrical Characteristics
(VCC = 3.3V 0.3V, TA= 0~70OC, unless otherwise noted)
Sym
Vcc
Icc
Parameter
Supply Voltage
Test Conditions
Pin
Vcc
Min
Typ
Max
5.5
20
Unit
V
-
3
-
-
Supply Current
no load, 20MHz crystal
Vcc
12
mA
V
V
IH
Input Logic High
-
ICLK
(Vcc/2)+1
Vcc/2
-
V
IL
Input Logic Low
-
ICLK
-
Vcc/2
(Vcc/2)-1
V
V
Input Logic High
-
S0, S1
S0, S1
S0, S1
CLK, REF
CLK, REF
CLK
Vcc-0.5
-
-
-
V
IH
V
IM
Input mid-level
-
-
-
Vcc/2
V
V
IL
Input Logic Low
-
IOH = -12mA
IOL = 12mA
-
-
-
-
0.5
-
V
VOH
VOL
IS
High-level output voltage
Low-level output voltage
Short Circuit Current
2.4
-
V
0.4
-
V
-
70
±
mA
PT0152(09/07)
Ver:3
3
Data Sheet
PT7C4512 PLL Clock Multiplier
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AC Electrical Characteristics
(VCC = 3.3V 0.3V, TA=-40~85OC, unless noted)
Sym. Parameter
Test Condition
crystal
Pin
Min.
Typ.
Max.
Unit
fIN
Input Frequency
ICLK
5
-
40
MHz
clock
ICLK
CLK
CLK
CLK
CLK
CLK
-
4
-
50
200
180
-
MHz
MHz
MHz
ns
fOUT Output frequency**
VCC: 4.5 to 5.5V
20
20
-
-
VCC: 3.0 to 3.6V
0.8 to 2.0V,
with 15pF load
2.0 to 0.8V,
-
tr
tf
Output clock rise time
Output clock fall time
1
1
50
-
-
-
ns
with 15pF load
Duty Output clock duty cycle
PLL bandwidth*
At VCC/2
45
10
-
55
-
%
-
kHz
ps
Period Jitter
100MHz~200MHz
CLK
80
100
* only reference for design
** The phase relationship between input and output clocks can change at power up.
PT0152(09/07)
Ver:3
4
Data Sheet
PT7C4512 PLL Clock Multiplier
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Mechanical Information
W/WE (SOIC-8)
8
.149
.157
3.78
3.99
.0099
.0196
0.25
0.50
x 45o
1
.189
4.80
.196
5.00
0.19
0.25
0-8o
.0075
.0098
0.40 .016
1.27 .050
.016
.026
1.35
1.75
.053
.068
.2284
.2440
5.80
0.406
0.660
SEATING PLANE
6.20
REF
X.XX
X.XX
DENOTES DIMENSIONS
IN MILLIMETERS
.050
BSC
.0040
.0098
0.10
0.25
1.27
Note:
.013
.020
0.330
0.508
1) Controlling dimensions in millimeters.
2) Ref: JEDEC MS-012 AA
PT0152(09/07)
Ver:3
5
Data Sheet
PT7C4512 PLL Clock Multiplier
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Notes
Pericom Technology Inc.
Email: support@pti.com.cn
Web Site: www.pti.com.cn, www.pti-ic.com
China:
No. 20 Building, 3/F, 481 Guiping Road, Shanghai, 200233, China
Tel: (86)-21-6485 0576 Fax: (86)-21-6485 2181
Asia Pacific: Unit 1517, 15/F, Chevalier Commercial Centre, 8 Wang Hoi Rd, Kowloon Bay, Hongkong
Tel: (852)-2243 3660 Fax: (852)- 2243 3667
U.S.A.:
3545 North First Street, San Jose, California 95134, USA
Tel: (1)-408-435 0800 Fax: (1)-408-435 1100
Pericom Technology Incorporation reserves the right to make changes to its products or specifications at any time, without notice, in order to
improve design or performance and to supply the best possible product. Pericom Technology does not assume any responsibility for use of any
circuitry described other than the circuitry embodied in Pericom Technology product. The company makes no representations that circuitry
described herein is free from patent infringement or other rights, of Pericom Technology Incorporation.
PT0152(09/07)
Ver:3
6
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