S1300AAA-FREQ-OUT27 [DIODES]

HCMOS Output Clock Oscillator, 1.5MHz Min, 28.6363MHz Max, FULL SIZE RESISTANCE WELDED, METAL, DIP-4;


型号：	S1300AAA-FREQ-OUT27
厂家：	DIODES INCORPORATED
描述：	HCMOS Output Clock Oscillator, 1.5MHz Min, 28.6363MHz Max, FULL SIZE RESISTANCE WELDED, METAL, DIP-4
文件：	总2页 (文件大小：123K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

SaRonix

Voltage Controlled Crystal Oscillator

3.3V, HCMOS

S1300 / S1309 Series

Technical Data

Frequency Range:

1.5 MHz to 28.6363 MHz

Frequency Stability:

2ꢀ, 25 or 5ꢀppm over all conditionsꢁ operating

temperature, voltage change, load change, calibration

tolerance, shock and vibration, with V = 1.65V

Aging @ 25°C:

3ppm max per year, 1ꢀppm max for 1ꢀ years

Temperature Range:

Operatingꢁ

Storageꢁ

ꢀ to +7ꢀ°C or -4ꢀ to +85°C

-55 to +125°C

Supply Voltage:

Recommended Operatingꢁ

3.3V 1ꢀ0

1ꢀmA typ, 15mA max

Supply Current:

Output Drive:

ACTUAL SIZE

Description

Symmetryꢁ

Rise & Fall Timesꢁ

Logic ꢀꢁ

45/550 max @ 5ꢀ0 V

9ns max 2ꢀ0 to 8ꢀ0 V

A 3.3V, voltage controlled crystal oscil-

lator designed primarily to be used in

phase locked loops, phase shift keying,

jitter reduction and other telecommuni-

cation applications. The HCMOS output

can drive both high speed CMOS and

TTLloads. Devicesarepackagedinstan-

dard 14-pin DIP compatible all metal,

resistance welded packages. Pin 7(4 on

1/2 size) is grounded to reduce EMI.

1ꢀ0 V

9ꢀ0 V

3ꢀpF

max

min

Logic 1ꢁ

Loadꢁ

Jitterꢁ

3.5ps max RMS period jitter

Pull Characteristics:

Input Impedance (pin 1)ꢁ

Freꢄuency Response (-3dB)ꢁ

Pullabilityꢁ

5ꢀKΩ min

1ꢀ kHz min

5ꢀ, 7ꢀ, 1ꢀꢀppm APRꢂ min

ꢀ.3 to 3.ꢀV

Freꢄuency Increases when Control Voltage Increases

5 or 1ꢀ0 max

1.65V

Control Voltageꢁ

Transfer Functionꢁ

Linearityꢁ

Applications & Features

Center Control Voltageꢁ

• 3.3 Volt operation

• HCMOS / TTL compatible

Mechanical:

Shockꢁ

Solderabilityꢁ

Terminal Strengthꢁ

Vibrationꢁ

MIL-STD-883, Method 2ꢀꢀ2, Condition B

MIL-STD-883, Method 2ꢀꢀ3

MIL-STD-2ꢀ2, Method 211, Conditions A & C

MIL-STD-883, Method 2ꢀꢀ7, Condition A

MIL-STD-2ꢀ2, Method 215

3.5ps max RMS period jitter

•

Wide range of performance options

availableꢁ 5ꢀ to 1ꢀꢀppm APRꢂꢃ 2ꢀ

to 5ꢀppm freꢄuency stability

Tri-State version available

Solvent Resistanceꢁ

Resistance to Soldering Heatꢁ

MIL-STD-2ꢀ2, Method 21ꢀ, Conditions A, B or C

( I or J for Gull Wing)

•

Gull Wing for IR reflow available

Environmental:

Output Waveform

Gross Leak Testꢁ

Fine Leak Testꢁ

MIL-STD-883C, Method 1ꢀ14, Condition C

MIL-STD-883C, Method 1ꢀ14, Condition A2

MIL-STD-883C, Method 1ꢀ11, Condition A

MIL-STD-883C, Method 1ꢀꢀ4

Thermal Shockꢁ

Moisture Resistanceꢁ

CMOS

Logic 1

80%V

50%V

20%V

Logic 0

ꢂ

APR = (VCXO Pull relative to specified Output Frequency) – (VCXO Frequency Stability)

SYMMETRY

DS-126 REV D

5.1

SaRonix 141 Jefferson Drive • Menlo Park, CA 94ꢀ25 • USA • 65ꢀ-47ꢀ-77ꢀꢀ • 8ꢀꢀ-227-8974 • Fax 65ꢀ-462-9894

SaRonix

Voltage Controlled Crystal Oscillator

3.3V, HCMOS

S1300 / S1309 Series

Technical Data

Package Details

Part Numbering Guide

S T 130 9 A A A J - 19.4400

5.08

.200

21.0

max

0.91

.825

SaRonix

Frequency (MHz)

.036

max

Blank = Non Tri-State

T = Tri-State

Lead/Package Types

Blank = Thru-Hole

6.35 0.51

0.25 0.02

3.94 .25

.155 .010

.46 .08

.018 .003

J = Gull Wing

Supply Voltage

130 = 3.3V

15.24 .13

.600 .005

Pin 3

Pin 1

Pin 7

Package Size

0 = Full Size

9 = 1/2 Size

Linearity

A = 5%

B = 10%

13.0

.510

max

7.75

max

.305

Pin 12

Pin 14

Pin 8

Stability Tolerance

Pullability (Minimum APR)**

A = 50 ppm

M = 70 ppm

(4) Glass Insulators

AA = ±±200pm 2 ꢀt ꢁ+2ꢂ°

A = ±±ꢃ00pm 2 ꢀt ꢁ+2ꢂ°

B = ±ꢃ200pm 2 ꢀt ꢁ+2ꢂ°

E = ±ꢃ200pm ꢄ-2 ꢀt ꢁꢅꢃꢂ°

Pin Function:

Pin 8: OUTPUT

Pin 12: N/C (optional)

Pin 14: +3.3VDC (V

Pin 1: Control Voltage

Pin 3: Tri-State control (optional)

B = 100 ppm, not aꢀailaꢁle at all ꢂrequencies

)

Pin 7: GND/Case (V

)

** APR = (VCXO Pull relatiꢀe to speciꢂied Output Frequency) – (VCXO Frequency Staꢁility)

Marking Format**

Includes Date Code, Frequency & Model

Tri-State Logic Table

SARONIX

VCXO

Required Input Leꢀels on Pin 3(2):

Pin 3(2) Input

Logic 1 or NC

Logic 0 or GND

Pin 8(5) Output

Oscillation

Denotes Pin 1

Logic 1 = 70% V min

Logic 0 = 30% V

max

High Impedance

HALF SIZE PACKAGE

13.0

max

.510

2.91

.2ꢆ6

pax

ꢃ.2ꢅ

.±22

pax

Test Circuit

6.35 0.51

0.25 0.02

.-6±.2ꢅ

.21ꢅ±.22ꢆ

2.54

.100

TEST

POINT

Pin 2

Optional

Tri-State Control

+.6±±.±2

.ꢆ22±.22ꢅ

Pin 4

GND °ase (V

)

Pin 14(8)

Pin 8(5)

OUT

Pin 1

°tnꢀrtl

Vtlꢀage

13.0

.510

max

VDD

+.6±±.±2

.ꢆ22±.22ꢅ

OSCILLATOR

GND

(Note A) = 30pF

POWER

SUPPLY

V M

Pin 8

Pin 5

Ouꢀ0uꢀ

Pin 7(4)

Pin 3(2)

Pin 1(1)

Marking Format**

Includes Date Code, Frequency & Model

CONTROL

VOLTAGE

OPTIONAL

TRI-STATE

SARONIX

NOTE A: C includes proꢁe and ꢂixture capacitance

Items in ꢁrackets( ) represent Halꢂ Size model

Denotes Pin 1

All specifications are subject to change without notice.

DS-126 REV D

**Exact location oꢂ items may ꢀary

Scale: Ntne (Dipensitns in

inches

)

5.2

SaRonix 141 Jefferson Drive • Menlo Park, CA 94025 • USA • 650-470-7700 • 800-227-8974 • Fax 650-462-9894

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