MAS7001CL [DYNEX]

FIFO, 512X9, 100ns, Asynchronous, CMOS, CDIP28;


型号：	MAS7001CL
厂家：	Dynex Semiconductor
描述：	FIFO, 512X9, 100ns, Asynchronous, CMOS, CDIP28 先进先出芯片 CD 内存集成电路
文件：	总15页 (文件大小：177K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

MA7001

Radiation Hard 512x9 Bit FIFO

Replaces January 2000 version, DS3519-5.0

DS3519-5.1 July 2002

The MA7001 512 x 9 FIFO is manufactured using Dynex

Semiconductor's CMOS-SOS high performance, radiation

hard, 3µm technology.

data and 1 bit for parity or control purposes).

Sequential read and write accesses are achieved using a

ring pointer architecture that requires no external addressing

information. Data is toggled in and out of the device by using

the WRITE (W) and READ (R) pins.

Full and Empty status flags prevent data overflow and

underflow. Expansion logic on the device allows for unlimited

expansion capability in both word size and depth. A

RETRANSMIT (RT) feature allows for reset of the read pointer

to its initial position to allow retransmission of data.

The device is designed for applications requiring

asynchronous and simultaneous read/write in multiprocessing

and rate buffering (sourcing and sinking data at different rates

eg. interfacing fast processors and slow peripherals).

The Dynex Semiconductor Silicon-on-Sapphire process

provides significant advantages over bulk silicon substrate

technologies In addition to very good total dose hardness and

neutron hardness >10¹⁵n/cm², the Dynex Semiconductor

technology provides very high transient gamma and single

event upset performance without compromising speed of

operation The Sapphire substrate also eliminates latch-up

giving greater flexibility of use in electrically severe

environments.

The MA7001 implements a First-ln First-Out algorithm that

reads and writes data on a first-in first-out basis. The dual-port

static RAM memory is organised as 512 words of 9 bits (8 bit

FEATURES

■ Radiation Hard CMOS-SOS Technology

■ Fast Access Time 60ns Typical

■ Single 5V Supply

■ Inputs Fully TTL and CMOS Compatible

■ -55°C to +125°C Operation

Figure 1: Block Diagram

1/15

MA7001

DC CHARACTERISTICS AND RATINGS

Stresses above those listed may cause permanent

damage to the device. This is a stress rating only and

functional operation of the device at these conditions, or at

any other condition above those indicated in the

operations section of this specification, is not Implied

Exposure to absolute maximum rating conditions for

extended periods may affect device reliability.

Symbol Parameter

Min.

Max.

Units

V_DD

V_IN

T_A

Supply Voltage

-0.5

-0.3

-55

-65

7.0

V_DD+0.3

125

Input Voltage

Operating Temperature

Storage Temperature

°C

T_S

150

Figure 2: Absolute Maximum Ratings

The following D.C. and A.C. electrical characteristics apply to pre-radiation at T_A= -55°C to +125°C, V_DD= 5V ±10% and post

100kRad(Si) total dose radiation at T_A= 25°C, V_DD= 5V ±10%. GROUP A SUBGROUP 1, 2, 3.

Symbol Parameter

Conditions

Min.

Typ.

Max.

Unit

V_IH

V_IL

Input logic '1' voltage

2.0

Input logic '0' voltage

-10

-50

2.4

0.8

I_IL

Input leakage current (any input) (Note 4)

Output leakage current (Note 4)

Output logic '1' voltage

Note 1

µA

I_OL

Note 2

V_OH

V_OL

I_DD1

I_DD2

I_DD3(L)

l_OUT= -1mA

Output loglc '0' voltage

l_OUT= 2mA

0.4

100

3.0

Average V_DDpower supply current (Note 3)

Average standby current (Note 3)

Powerdown current (Note 3)

Freq = 10MHz

R = W = RS = FL/RT = V_DD/2

All Inputs = V_DD-0.2V

NOTES:

1. Measurements with V_SS≤ V_IN≤ V_DD

2. R > V_IH, V_SS≤ V_OUT≤ V_DD

3. I_DDmeasurements are made wlth outputs open, V_DD= 5.5V

4. Guaranteed but not measured at -55°C

Figure 3a: DC Electrical Characteristics

2/15

MA7001

AC CHARACTERISTICS

Characteristics apply to pre-radiation at T_A= -55°C to +125°C, V_DD= 5V ±10% and post

100kRad(Si) total dose radiation at T_A= 25°C, V_DD= 5V ±10%. GROUP A SUBGROUP 9, 10, 11.

Symbol

Parameter

Min.

Max.

Units

t_RC

t_A

Read Cycle Time

110

Access Time

100

t_RR

Read Recovery Time

t_RPW

t_RLZ

t_DV

Read Pulse Width (Note 2)

Read Pulse Low to Data Bus at Low Z (Note 3)

Data Valid from Read Pulse High

Read Pulse High to Data Bus at High Z (Note 3)

Write Cycle Time

t_RHZ

t_WC

t_WPW

t_WR

t_DS

100

Write Pulse Width (Note 2)

Write Recovery Time

Data Setup Time

t_DH

Data Hold Time

t_RSC

t_RS

Reset Cycle Time (Note 3)

Reset Pulse Width (Note 2)

Reset Recovery Time (Note 3)

Retransmit Cycle Time (Note 3)

Retransmit Pulse Width (Note 2)

Retransmit Recovery Time (Note 3)

Reset to Empty Flag Low

t_RSR

t_RTC

t_RT

t_RTR

t_EFL

t_REF

t_RFF

t_WEF

t_WFF

t_EFR

t_RPI

t_FFW

t_WPI

100

Read Low to Empty Flag Low

Read High to Full Flag High

Write High to Empty Flag High

Write Low to Full Flag Low

EF High to Valid Read (Note 3)

Read Protect Indeterminant (Note 3)

FF High to Valid Wrlte (Note 3)

Write Protect Indeterminant (Note 3)

Notes:

1. Timings referenced as in A.C. Test Conditions, figure 5

2. Pulse wldths less than minimum values are not allowed

3. Values guaranteed by deslgn, not currently tested

Figure 3b: AC Characteristics

3/15

MA7001

Symbol

Parameter

Conditions

Functionality

V_DD= 3-6V, FREQ = 100kHz - 9MHz

V_IL= V_SS, V_IH= V_DD, V_OL≤ 1.5V, V_OH≥ 1.5V

TEMP = -55 to +125°C, RADIATION 1MRAD TOTAL DOSE

GROUP A SUBGROUPS 7, 8A, 8B

Figure 3b: Functionality

Subgroup

Definition

Static characteristics specified in Table 3a at +25°C

Static characteristics specified in Table 3a at +125°C

Static characteristics specified in Table 3a at -55°C

Functional characteristics specified in Table 3c at +25°C

Functional characteristics specified in Table 3c at +125°C

Functional characteristics specified in Table 3c at -55°C

Switching characteristics specified in Table 3b at +25°C

Switching characteristics specified in Table 3b at +125°C

Switching characteristics specified in Table 3b at -55°C

Figure 4: Definition of Subgroups

4/15

MA7001

Input Pulse Levels

GND to 3.0V

5ns

Output

under test

Test Point

Input Rise and Fall Times

Input Timing Reference Levels

Output Reference Levels

Output Load

1.5V

≤50pF*

See Figure 7

* Includes jig

and scope

capacitances

Figure 5: AC Test Conditions

LOAD 1

Figure 7: Output Load

Symbol

Parameter

Conditions

Max.

Unit

C_IN

Input Capacltance (Note 1)

V_IN= 0V

C_OUT

Output Capacitance (Notes 1 and 2)

V_OUT= 0V

NOTES:

1. Characterized values, not currently tested.

2. With output deselected.

Figure 6: Capacitance

TRUTH TABLES

Operation

Input

Output

FF Data

Pointer

Read

Write

Reset

Zero

N/C

Retransmit*

Read

Write

1→0

valid Increment

N/C

1→0

Increment

N/C

* Only available if less than 512 writes since last reset.

Figure 8: Single Device or Width Expansion: Read, Write, Reset and Retransmit

Input

Output

Pointer

Operation

FF Data

Read

Write

Reset First

Reset Rest

Zero

NOTES:

1. See Modes of Operation for connections of Xl and XO in depth expansion mode.

2. XI is connected to XO of previous device (Figure 12).

Figure 9: Depth Expansion: Reset and First Load

5/15

MA7001

SIGNAL DESCRIPTIONS

Reset (RS)

As a WRITE operation is being performed to the last physical

memory location (511th) whilst the READ pointer is waiting at

the 510th physical location the FULL flag is activated for a

duration less than 20ns.

Reset occurs when RS is in a low state, setting both read and

write pointers to the first location in memory. Reset is required

prior to the first write. Both READ (R) and WRITE (W) signals

must be in high states during reset.

Note: The last physical location (511th) is accessed after 511

WRITE or READ operations after RESET.

Read Enable (R):

Providing the EMPTY FLAG (EF) is not set, i.e. there is still

data to be read, a read cycle commences on the falling edge of

R, (see Figure 16). Data is read in a First-ln First-Out manner

independent of write operations. When reads are disabled

data outputs (Q0 - Q8) are in a high impedance state. Reading

the last available memory location sets the EMPTY FLAG

(EF), which is cleared following a write cycle.

Empty Flag (EF):

Following an initial RESET EF is active, becoming inactive

after the first write cycle, (see Figure 20). EF becomes active

once the read and write pointers are coincident following a

read cycle. Reading will not take place whilst EF is active, and

may only proceed once a write cycle has occured.

Write Enable (W):

EF will go high t_WEFafter completion of a valid WRITE

operation. EF will again go low t_REFfrom the beginning of a

subsequent READ operation, provided that a second WRITE

has not been completed. Reads beginning t_EFRafter EF goes

high, are valid. Reads begun after EF goes low and ending

more than t_RPIbefore EF goes high, are invalid (ignored).

Reads beginning less than t_RIPbefore EF goes high and less

than t_EFRlater, may or may not occur (be valid) depending on

the internal flag status (See Figure 21). If a Read to the last but

one physical location completes while the last location (511th)

is being written, the EF will not be activated. The next Read

should be activated after the last Write has completed.

Providing the FULL FLAG (FF) is not set, i.e. there exists at

least one memory location for writing, a write cycle

commences on the falling edge of (W), (see Figure 17). Data is

written into consecutive memory locations independent of read

operations on the rising edge of W. Data set up and hold times

are with respect to the rising edge of W.

Expansion In (Xl):

There are two possible modes of operation for the FIFO. One

with Xl grounded in which the device is in singledevice mode,

the other is a depth expension mode or daisy chain

configuration. In the latter mode Xl inputs come from

EXPANSION OUT (XO) outputs of the device preceding it in

the chain.

First Load/Retransmit (FL/RT):

This is a dual purpose input depending on the mode of

operation of the device. In single device mode Xl = 0 data may

be retransmitted, i.e. it may be re-read. In depth expansion

mode FL signifies the first device in the chain. When RT is

pulsed low the read pointer is set to the first memory location.

The write pointer is unaffected. This feature is disabled in

depth expansion mode, and can only be applied when R and

W are inactive (See Figure 22).

Expansion Out (XO):

In depth expansion mode XO from one device signals the next

device in the chain that the last location in its memory has been

accessed.

Full Flag (FF):

FF becomes active when the last available memory location

has been written to, (see Figure 18). In general, this occurs

whenever the write pointer coincides with the read pointer

following a write cycle. Writes are inhibited while FF is active,

and may only proceed after a read cycle has occured.

Data Inputs (D0 - D8): Data inputs, 9 bit word, for write

operations.

Data Outputs (Q0 - Q8):

Data outputs, 9 bit word, for read operations. When R is

inactive these outputs are in a high impedance state.

FF will go high t_RFFafter completion of a valid READ operation.

FF will go low t_WFFfrom the beginning of a subsequent WRITE

operation, provided that a second READ has not been

completed. Writes beginning t_FFWafter FF goes high, are valid.

Writes beginning after FF goes low and ending more than t_WPI

before FF goes high, are invalid (ignored). Writes beginning

less than twpl before FF goes high and less than t_FFWlater,

may or may not occur (be valid) depending on the internal flag

status (see Figure 19).

If a Write to the last but one physical location completes while

the last location (511th) is being Read, the FF will not be

activated. The next Read should start after the last Write has

completed.

6/15

MA7001

MODES OF OPERATION

Single Device Mode:

Depth Expansion Mode:

The single device mode is used with Xl grounded. (See Figure

10). In this mode the retransmit facility may be used to re-read

the data when less than 512 have been performed between

resets.

This has applications where more than 512 words are

required. The RETRANSMIT facility is not available in this

mode.

Two or more devices are organised in a daisy chain. The first

device in the chain has FL grounded, all others have FL in high

states. XO of each device is connected to XI of the next device

in the chain.

Width Expansion Mode:

In this mode two or more devices are used, depending on the

word length required, with the same control inputs applied to

each. The same operations are applied to all devices, thus

warning flags EF and FF are available from any or all of the

devices. Output Signals from devices in this mode should not

be merged. Figure 11 illustrates two devices configured in

width expansion mode to give an 18 bitword, (512 x 18).

The same read, write and reset signals are applied to each

device. External logic is required to form new empty and full

flags, i.e. all EF’s are ORed together and all FF’s are ORed

together to form new empty and full flags respectively.

Figure 12 illustrates depth expansion of 2 devices (1024 x 9).

Figure 10: Single Device Mode (512 x 9 bits)

Figure 11: Width Expansion Mode (512 x 18 bits)

7/15

MA7001

Figure 12: Depth Expansion Mode (1024 x 9 bits)

Compound Expansion Mode:

Bidirectional Mode:

Both width and depth expansion can be implemented into the

same expansion block. Note that no control signals are in

conflict in either of the two expansion modes, i.e. width or

depth expansion modes. Utilising compound expansion large

FIFO arrays are possible. Figure 13 illustrates the use of

compound expansion.

The FIFO is a unidirectional device, i.e. one system reads,

another writes. In cases where full communication is required

between two or more systems, two or more groups of devices

can be used. These groups can utilise any or all of the

expansion modes already mentioned. Figure 14 illustrates 2

systems connected so that each can transmit data to and

recieve data from each other, (see Modes of Operation for

connection of control and data signals).

Figure 13: Compound Expansion

8/15

MA7001

Figure 14: Bidirectional Mode (512 x 9 bits each way)

EMPTY FLAG

GOES 'HIGH'

AFTER WRITE

(See Figure 20)

Figure 15: Reset

Figure 16: Asynchronous Read

9/15

MA7001

Figure 17: Asynchronous Write

Figure 18: Read/Write to Full Flag

Figure 19: Write and Full Flag

10/15

MA7001

Figure 20: Write/Read to Empty Flag

Figure 21: Read and Empty Flag

Figure 22: Retransmit Timing

11/15

MA7001

OUTLINES AND PIN ASSIGNMENTS

Ref.

Min.

Nom.

Max.

5.71 (0.225)

1.53 (0.060)

0.59 (0.023)

0.36 (0.014)

36.02 (1.418)

A₁

0.38 (0.015)

0.35 (0.014)

0.20 (0.008)

2.54 (0.100) typ.

e₁

M_E

15.24 (0.600) typ.

4.71 (0.185)

5.38 (0.212)

15.90 (0.626)

1.53 (0.060)

Dimensions in mm (inches)

Figure 23: 28 Lead Ceramic DIL (Solder Seal) - Package Style C

12/15

MA7001

Ref.

Min.

Nom.

Max.

2.97 (0.117)

A₁

(0.026)

(0.015)

0.48 (0.019)

0.15 (0.006)

18.49 (0.728)

0.10 (0.003)

18.08 (0.712)

1.27 (0.050) typ.

(0.315)

(0.365)

12.50 (0.492)

(0.372)

12.09 (0.508)

(0.388)

Dimensions in mm (inches)

Figure 24: 28 Lead Ceramic Flatpack (Solder Seal) - Package Style F

13/15

MA7001

RADIATION TOLERANCE

Total Dose Radiation Testing

For product procured to guaranteed total dose radiation

levels, each wafer lot will be approved when all sample

devices from each lot pass the total dose radiation test.

The sample devices will be subjected to the total dose

radiation level (Cobalt-60 Source), defined by the ordering

code, and must continue to meet the electrical parameters

specified in the data sheet. Electrical tests, pre and post

irradiation, will be read and recorded.

GEC Plessey Semiconductors can provide radiation

testing compliant with MIL-STD-883 test method 1019,

Ionizing Radiation (Total Dose).

Total Dose (Function to specification)*

Transient Upset (Stored data loss)

Transient Upset (Survivability)

Neutron Hardness (Function to specification)

Single Event Upset**

1x10⁵Rad(Si)

5x10¹⁰Rad(Si)/sec

>1x10¹²Rad(Si)/sec

>1x10¹⁵n/cm²

3.4x10^-9Errors/bit day

Not possible

Latch Up

* Other total dose radiation levels available on request

** Worst case galactic cosmic ray upset - interplanetary/high altitude orbit

Figure 25: Radiation Hardness Parameters

ORDERING INFORMATION

Unique Circuit Designator

MAx7001xxxxx

Radiation Tolerance

Radiation Hard Processing

100 kRads (Si) Guaranteed

QA/QCI Process

(See Section 9 Part 4)

Package Type

Test Process

(See Section 9 Part 3)

Ceramic DIL (Solder Seal)

Flatpack (Solder Seal)

Naked Die

Assembly Process

(See Section 9 Part 2)

Reliability Level

Rel 0

Rel 1

Rel 2

Rel 3/4/5/STACK

Class B

Class S

For details of reliability, QA/QC, test and assembly

options, see ‘Manufacturing Capability and Quality

Assurance Standards’ Section 9.

14/15

POWER ASSEMBLY CAPABILITY

The Power Assembly group was set up to provide a support service for those customers requiring more than the basic

semiconductor, and has developed a flexible range of heatsink and clamping systems in line with advances in device voltages

and current capability of our semiconductors.

We offer an extensive range of air and liquid cooled assemblies covering the full range of circuit designs in general use today.

The Assembly group offers high quality engineering support dedicated to designing new units to satisfy the growing needs of

our customers.

Using the latest CAD methods our team of design and applications engineers aim to provide the Power Assembly Complete

Solution (PACs).

HEATSINKS

The Power Assembly group has its own proprietary range of extruded aluminium heatsinks which have been designed to

optimise the performance of Dynex semiconductors. Data with respect to air natural, forced air and liquid cooling (with flow

rates) is available on request.

For further information on device clamps, heatsinks and assemblies, please contact your nearest sales representative or

Customer Services.

http://www.dynexsemi.com

e-mail: power_solutions@dynexsemi.com

HEADQUARTERS OPERATIONS

CUSTOMER SERVICE

Tel: +44 (0)1522 502753 / 502901. Fax: +44 (0)1522 500020

DYNEX SEMICONDUCTOR LTD

Doddington Road, Lincoln.

SALES OFFICES

Lincolnshire. LN6 3LF. United Kingdom.

Tel: +44-(0)1522-500500

Fax: +44-(0)1522-500550

Benelux, Italy & Switzerland: Tel: +33 (0)1 64 66 42 17. Fax: +33 (0)1 64 66 42 19.

France: Tel: +33 (0)2 47 55 75 52. Fax: +33 (0)2 47 55 75 59.

Germany, Northern Europe, Spain & Rest Of World: Tel: +44 (0)1522 502753 / 502901.

Fax: +44 (0)1522 500020

North America: Tel: (613) 723-7035. Fax: (613) 723-1518. Toll Free: 1.888.33.DYNEX (39639) /

Tel: (949) 733-3005. Fax: (949) 733-2986.

These offices are supported by Representatives and Distributors in many countries world-wide.

UNITED KINGDOM

Datasheet Annotations:

Dynex Semiconductor annotate datasheets in the top right hard corner of the front page, to indicate product status. The annotations are as follows:-

Target Information: This is the most tentative form of information and represents a very preliminary specification. No actual design work on the product has been started.

Preliminary Information: The product is in design and development. The datasheet represents the product as it is understood but details may change.

Advance Information: The product design is complete and final characterisation for volume production is well in hand.

No Annotation: The product parameters are fixed and the product is available to datasheet specification.

This publication is issued to provide information only which (unless agreed by the Company in writing) may not be used, applied or reproduced for any purpose nor form part of any order or contract nor to be regarded

as a representation relating to the products or services concerned. No warranty or guarantee express or implied is made regarding the capability, performance or suitability of any product or service. The Company

reservestherighttoalterwithoutpriornoticethespecification, designorpriceofanyproductorservice. Informationconcerningpossiblemethodsofuseisprovidedasaguideonlyanddoesnotconstituteanyguarantee

that such methods of use will be satisfactory in a specific piece of equipment. It is the user's responsibility to fully determine the performance and suitability of any equipment using such information and to ensure

that any publication or data used is up to date and has not been superseded. These products are not suitable for use in any medical products whose failure to perform may result in significant injury

or death to the user. All products and materials are sold and services provided subject to the Company's conditions of sale, which are available on request.

All brand names and product names used in this publication are trademarks, registered trademarks or trade names of their respective owners.

www.dynexsemi.com

MAS7001CL [DYNEX]

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