EM4100B5WS11E [EMMICRO]
Read Only Contactless Identification Device; 只读非接触式识别装置
| 型号： | EM4100B5WS11E |
| 厂家： | 
EM MICROELECTRONIC - MARIN SA |
| 描述： | Read Only Contactless Identification Device |
| 文件： | 总9页 (文件大小：320K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
R
EM MICROELECTRONIC - MARIN SA
EM4100
Read Only Contactless Identification Device
Description
Features
The EM4100 (previously named H4100) is a CMOS
integrated circuit for use in electronic Read Only RF
Transponders. The circuit is powered by an external coil
placed in an electromagnetic field, and gets its master
clock from the same field via one of the coil terminals. By
turning on and off the modulation current, the chip will send
back the 64 bits of information contained in a factor y pre-
programmed memory array.
□
□
□
□
□
□
□
64 bit memory array laser programmable
Several options of data rate and coding available
On chip resonance capacitor
On chip supply buffer capacitor
On chip voltage limiter
Full wave rectifier on chip
Large modulation depth due to a low impedance
modulation device
The programming of the chip is performed by laser fusing
of polysilicon links in order to store a unique code on each
chip.
□
□
□
Operating frequency 100 - 150 kHz
Very small chip size convenient for implantation
Very low power consumption
The EM4100 has several metal options which are used to
define the code type and data rate. Data rates of 64, 32
and 16 periods of carrier frequency per data bit are
available. Data can be coded as Manchester, Biphase or
PSK.
Due to low power consumption of the logic core, no supply
buffer capacitor is required. Only an external coil is needed
to obtain the chip function. A parallel resonance capacitor
of 74 pF is also integrated.
Applications
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□
□
□
Logistics automation
Anticounterfeiting
Access control
Industrial transponder
Typical Operating Configuration
Pin Assignment
Coil1
VSS
VDD
EM4100
EM4100
Coil2
COIL2
COIL1
L: typical 21.9mH for fo = 125kHz
COIL1
COIL2
Coil terminal / Clock input
Coil terminal
Fig. 1
Fig. 2
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EM4100
Absolute Maximum Ratings
Operating Conditions
Parameter
Symbol
ICOIL
Conditions
±30mA
Parameter
Symbol Min. Typ. Max. Units
Maximum DC Current forced
on COIL1 & COIL2
Operating Temp.
Top
-40
+85
°C
Maximum Coil
Current
ICOIL
10
mA
Power Supply
VDD
-0.3 to 7.5V
Storage Temp. Die form
Storage Temp. PCB form
Tstore
Tstore
-55 to +200°C
-55 to +125°C
AC Voltage on Coil
Supply Frequency
Vcoil
fcoil
3
14*
Vpp
100
150 kHz
Electrostatic discharge
maximum to MIL-STD-883C
method 3015
VESD
1000V
*) The AC Voltage on Coil is limited by the on chip voltage
limitation circuitry. This is according to the parameter Icoil in
the absolute maximum ratings.
Stresses above these listed maximum ratings may cause
permanent damage to the device.
Exposure beyond specified operating conditions max affect
device reliability or cause malfunction.
Handling Procedures
This device has built-in protection against high static
voltages or electric fields; however due to the unique
properties of this device, anti-static precautions should be
taken as for any other CMOS component.
System Principle
Transponder
Tranceiver
Coil1
Antenna
Oscillator
Driver
EM4100
Coil2
Filter
and
Demodulator
Gain
Data received
from transponder
Data decoder
Signal on coils
Transponder coil
Transeiver coil
RF Carrier
Data
Fig. 3
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EM4100
Electrical Characteristics
VDD = 1.5V, VSS = 0V, fC1 = 134kHz square wave, Ta = 25°C
VC1 = 1.0V with positive peak at VDD and negative peak at VDD -1V unless otherwise specified
Parameter
Supply Voltage
Symbol Test Conditions
Min.
1.5
Typ.
Max.
1)
Units
V
VDD
Rectified Supply Voltage
Coil1 - Coil2 Capacitance
VDDREC
Cres
V
COIL1 - VCOIL2 = 2.8 VDC
1.5
V
Modulator switch = “ON”
Vcoil=100mVRMS f=10kHz
74 2)
120
pF
pF
Power Supply Capacitor
Biphase & Manchester
Versions
Csup
IDD
0.63
1.5
µA
Supply Current
VONC2
V
DD=1.5V IVDDC2=100µA with ref. to VDD
0.9
2.1
1.1
2.3
1.3
2.8
V
V
C2 pad Modulator ON
voltage drop
VDD=5.0V IVDDC2=1mA with ref. to VDD
VONC1
VDD=5.0V IVDDC1=1mA with ref. to VDD
2.1
2.3
2.8
V
C1 pad Modulator ON
voltage drop
PSK Version
Supply Current PSK
IDDPSK
0.92
0.6
2
µA
V
VONC2PSK
VDD=1.5V IVDDC2=100µA with ref. to VDD
0.3
0.9
C2 pad Modulator ON
voltage drop
Note 1) The maximum voltage is defined by forcing 10mA on COIL1 - COIL2
Note 2) The tolerance of the resonant capacitor is ± 15% over the whole production.
Optional reduced tolerance on request
On a wafer basis, the tolerance is ± 2%
Timing Characteristics
VDD = 1.5V, VSS = 0V, fcoil = 134kHz square wave, Ta = 25°C
VC1 = 1.0V with positive peak at VDD and negative peak at VDD -1V unless otherwise specified
Timings are derived from the field frequency and are specified as a number of RF periods.
Parameter
Symbol
Test Conditions
Value
64, 32, 16
Units
RF periods
Read Bit Period
Trdb
depending on option
Timing Waveforms
TOC
64, 32 or 16 TOC, depending on option
COIL1
BIT n
BIT n+1
BIT n+2
Serial Data Out
Fig. 4
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EM4100
Block Diagram
CLOCK
EXTRACTOR
a
Logic
Clock
COIL1
VDD
AC1
+
Cres
Csup
FULL WAVE
RECTIFIER
MEMORY
ARRAY
SEQUENCER
-
AC2
VSS
COIL2
Serial
Data Out
DATA
MODULATOR
DATA
ENCODER
Modulation
Control
a: open only for PSK version
Fig. 5
Data Modulator
Functional Description
The data modulator is controlled by the signal Modulation
Control in order to induce a high current in the coil. In the
PSK version, only COIL2 transistor drives this high current.
In the other versions, both coil1 and coil2 transistors drive it
to Vdd. This will affect the magnetic field according to the
data stored in the memory array.
General
The EM4100 is supplied by means of an electromagnetic
field induced on the attached coil. The AC voltage is
rectified in order to provide a DC internal supply voltage.
When the last bit is sent, the chip will continue with the first
bit until the power goes off.
Resonance Capacitor
Full Wave Rectifier
This capacitor can be trimmed in factory by 0.5pf steps to
achieve the absolute value of 74pf typically. This option,
which is on request, allows a smaller capacitor tolerance on
the whole of the production.
The AC input induced in the external coil by an incident
magnetic field is rectified by a Graetz bridge. The bridge
will limit the internal DC voltage to avoid malfunction in
strong fields.
Clock Extractor
One of the coil terminals (COIL1) is used to generate the
master clock for the logic function. The output of the clock
extractor drives a sequencer.
Sequencer
The sequencer provides all necessary signals to address
the memory array and to encode the serial data out.
Three mask programmed encoding versions of logic are
available. These three encoding types are Manchester,
biphase and PSK. The bit rate for the first and the second
type can be 64 or 32 periods of the field frequency. For the
PSK version, the bit rate is 16.
The sequencer receives its clock from the COIL1 clock
extractor and generates every internal signal controlling the
memory and the data encoder logic.
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EM4100
Memory Array for Manchester & Bi-Phase encoding ICs
The EM4100 contains 64 bits divided in five groups of
information. 9 bits are used for the header, 10 row parity
bits (P0-P9), 4 column parity bits (PC0-PC3), 40 data bits
(D00-D93), and 1 stop bit set to logic 0.
Memory Array for PSK encoding ICs
The PSK coded IC's are programmed with odd parity for P0
and P1 and always with a logic zero.
The parity bits from P2 to P9 are even.
The column parity PC0 to PC3 are calculated including the
version bits and are even parity bits.
1
1
1
1
1
1
1
1
1
9 header bits
8 version bits or
customer ID
D00 D01 D02 D03 P0
D10 D11 D12 D13 P1
D20 D21 D22 D23 P2
D30 D31 D32 D33 P3
D40 D41 D42 D43 P4
D50 D51 D52 D53 P5
D60 D61 D62 D63 P6
D70 D71 D72 D73 P7
D80 D81 D82 D83 P8
Code Description
Manchester
32 data bits
There is always a transition from ON to OFF or from OFF
to ON in the middle of bit period. At the transition from
logic bit “1” to logic bit “0” or logic bit “0” to logic bit “1” the
phase change. Value high of data stream presented below
modulator switch OFF, low represents switch ON
(see Fig. 6).
D90 D91 D92 D93 P9 10 line parity
PC0 PC1 PC2 PC3 S0 bits
Biphase Code
4 column parity bits
At the beginning of each bit, a transition will occur. A logic
bit “1” will keep its state for the whole bit duration and a
logic bit “0” will show a transition in the middle of the bit
duration (see Fig. 7).
The header is composed of the 9 first bits which are all
mask programmed to "1". Due to the data and parity
organisation, this sequence cannot be reproduced in the
data string. The header is followed by 10 groups of 4 data
bits allowing 100 billion combinations and 1 even row parity
bit. Then, the last group consists of 4 event column parity
bits without row parity bit. S0 is a stop bit which is written to
"0"
PSK Code
Modulation switch goes ON and OFF alternately every
period of carrier frequency. When a phase shift occurs, a
logical "0" is read from the memory. If no shift phase
occurs after a data rate cycle, a logical "1" is read
(see Fig. 8).
Bits D00 to D03 and bits D10 to D13 are customer specific
identification.
These 64 bits are outputted serially in order to control the
modulator. When the 64 bits data string is outputted, the
output sequence is repeated continuously until power goes
off.
Manchester Code
Binary data
X
1
1
1
1
1
1
1
1
1
0
1
0
1
0
0
0
1
1
0
Memory output
Modulator control
Modulation control "low" means high current
Fig. 6
Biphase Code
0
1
1
0
1
0
0
1
Binary data
Memory output
Modulator control
Modulation control "low" means high current
Fig. 7
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EM4100
PSK Code
Serial Data Out
COIL1
Modulator control
"0" ON SERIAL OUT
"1" ON SERIAL OUT
Modulation control "low" means high current
Fig. 8
Typical Performance Characteristics
Typical Capacitor Variation versus Temperature
Dynamic Consumption Versus temperature with Vdd-
Vss=1.5V
101
100.8
100.6
100.4
100.2
100
1.4
1.2
PSK
1
0.8
0.6
0.4
0.2
0
Manchester
and biphase
99.8
99.6
-50
-25
0
25
50
75
100
-50
-25
0
25
50
75
100
Temperature [ °C ]
Temperature [°C]
Fig. 9
Fig. 10
Rectified Voltage versus temperature for
Vcoil2-Vcoil1=2.8V
L versus Resonance Frequency versus for a typical
coil capacitance of 74 pf
2
1.95
1.9
40
35
30
25
20
15
10
1.85
1.8
1.75
1.7
1.65
-50
-25
0
25
50
75
100
100
110
120
130
140
150
Temperature [°C]
Frequency [KHz]
Fig. 12
Fig. 11
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EM4100
CHIP Dimensions
EM4100
747
14
499
378
1041
517
142
716
Y
1016
X
Vss, Vdd pad size : 76 X 76
C1, C2 pad size : 95 X 95
All dimensions in µm
Fig. 13
CID Package
PCB Package
FRONT VIEW
Y
Z
K
J
SYMBOL
MIN
8.2
3.8
TYP
8.5
4.0
6.0
0.5
1.3
0.4
0.44
0.127
0.5
MAX
8.8
4.2
TOP VIEW
B
A
B
D
e
F
g
J
K
R
X
5.8
6.2
0.38
1.25
0.3
0.42
0.115
0.4
0.62
1.35
0.5
0.46
0.139
0.6
MARKING
AREA
D
A
C2
C1
Dimensions are in mm
R
SYMBOL MIN
TYP
MAX
e
X
Y
Z
8.0
4.0
C2
C1
1.0
F
F
Dimensions are in mm
g
Fig. 14
Fig. 15
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EM4100
Ordering Information
Packaged Devices
This chart shows general offering; for detailed Part Number to order, please see the table “Standard Versions” below.
EM4100 A6 CI2LC %%%
-
Version:
Customer Version:
A6 = Manchester, 64 clocks per bit
A5 = Manchester, 32 clocks per bit
B6 = Bi-phase, 64 clocks per bit
B5 = Bi-phase, 32 clocks per bit
C4 = PSK, 16 clocks per bit
%%% = only for custom specific version
Package/Card & Delivery Form:
CI2LC = CID Pack, 2 pins (length 2.5mm), in bulk
CI2LB = CID Pack, 2 pins (length 2.5mm), in tape & reel
CB2RC = PCB Package, 2 pins, in bulk
Die Form
This chart shows general offering; for detailed Part Number to order, please see the table “Standard Versions” below.
EM4100 A6 WS 11 E %%%
-
Version:
Customer Version:
A6 = Manchester, 64 clocks per bit
A5 = Manchester, 32 clocks per bit
B6 = Bi-phase, 64 clocks per bit
B5 = Bi-phase, 32 clocks per bit
C4 = PSK, 16 clocks per bit
%%% = only for custom specific version
Bumping:
" " (blank) = no bumps
E = with Gold Bumps (note 2)
Die form:
Thickness:
WW = Wafer
7 = 7 mils (178um)
11 = 11 mils (280um)
27 = 27 mils (686um)
WS = Sawn Wafer/Frame
WT = Sticky Tape
WP = Waffle Pack (note 1)
Remarks:
•
•
For ordering please use table of “Standard Version” table below.
For specifications of Delivery Form, including gold bumps, tape and bulk, as well as possible other delivery form or
packages, please contact EM Microelectronic-Marin S.A.
•
•
Note 1: This is a non-standard package. Please contact EM Microelectronic-Marin S.A for availability.
Note 2 : Direct connection using this version is subject to license. Please contact info@emmicroelectronic.com
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EM4100
Standard Versions:
The versions below are considered standards and should be readily available. For other versions or other delivery form, please
contact EM Microelectronic-Marin S.A. Sales Office. Please make sure to give complete part number when ordering, without
spaces.
Cycle/
bit
Part Number
Bit coding
Package/Card/Die Form
Delivery Form
/ Bumping
EM4100A5CB2RC
EM4100A5CI2LC
EM4100A6CB2RC
EM4100A6CI2LB
EM4100A6CI2LC
EM4100A6WP7
Manchester
Manchester
Manchester
Manchester
Manchester
Manchester
Manchester
Manchester
Manchester
Bi-phase
32 PCB Package, 2 pins
bulk
32 CID package, 2 pins (length 2.5mm)
64 PCB Package, 2 pins
bulk
bulk
64 CID package, 2 pins (length 2.5mm)
64 CID package, 2 pins (length 2.5mm)
64 Die in waffle pack, 7 mils
64 Sawn wafer, 7 mils
tape
bulk
no bumps
no bumps
no bumps
no bumps
bulk
EM4100A6WS7
EM4100A6WT7
64 Die on sticky tape, 7 mils
64 Unsawn wafer, 7 mils
EM4100A6WW7
EM4100B5CB2RC
EM4100B5CI2LC
EM4100B6CB2RC
EM4100B6CI2LC
EM4100C4WS11
EM4100XXYYY-%%%
32 PCB Package, 2 pins
Bi-phase
32 CID package, 2 pins (length 2.5mm)
64 PCB Package, 2 pins
bulk
Bi-phase
bulk
Bi-phase
64 CID package, 2 pins (length 2.5mm)
16 Sawn wafer, 11 mils thickness
custom
bulk
PSK
no bumps
custom
custom
Product Support
Check our Web Site under Products/RF Identification section.
Questions can be sent to info@emmicroelectronic.com
EM Microelectronic-Marin SA cannot assume responsibility for use of any circuitry described other than circuitry entirely embodied in an EM
Microelectronic-Marin SA product. EM Microelectronic-Marin SA reserves the right to change the circuitry and specifications without notice at any
time. You are strongly urged to ensure that the information given has not been superseded by a more up-to-date version.
© EM Microelectronic-Marin SA, 0804 Rev. G
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