74VCXH162373T [ETC]

LATCH|DUAL|8-BIT|VCX-CMOS|TSSOP|48PIN|PLASTIC ;
74VCXH162373T
型号: 74VCXH162373T
厂家: ETC    ETC
描述:

LATCH|DUAL|8-BIT|VCX-CMOS|TSSOP|48PIN|PLASTIC

逻辑集成电路 光电二极管 驱动
文件: 总10页 (文件大小:85K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
74VCXH162373  
LOW VOLTAGE 16-BIT D-TYPE LATCH (3-STATE)  
WITH 3.6V TOLERANT INPUTS AND OUTPUTS  
PRELIMINARY DATA  
3.6VTOLERANT INPUTS ANDOUTPUTS  
HIGH SPEED:  
PD =3.3 ns (MAX.)atVCC = 3.0 to3.6V  
PD =4.5 ns (MAX.)atVCC = 2.3 to2.7V  
t
t
POWER-DOWN PROTECTIONON INPUTS  
AND OUTPUTS  
T
(TSSOP48 Package)  
SYMMETRICAL OUTPUT IMPEDANCE:  
|IOH| = IOL = 12 mA (MIN) at VCC = 3.0V  
|IOH| = IOL = 8 mA (MIN) at VCC =2.3V  
26SERIERESISTORSIN OUTPUTS  
OPERATING VOLTAGERANGE:  
VCC (OPR)= 1.8V to 3.6V  
ORDER CODES :  
74VCXH162373T  
PIN CONNECTION  
PIN AND FUNCTION COMPATIBLEWITH  
74 SERIES16373  
LATCH-UPPERFORMANCE EXCEEDS300mA  
ESDPERFORMANCE:  
HBM >2000V; MM > 200V  
DESCRIPTION  
The VCXH162373 is a low voltage CMOS 16-BIT  
D-TYPE LATCH with 3 STATE OUTPUTS NON  
INVERTING fabricatedwith sub-micron silicon gate  
and five-layer metal wiring C2MOS technology.It is  
ideal for low powerand very high speed 2.3 to 3.6V  
applications; it can be interfaced to 3.6V signal  
enviromentfor bothinputsand outputs.  
These 16 bit D-Type latchs are byte controlled by  
two latch enable inputs (nLE) and two output  
enable inputs (OE). While the nLE input is held at  
a high level, the nQ outputs will follow the data  
input precisely. When the nLE is taken low, the  
nQ outputs will be latched precisely at the logic  
level of D input data. While the (nOE) input is low,  
the nQ outputs will be in a normal logic state  
(high or low logic level) and while high level the  
outputs will be in a high impedance state. This  
device is designed to be used with 3 state  
memory address drivers, etc.  
The device circuits is including 26series  
resistance in the outputs. These resistors permit  
to reduce line noise in high speed applications.  
All inputs and outputs are equipped with  
protection circuits against static discharge, giving  
them 2KV ESD immunity and transient excess  
voltage.  
1/10  
December 1999  
74VCXH162373  
INPUT AND OUTPUT EQUIVALENT CIRCUIT  
PIN DESCRIPTION  
IEC LOGIC SYMBOLS  
PIN No  
SYMBOL NAME AND FUNCTION  
1
1OE  
3 State Output Enable  
Input (Active LOW)  
2,3,5,6,  
1Q0to1Q7 3 State Outputs  
8,9,11,12  
13,14, 16,17, 2Q0to2Q7 3 State Outputs  
19, 20, 22, 23  
24  
2OE  
3 State Output Enable  
Input (Active LOW)  
25  
2LE  
Latch Enable Input  
36,35, 33,32, 2D0 to2D7 Data Inputs  
30, 29, 27, 26  
47,46, 44,43, 1D0 to1D7 Data Inputs  
41, 40, 38, 37  
48  
1LE  
Latch Enable Input  
Ground (0V)  
4,10, 15,21,  
28, 34, 39, 45  
GND  
7, 18, 31, 42  
VCC  
Positive Supply Voltage  
TRUTH TABLE  
INPUTS  
OUTPUTS  
OE  
H
LE  
X
D
X
X
L
Q
Z
L
L
NO CHANGE *  
L
H
L
L
H
H
H
X:Don’t care  
Z:Highimpedance  
* Qoutput arelatchedatthe timewhen the LEinputistaken low level.  
2/10  
74VCXH162373  
LOGIC DIAGRAM  
ABSOLUTE MAXIMUM RATINGS  
Symbol  
VCC  
VI  
Parameter  
Value  
-0.5to+ 4.6  
-0.5to+ 4.6  
-0.5to+ 4.6  
-0.5toVCC +0.5  
-50  
Unit  
V
Supply Voltage  
DC Input Voltage  
V
VO  
DC Output Voltage (OFF state)  
DC Output Voltage (High or Low State) (note1)  
DC Input Diode Current  
V
VO  
V
IIK  
mA  
mA  
mA  
mA  
mW  
oC  
IOK  
DC Output Diode Current (note2)  
DC Output Source/Sink Current  
± 50  
IO  
± 50  
ICC orIGND DC VCC or Ground Current Per Supply Pin  
100  
±
PD  
Tstg  
TL  
Power Dissipation  
400  
-65to+150  
300  
Storage Temperature  
Lead Temperature (10 sec)  
oC  
AbsoluteMaximum Ratingsarethose values beyond whichdamage tothe device may occur. Functional operation under these condition isnot implied.  
1)IO absolute maximum ratingmustbeobserved  
2)VO < GND, VO >VCC  
RECOMMENDED OPERATING CONDITIONS  
Symbol  
VCC  
Parameter  
Value  
2.3to3.6  
-0.3to3.6  
0to3.6  
Unit  
V
Supply Voltage  
Input Voltage  
VI  
V
VO  
Output Voltage (OFF state)  
V
VO  
Output Voltage (High or Low State)  
0toVCC  
V
IOH,IOL  
IOH,IOL  
Top  
High or Low Level Output Current (VCC = 3.0 to 3.6V)  
High or Low Level Output Current (VCC = 2.3 to 2.7V)  
Operating Temperature:  
12  
mA  
mA  
oC  
ns/V  
±
± 8  
-40to+85  
0to10  
dt/dv  
Input Transition Rise or Fall Rate (VCC = 3.0V) (note 1)  
1)VIN from0.8Vto2.0V, VCC=3.0V  
3/10  
74VCXH162373  
DC SPECIFICATIONS  
(2.7V < VCC 3.6Vunless otherwise specified)  
Symbol  
Parameter  
Test Conditions  
Value  
-40 to 85 oC  
Unit  
VCC  
(V)  
Min.  
Max.  
VIH  
VIL  
High Level Input Voltage  
Low Level Input Voltage  
High Level Output Voltage  
2.0  
V
V
2.7 to 3.6  
0.8  
VOH  
2.7to3.6  
2.7  
I =-100 A  
VCC-0.2  
2.2  
µ
O
VI =V  
orVIL  
IH  
IO=-6mA  
IO=-8mA  
IO=-12 mA  
IO=100µA  
IO=6mA  
IO=8mA  
IO=12mA  
V
3.0  
2.4  
3.0  
2.2  
VOL  
Low Level Output Voltage  
2.7to3.6  
2.7  
0.2  
0.4  
0.55  
0.8  
±5  
VI =V  
IH  
V
orVIL  
3.0  
3.0  
II  
Input Leakage Current  
Input Hold Current  
2.7to3.6  
VI =VCC orGND  
µA  
µA  
I
V = 0.8V  
75  
I(HOLD)  
I
3
VI =2V  
-75  
3.6  
V = 0to3.6V  
I
500  
±
IOZ  
3 State Output Leakage Current  
2.7to3.6  
V = VIH orVIL  
I
10  
±
A
µ
VO =0to3.6V  
Ioff  
Power Off Leakage Current  
Quiescent Supply Current  
0
V orVO = 0 to 3.6V  
10  
20  
µA  
I
ICC  
2.7to3.6  
VI =VCC orGND  
A
µ
VI orVO = VCCto3.6V  
20  
±
I
ICC incr. per input  
2.7to3.6  
VIH =VCC -0.6V  
750  
A
µ
CC  
DC SPECIFICATIONS (2.3V < VCC 2.7Vunless otherwise specified)  
Symbol  
Parameter  
Test Conditions  
Value  
-40 to 85 oC  
Unit  
VCC  
(V)  
Min.  
Max.  
VIH  
VIL  
High Level Input Voltage  
Low Level Input Voltage  
High Level Output Voltage  
1.6  
V
V
2.3 to 2.7  
0.7  
VOH  
2.3to2.7  
2.3  
IO=-100 µA  
IO=-4mA  
IO=-6mA  
IO=-8mA  
VCC-0.2  
2.0  
VI =V  
orVIL  
IH  
V
V
2.3  
1.8  
2.3  
1.7  
VOL  
Low Level Output Voltage  
2.3to2.7  
2.3  
I =100 A  
0.2  
0.4  
0.6  
µ
O
VI =V  
IH  
IO=6mA  
IO=8mA  
orVIL  
2.3  
II  
Input Leakage Current  
Input Hold Current  
VI =VCC orGND  
5
±
A
µ
2.3 to 2.7  
I
V = 0.7V  
I
45  
A
µ
I(HOLD)  
2.3  
V = 1.7V  
I
-45  
IOZ  
3 State Output Leakage Current  
2.3to2.7  
V = VIH orVIL  
I
10  
±
A
µ
VO =0to3.6V  
VI orVO = 0to3.6V  
VI =VCC orGND  
Ioff  
Power Off Leakage Current  
Quiescent Supply Current  
0
10  
20  
µA  
ICC  
2.3to2.7  
A
µ
VI orVO = VCCto3.6V  
20  
±
4/10  
74VCXH162373  
o
DYNAMIC SWITCHING CHARACTERISTICS  
(Ta = 25 C, Input tr = tf = 2.0ns,CL = 30pF, RL = 500)  
Symbol  
Parameter  
Test Conditions  
Value  
TA = 25 oC  
Unit  
VCC  
(V)  
Min. Typ. Max.  
VOLP  
Dynamic Low Voltage Quiet Output  
(note 1, 3)  
2.5  
3.3  
2.5  
3.3  
2.5  
3.3  
0.25  
0.35  
-0.25  
-0.35  
2.05  
2.65  
V =0V  
V = VCC  
IH  
IL  
V
V
V
VOLV  
Dynamic Low Voltage Quiet Output  
(note 1, 3)  
V =0V  
IL  
V = VCC  
IH  
VOHV Dynamic High Voltage Quiet Output  
(note 2, 3)  
V =0V  
IL  
V = VCC  
IH  
1)Number ofoutputs defined asn. Measured with”n-1outputs switchingfrom HIGHtoLOWor LOW toHIGH. The remaining output ismeasured in  
theLOW state.  
2)Number ofoutputs defined asn. Measured with”n-1outputs switchingfrom HIGHtoLOWor LOW toHIGH. The remaining output ismeasured in  
theHIGHstate.  
3)Parameters guaranteed bydesign.  
AC ELECTRICAL CHARACTERISTICS  
(CL = 30 pF, RL = 500 , Input tr = t = 2.0 ns)  
f
Symbol  
Parameter  
Test Condition  
Value  
-40 to 85 oC  
Unit  
VCC  
Waveform  
(V)  
Min. Max.  
tPLH  
tPHL  
Propagation Delay Time Dn to Qn  
Propagation Delay Time LE to Qn  
Output Enable Time  
2.3to2.7  
3.0to3.6  
2.3to2.7  
3.0to3.6  
2.3to2.7  
3.0to3.6  
2.3to2.7  
3.0to3.6  
2.3to2.7  
3.0to3.6  
2.3to2.7  
3.0to3.6  
2.3to2.7  
3.0to3.6  
2.3to2.7  
3.0to3.6  
1.0  
0.8  
1.0  
0.8  
1.0  
0.8  
1.0  
0.8  
1.0  
1.0  
1.0  
1.0  
1.5  
1.5  
4.5  
3.3  
4.9  
3.6  
5.4  
3.9  
4.4  
4.0  
3
1
2
2
1
1
1
ns  
ns  
ns  
ns  
ns  
ns  
tPLH  
tPHL  
tPZL  
tPZH  
tPLZ  
tPHZ  
Output Disable Time  
ts  
th  
tw  
Setup Time, HIGH or LOW level Dn to  
LE  
Hold Time, HIGH or LOW level Dn to LE  
LE Pulse Width, HIGH  
ns  
ns  
tOSLH Output to Output Skew Time (note 1, 2)  
tOSHL  
0.5  
0.5  
1) Skewis defined astheabsolute value ofthe difference between theactual propagation delay for any twooutputs of thesame device switching inthe  
same direction, either HIGHor LOW (tOSLH = |tPLHm -tPLHn|,tOSHL =|tPHLm -tpHLn|)  
2) Parameter guaranteed bydesign  
CAPACITIVE CHARACTERISTICS  
Symbol  
Parameter  
Test Conditions  
Value  
TA = 25 oC  
Unit  
VCC  
(V)  
Min. Typ. Max.  
CIN  
Input Capacitance  
VIN =0VorVCC  
VIN =0VorVCC  
6
7
2.5or 3.3  
2.5or 3.3  
pF  
pF  
pF  
COUT Output Capacitance  
CPD  
Power Dissipation Capacitance (note 1) 2.5or 3.3  
f = 10MHz  
IN  
20  
VIN =0VorVCC  
1)CPD isdefined as thevalue ofthe IC’sinternal equivalent capacitance whichiscalculated fromthe operating current consumption without load. Average  
operting current canbe obtained bythe followingequation. ICC(opr)= CPD VCC fIN +ICC/16 (percircuit)  
5/10  
74VCXH162373  
TEST CIRCUIT  
TEST  
SWITCH  
Open  
6V  
tPLH, tPHL  
tPZL, tPLZ (VCC = 3.0 to 3.6V)  
tPZL, tPLZ (VCC = 2.3 to 2.7V)  
tPZH, tPHZ  
2VCC  
GND  
CL = 30 pF or equivalent (includes jigand probe capacitance)  
RL =R1 =500orequivalent  
RT = ZOUT ofpulse generator (typically50)  
WAVEFORM SYMBOL VALUES  
Symbol  
VCC  
3.0 to 3.6V  
2.7V  
2.3 to 2.7V  
VCC  
V
IH  
VM  
VX  
VY  
1.5V  
VCC/2  
VOL +0.3V  
VOH -0.3V  
VOL + 0.15V  
VOH -0.15V  
6/10  
74VCXH162373  
WAVEFORM 1: LE TO Qn PROPAGATION DELAYS, LE MINIMUM PULSE WIDTH,  
Dn TO LE SETUP AND HOLD TIMES (f=1MHz; 50% duty cycle)  
7/10  
74VCXH162373  
WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIMES  
(f=1MHz; 50% duty cycle)  
WAVEFORM 3: PROPAGATION DELAY TIME (f=1MHz; 50% duty cycle)  
8/10  
74VCXH162373  
TSSOP48 MECHANICAL DATA  
mm  
inch  
TYP.  
DIM.  
MIN.  
TYP.  
MAX.  
1.1  
MIN.  
MAX.  
0.433  
0.006  
0.374  
0.011  
0.0079  
0.496  
0.325  
0.244  
A
A1  
A2  
b
0.05  
0.85  
0.17  
0.09  
12.4  
7.95  
6.0  
0.10  
0.9  
0.15  
0.95  
0.27  
0.20  
12.6  
8.25  
6.2  
0.002  
0.335  
0.0067  
0.0035  
0.408  
0.313  
0.236  
0.004  
0.354  
c
D
12.5  
8.1  
0.492  
0.319  
0.240  
E
E1  
e
6.1  
0.5 BSC  
4o  
0.0197 BSC  
4o  
K
0o  
8o  
0o  
8o  
L
0.50  
0.60  
0.70  
0.020  
0.024  
0.028  
A2  
A
K
L
b
e
A1  
E
c
D
E1  
PIN 1 IDENTIFICATION  
1
9/10  
74VCXH162373  
Information furnished isbelieved to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences  
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is  
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are  
subject to change without notice. Thispublication supersedes and replaces all information previously supplied. STMicroelectronics products  
are not authorized for use as critical components in lifesupport devices or systems withoutexpress written approval of STMicroelectronics.  
The ST logo is a registered trademark of STMicroelectronics  
1999 STMicroelectronics – Printed in Italy – All Rights Reserved  
STMicroelectronics GROUP OF COMPANIES  
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http://www.st.com  
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10/10  

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