AFL5012DY [ETC]

DC to DC Converter ; 直流到直流转换器\n
AFL5012DY
型号: AFL5012DY
厂家: ETC    ETC
描述:

DC to DC Converter
直流到直流转换器\n

转换器 输出元件
文件: 总10页 (文件大小:84K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
PD - 94456A  
AFL50XXD SERIES  
50V Input, Dual Output  
ADVANCED ANALOG  
HIGH RELIABILITY  
HYBRID DC/DC CONVERTERS  
Description  
The AFL Series of DC/DC converters feature high power  
density with no derating over the full military tempera-  
ture range. This series is offered as part of a complete  
family of converters providing single and dual output  
voltages and operating from nominal +28, +50, +120 or  
+270 volt inputs with output power ranging from 80 to  
120 watts. For applications requiring higher output  
power, individual converters can be operated in paral-  
lel. The internal current sharing circuits assure equal  
current distribution among the paralleled converters.This  
series incorporates Advanced Analog’s proprietary mag-  
netic pulse feedback technology providing optimum  
dynamic line and load regulation response. This feed-  
back system samples the output voltage at the pulse  
width modulator fixed clock frequency, nominally 550  
KHz. Multiple converters can be synchronized to a sys-  
tem clock in the 500 KHz to 700 KHz range or to the  
synchronization output of one converter. Undervoltage  
lockout, primary and secondary referenced inhibit, soft-  
start and load fault protection are provided on all mod-  
els.  
AFL  
Features  
n 30 To 80 Volt Input Range  
±5, ±12, and ±15 Volts Outputs Available  
n High Power Density - up to 70 W / in  
n Up To 100 Watt Output Power  
n Parallel Operation with Stress and Current  
Sharing  
n Low Profile (0.380") Seam Welded Package  
n Ceramic Feedthru Copper Core Pins  
n High Efficiency - to 85%  
n Full Military Temperature Range  
n Continuous Short Circuit and Overload  
Protection  
n
3
n Output Voltage Trim  
n Primary and Secondary Referenced  
Inhibit Functions  
n Line Rejection > 40 dB - DC to 50KHz  
n External Synchronization Port  
n Fault Tolerant Design  
These converters are hermetically packaged in two en-  
closure variations, utilizing copper core pins to mini-  
mize resistive DC losses. Three lead styles are avail-  
able, each fabricated with Advanced Analog’s rugged  
ceramic lead-to-package seal assuring long term  
hermeticity in the most harsh environments.  
n Single Output Versions Available  
n Standard Military Drawings Available  
Manufactured in a facility fully qualified to MIL-PRF-  
38534, these converters are available in four screening  
grades to satisfy a wide range of requirements. The CH  
grade is fully compliant to the requirements of MIL-H-  
38534 for class H. The HB grade is fully processed and  
screened to the class H requirement, may not neces-  
sarily meet all of the other MIL-PRF-38534 requirements,  
e.g., element evaluation and Periodic Inspection (P.I.)  
not required. Both grades are tested to meet the com-  
plete group “A” test specification over the full military  
temperature range without output power deration.  
Two grades with more limited screening are also  
available for use in less demanding applications.  
Variations in electrical, mechanical and screen-  
ing can be accommodated. Contact Advanced  
Analog for special requirements.  
www.irf.com  
1
07/09/02  
AFL50XXD Series  
Specifications  
ABSOLUTE MAXIMUM RATINGS  
Input Voltage  
-0.5V to 100V  
Soldering Temperature  
Case Temperature  
300°C for 10 seconds  
Operating  
Storage  
-55°C to +125°C  
-65°C to +135°C  
Static Characteristics -55°C < TCASE < +125°C, 30V< VIN < 80V unless otherwise specified.  
Group A  
Parameter  
INPUT VOLTAGE  
Subgroups  
Test Conditions  
Min  
Nom  
Max  
Unit  
Note 6  
30  
50  
80  
V
OUTPUT VOLTAGE  
V
= 50 Volts, 100% Load  
IN  
AFL5005D  
AFL5012D  
AFL5015D  
AFL5005D  
AFL5012D  
AFL5015D  
1
1
4.95  
-5.05  
5.00  
-5.00  
5.05  
-4.95  
V
V
Positive Output  
Negative Output  
Positive Output  
Negative Output  
1
1
11.88  
-12.12  
12.00  
-12.00  
12.12  
-11.88  
V
V
Positive Output  
Negative Output  
1
1
14.85  
-15.15  
15.00  
-15.00  
15.15  
-14.85  
V
V
Positive Output  
Negative Output  
2, 3  
2, 3  
4.90  
-5.10  
5.10  
-4.90  
V
V
Positive Output  
Negative Output  
2, 3  
2, 3  
11.76  
-12.24  
12.24  
-11.76  
V
V
Positive Output  
Negative Output  
2, 3  
2, 3  
14.70  
-15.30  
15.30  
-14.70  
V
V
OUTPUT CURRENT  
OUTPUT POWER  
V
= 30, 50, 80 Volts - Notes 6, 11  
Either Output  
IN  
AFL5005D  
AFL5012D  
AFL5015D  
12.8  
6.4  
A
A
A
Either Output  
Either Output  
5.3  
Total of Both Outputs. Notes 6,11  
80  
96  
AFL5005D  
AFL5012D  
AFL5015D  
W
W
W
100  
MAXIMUM CAPACITIVE LOAD  
Each Output Note 1  
10,000  
-0.015  
µfd  
V
= 50 Volts, 100% Load - Notes 1, 6  
OUTPUT VOLTAGE  
TEMPERATURE COEFFICIENT  
IN  
+0.015  
%/°C  
OUTPUT VOLTAGE REGULATION  
Note 10  
-0.5  
-1.0  
+0.5  
+1.0  
%
%
Line  
1, 2, 3  
1, 2, 3  
No Load, 50% Load, 100% Load  
Load  
V
= 30, 50, 80 Volts.  
IN  
Cross  
V
= 30, 50, 80 Volts. Note 12  
IN  
AFL5005D  
1, 2, 3  
1, 2, 3  
1, 2, 3  
Positive Output  
Negative Output  
-1.0  
-8.0  
+1.0  
+8.0  
%
%
AFL5012D  
AFL5015D  
Positive Output  
Negative Output  
-1.0  
-5.0  
+1.0  
+5.0  
%
%
Positive Output  
Negative Output  
-1.0  
-5.0  
+1.0  
+5.0  
%
%
For Notes to Specifications, refer to page 4  
2
www.irf.com  
AFL50XXD Series  
Static Characteristics (Continued)  
Group A  
Parameter  
Subgroups  
Test Conditions  
Min  
Nom  
Max  
Unit  
OUTPUT RIPPLE VOLTAGE  
V
= 30, 50, 80 Volts, 100% Load,  
IN  
BW = 10MHz  
AFL5005D  
1, 2, 3  
1, 2, 3  
1, 2, 3  
60  
80  
80  
mV  
mV  
mV  
pp  
pp  
pp  
AFL5012D  
AFL5015D  
V
= 50 Volts  
INPUT CURRENT  
IN  
1
2, 3  
1, 2, 3  
1, 2, 3  
50  
60  
5
mA  
No Load  
I
= 0  
OUT  
mA  
mA  
mA  
Inhibit 1  
Inhibit 2  
Pin 4 Shorted to Pin 2  
Pin 12 Shorted to Pin 8  
5
INPUT RIPPLE CURRENT  
AFL5005D  
V
= 50 Volts, 100% Load  
IN  
1, 2, 3  
1, 2, 3  
1, 2, 3  
60  
60  
60  
mA  
pp  
pp  
pp  
AFL5012D  
AFL5015D  
mA  
mA  
V
= 90% V  
, Current split  
NOM  
CURRENT LIMIT POINT  
OUT  
equally on positive and negative outputs.  
Note 5  
1
2
3
115  
105  
125  
125  
115  
140  
%
%
%
Expressed as a Percentage  
of Full Rated Load  
LOAD FAULTPOWER DISSIPATION  
V
V
IN = 50 Volts  
1, 2, 3  
32  
W
Overload or Short Circuit  
EFFICIENCY  
AFL5005D  
AFL5012D  
AFL5015D  
IN = 50 Volts, 100% Load  
1, 2, 3  
1, 2, 3  
1, 2, 3  
78  
80  
81  
81  
84  
85  
%
%
%
ENABLE INPUTS (Inhibit Function)  
Converter Off  
1, 2, 3  
1, 2, 3  
Logical Low on Pin 4 or Pin 12  
Note 1  
Logical High on Pin 4 and Pin 12 - Note 9 2.0  
Note 1  
-0.5  
0.8  
100  
50  
V
µ
A
V
µA  
Sink Current  
Converter On  
Sink Current  
100  
SWITCHING FREQUENCY  
1, 2, 3  
500  
550  
600  
KHz  
SYNCHRONIZATION INPUT  
Frequency Range  
1, 2, 3  
1, 2, 3  
1, 2, 3  
500  
2.0  
-0.5  
700  
10  
0.8  
100  
80  
KHz  
V
V
nSec  
%
Pulse Amplitude, Hi  
Pulse Amplitude, Lo  
Pulse Rise Time  
Note 1  
Note 1  
20  
Pulse Duty Cycle  
ISOLATION  
1
Input to Output or Any Pin to Case  
(except Pin 3). Test @ 500VDC  
100  
MΩ  
DEVICE WEIGHT  
MTBF  
Slight Variations with Case Style  
85  
gms  
MIL-HDBK-217F, AIF @ T = 40°C  
C
300  
KHrs  
For Notes to Specifications, refer to page 4  
www.irf.com  
3
AFL50XXD Series  
Dynamic Characteristics -55°C < TCASE < +125°C, VIN=50V unless otherwise specified.  
Group A  
Parameter  
Subgroups  
Test Conditions  
Min  
Nom  
Max  
Unit  
LOAD TRANSIENT RESPONSE  
Note 2, 8  
AFL5005D  
Either Output  
Amplitude  
Recovery  
4, 5, 6  
4, 5, 6  
Load Step 50%  
100%  
-450  
-450  
450  
200  
mV  
µSec  
Amplitude  
Recovery  
4, 5, 6  
4, 5, 6  
Load Step 10%  
50%  
50%  
10%  
450  
200  
400  
mV  
µSec  
µSec  
10%  
50%  
AFL5012D  
Either Output  
Amplitude  
Recovery  
Amplitude  
Recovery  
4, 5, 6  
4, 5, 6  
Load Step 50%  
100%  
-750  
-750  
750  
200  
mV  
µSec  
4, 5, 6  
4, 5, 6  
Load Step 10%  
50%  
50%  
10%  
750  
200  
400  
mV  
µSec  
µSec  
10%  
50%  
AFL5015D  
Either Output  
Amplitude  
Recovery  
Amplitude  
Recovery  
Load Step 50%  
100%  
-750  
-750  
750  
200  
mV  
µSec  
4, 5, 6  
4, 5, 6  
Load Step 10%  
50%  
50%  
10%  
750  
200  
400  
mV  
µSec  
µSec  
4, 5, 6  
4, 5, 6  
10%  
50%  
LINE TRANSIENT RESPONSE  
Note 1, 2, 3  
V
Step = 30  
80 Volts  
-500  
500  
500  
mV  
µSec  
Amplitude  
Recovery  
IN  
TURN-ON CHARACTERISTICS  
Note 4  
Overshoot  
Delay  
4, 5, 6  
4, 5, 6  
Enable 1, 2 on. (Pins 4, 12 high or  
open)  
250  
120  
mV  
mSec  
50  
40  
75  
50  
LOAD FAULT RECOVERY  
LINE REJECTION  
Same as Turn On Characteristics.  
MIL-STD-461D, CS101, 30Hz to 50KHz  
Note 1  
dB  
Notes to Specifications:  
1. Parameters not 100% tested but are guaranteed to the limits specified in the table.  
2. Recovery time is measured from the initiation of the transient to where V  
50% load.  
has returned to within ±1% of V  
at  
out  
out  
3. Line transient transition time 100 µSec.  
4. Turn-on delay is measured with an input voltage rise time of between 100 and 500 volts per millisecond.  
5. Current limit point is that condition of excess load causing output voltage to drop to 90% of nominal.  
6. Parameter verified as part of another test.  
7. All electrical tests are performed with the remote sense leads connected to the output leads at the load.  
8. Load transient transition time 10 µSec.  
9. Enable inputs internally pulled high. Nominal open circuit voltage 4.0VDC.  
10. Load current split equally between +V  
and -V  
.
out  
out  
11. Output load must be distributed so that a minimum of 20% of the total output power is being provided by one of  
the outputs.  
12. Cross regulation measured with load on tested output at 20% while changing the load on other output from 20%  
to 80%.  
4
www.irf.com  
AFL50XXD Series  
AFL50XXD Circuit Description  
Figure I. AFL Dual Output Block Diagram  
INPUT  
FILTER  
1
4
DC INPUT  
ENABLE 1  
OUTPUT  
FILTER  
+ OUTPUT  
7
8
9
PRIMARY  
BIAS SUPPLY  
CURRENT  
SENSE  
OUTPUT RETURN  
- OUTPUT  
OUTPUT  
FILTER  
5
SYNC OUTPUT  
SHARE  
11  
12  
10  
CONTROL  
SHARE  
AMPLIFIER  
ERROR  
AMP  
& REF  
6
3
2
SYNC INPUT  
CASE  
FB  
ENABLE 2  
TRIM  
INPUT RETURN  
ancillary features, basic operation of the AFL50XXD series  
can be initiated by simply applying an input voltage to pins 1  
and 2 and connecting the appropriate loads between pins  
7, 8, and 9. Of course, operation of anyconverter with high  
power density should not be attempted before secure at-  
tachment to an appropriate heat dissipator. (See Thermal  
Considerations, page 7)  
Circuit Operation and Application Information  
The AFL series of converters employ a forward switched  
mode converter topology. (refer to Figure I.) Operation of  
the device is initiated when a DC voltage whose magnitude  
is within the specified input limits is applied between pins 1  
and 2. If pins 4 and 12 are enabled (at a logical 1 or open)  
the primary bias supply will begin generating a regulated  
housekeeping voltage bringing the circuitry on the primary  
side of the converter to life. Two power MOSFETs used to  
chop the DC input voltage into a high frequency square  
wave, apply this chopped voltage to the power transformer.  
As this switching is initiated, a voltage is impressed on a  
second winding of the power transformer which is then  
rectified and applied to the primary bias supply. When this  
occurs, the input voltage is excluded from the bias voltage  
generator and the primary bias voltage becomes internally  
generated.  
Inhibiting Converter Output  
As an alternative to application and removal of the DC volt-  
age to the input, the user can control the converter output  
by providing TTL compatible, positive logic signals to either  
of two enable pins (pin 4 or 12). The distinction between  
these two signal ports is that enable 1 (pin 4) is referenced  
to the input return (pin 2) while enable 2 (pin 12) is refer-  
enced to the output return (pin 8). Thus, the user has  
access to an inhibit function on either side of the isolation  
barrier. Each port is internally pulled “high” so that when not  
used, an open connection on both enable pins permits nor-  
mal converter operation. When their use is desired, a logi-  
cal “low” on either port will shut the converter down.  
The switched voltage impressed on the secondary output  
transformer windings is rectified and filtered to provide the  
positive and negative converter output voltages. An error  
amplifier on the secondary side compares the positive out-  
put voltage to a precision reference and generates an error  
signal proportional to the difference. This error signal is  
magnetically coupled through the feedback transformer into  
the control section of the converter varying the pulse width  
of the square wave signal driving the MOSFETs, narrowing  
the pulse width if the output voltage is too high and widen-  
ing it if it is too low. These pulse width variations provide  
the necessary corrections to maintain the magnitude of  
output voltage within its’ specified limits.  
Figure II. Enable Input Equivalent Circuit  
+5.6  
V
100K  
290K  
1N4148  
Pin  
Pin 12  
4 or  
Disable  
2N3904  
Because the primary and secondary sides are coupled by  
magnetic elements, full isolation from input to output is  
achieved.  
180K  
Pin  
Pin  
2
8
or  
Although incorporating several sophisticated and useful  
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5
AFL50XXD Series  
Internally, these ports differ slightly in their function. In use,  
a low on Enable 1 completely shuts down all circuits in the  
converter, while a low on Enable 2 shuts down the second-  
ary side while altering the controller duty cycle to near zero.  
Externally, the use of either port is transparent to the user  
save for minor differences in idle current. (See specification  
table).  
level of +2.0 volts. The sync output of another converter  
which has been designated as the master oscillator pro-  
vides a convenient frequency source for this mode of op-  
eration. When external synchronization is not required, the  
sync in pin should be left unconnected thereby permitting  
the converter to operate at its’ own internally set frequency.  
The sync output signal is a continuous pulse train set at 550  
±50 KHz, with a duty cycle of 15 ±5%. This signal is refer-  
enced to the input return and has been tailored to be com-  
patible with the AFL sync input port. Transition times are  
less than 100 ns and the low level output impedance is less  
than 50 ohms. This signal is active when the DC input  
voltage is within the specified operating range and the con-  
verter is not inhibited. The sync output has adequate drive  
reserve to synchronize at least five additional converters.  
A typical connection is illustrated in Figure III.  
Synchronization of Multiple Converters  
When operating multiple converters, system requirements  
often dictate operation of the converters at a common fre-  
quency. To accommodate this requirement, the AFL series  
converters provide both a synchronization input and out-  
put.  
The sync input port permits synchronization of an AFL co-  
nverter to any compatible external frequency source oper-  
ating between 500 and 700 KHz. This input signal should  
be referenced to the input return and have a 10% to 90%  
duty cycle. Compatibility requires transition times less th an  
100 ns, maximum low level of +0.8 volts and a minimum high  
Figure III. Preferred Connection for Parallel Operation  
1
12  
Enable  
2
Power  
Input  
Vin  
Rtn  
Share  
Trim  
Case  
Enable  
AFL  
AFL  
1
-
Output  
Return  
Output  
Sync Out  
Sync In  
+
7
6
1
Optional  
Synchronization  
Connection  
Share Bus  
12  
Enable  
2
Vin  
Rtn  
Share  
Trim  
Case  
Enable  
1
-
Output  
Return  
Output  
to Negative Load  
to Positive Load  
Sync Out  
Sync In  
+
7
6
1
12  
Enable  
2
Vin  
Rtn  
Share  
Trim  
Case  
AFL  
Enable  
1
-
Output  
Return  
Output  
Sync Out  
Sync In  
+
6
7
(Other Converters)  
feature of the AFL series operating in the parallel mode is  
that in addition to sharing the current, the stress induced by  
temperature will also be shared. Thus if one member of a  
paralleled set is operating at a higher case temperature, the  
current it provides to the load will be reduced as  
compenstionfor the temperature induced stress on that  
device.  
Parallel Operation-Current and Stress Sharing  
Figure III. illustrates the preferred connection scheme for  
operation of a set of AFL converters with outputs operating  
in parallel. Use of this connection permits equal current  
sharing among the members of a set whose load current  
exceeds the capacity of an individual AFL. An important  
6
www.irf.com  
AFL50XXD Series  
When operating in the shared mode, it is important that  
symmetry of connection be maintained as an assurance of  
optimum load sharing performance. Thus, converter out-  
puts should be connected to the load with equal lengths of  
wire of the same gauge and sense leads from each con-  
verter should be connected to a common physical point,  
preferably at the load along with the converter output and  
return leads. All converters in a paralleled set must have  
their share pins connected together. This arrangement is  
diagrammatically illustrated in Figure III. showing the out-  
puts and return pins connected at a star point which is  
located close as possible to the load.  
vide similar effectiveness, these alternatives are often less  
convenient and can be somewhat messy to use.  
A conservative aid to estimating the total heat sink surface  
area (AHEAT SINK) required to set the maximum case temp-  
erature rise (T) above ambient temperature is given by  
the following expression:  
1.43  
T  
A
HEAT SINK  
3.0  
0.85  
80P  
where  
As a consequence of the topology utilized in the current  
sharing circuit, the share pin may be used for other func-  
tions. For applications requiring only a single converter, the  
voltage appearing on the share pin may be used as a “cur-  
rent monitor”. The share pin open circuit voltage is nominally  
+1.00v at no load and increases linearly with increasing  
output current to +2.20v at full load. Note that the current  
we refer to here is the total device output current, that is,  
the sum of the positive and negative output currents.  
T = Case temperature rise above ambient  
1
P = Device dissipation in Watts = POUT  
Eff  
1  
As an example, it is desired to maintain the case tempera-  
ture of an AFL5015D at +85°C while operating in an open  
area whose ambient temperature is held at a constant +25°C;  
then  
Thermal Considerations  
T = 85 - 25 = 60°C  
Because of the incorporation of many innovative techno-  
logical concepts, the AFL series of converters is capable of  
providing very high output power from a package of very  
small volume. These magnitudes of power density can only  
be obtained by combining high circuit efficiency with effec-  
tive methods of heat removal from the die junctions. This  
requirement has been effectively addressed inside the de-  
vice; but when operating at maximum loads, a significant  
amount of heat will be generated and this heat must be  
conducted away from the case. To maintain the case tem-  
perature at or below the specified maximum of 125°C, this  
heat must be transferred by conduction to an appropriate  
heat dissipater held in intimate contact with the converter  
base-plate.  
If the worst case full load efficiency for this device is 83%  
@ 100W; then the power dissipation at full load is given by  
1
P = 100•  
1 = 1000.205 = 20.5W  
(
)
.83  
and the required heat sink area is  
1.43  
60  
A
HEAT SINK  
=
3.0 = 56.3 in2  
8020.50.85  
Since the effectiveness of this heat transfer is dependent  
on the intimacy of the baseplate/heatsink interface, it is  
strongly recommended that a high thermal conductivity heat  
transferring medium is inserted between the baseplate and  
heatsink. The material most frequently utilized at the fac-  
tory during all testing and burn-in processes is sold under  
Thus, a total heat sink surface area (including fins, if any)  
of 56 in in this example, would limit case rise to 60°C above  
2
ambient. A flat aluminum plate, 0.25" thick and of approxi-  
2
mate dimension 4" by 7" (28 in per side) would suffice for  
this application in a still air environment. Note that to meet  
the criteria in this example, both sides of the plate require  
unrestricted exposure to the +25°C ambient air.  
1
the trade name of Sil-Pad 400 . This particular product is  
an insulator but electrically conductive versions are also  
available. Use of these materials assures maximum sur-  
face contact with the heat dissipater thereby compensating  
for any minor surface variations. While other available types  
of heat conductive materials and thermal compounds pro-  
1
Sil-Pad is a registered Trade Mark of Bergquist, Minneapolis, MN  
www.irf.com  
7
AFL50XXD Series  
Input Filter  
The AFL50XXD series converters incorporate a single stage  
LC input filter whose elements dominate the input load im-  
pedance characteristic during the turn-on. The input circuit  
is as shown in Figure IV.  
Table I. Output Voltage Trim Values and Limits  
AFL5005D AFL5012D AFL5015D  
Vout  
Radj  
0
Vout  
Radj  
0
Vout  
15.5  
15.4  
15.3  
15.2  
15.1  
15.0  
14.6  
14.0  
13.5  
13.0  
12.917  
Radj  
0
5.5  
5.4  
5.3  
5.2  
5.1  
5.0  
4.9  
4.8  
4.7  
12.5  
12.4  
12.3  
12.2  
12.1  
12.0  
11.7  
11.3  
10.8  
10.6  
10.417  
Figure IV. Input Filter Circuit  
12.5K  
33.3K  
75K  
200K  
190K  
65K  
23K  
2.5K  
0
47.5K  
127K  
285K  
760K  
975K  
288K  
72.9K  
29.9K  
0
62.5K  
167K  
375K  
1.0M  
1.2M  
325K  
117K  
12.5K  
0
0.75µH  
Pin 1  
2.7µfd  
Pin 2  
4.6  
4.583  
Undervoltage Lockout  
A minimum voltage is required at the input of the converter  
to initiate operation. This voltage is set to 26.5 ± 1.5 volts. To  
preclude the possibility of noise or other variations at the  
input falsely initiating and halting converter operation, a hys-  
teresis of approximately 2 volts is incorporated in this cir-  
cuit. Thus if the input voltage droops to 24.5 ± 1.5 volts, the  
converter will shut down and remain inoperative until the  
input voltage returns to 25 volts.  
Note that the nominal magnitude of output voltage resides in  
the middle of the table and the corresponding resistor value  
is set to ∞. To set the magnitude above nominal, the adjust  
resistor is connected to output return. To set the magnitude  
below nominal, the adjust resistor is connected to the posi-  
tive output. (Refer to Figure V.)  
For output voltage settings that are within the limits, but  
between those presented in Table I, it is suggested that the  
resistor values be determined empirically by selection or by  
use of a variable resistor. The value thus determined can  
then be replaced with a good quality fixed resistor for per-  
manent installation.  
OutputVoltage Adjust  
By use of the trim pin (10), the magnitude of output voltages  
can be adjusted over a limited range in either a positive or  
negative direction. Connecting a resistor between the trim  
pin and either the output return or the positive output will  
raise or lower the magnitude of output voltage. The span of  
output voltage magnitude is restricted to the limits shown in  
When use of the trim feature is elected, the user should be  
aware that the temperature performance of the converter  
output voltage will be affected by the temperature perfor-  
mance of the resistor selected as the adjustment element  
and therefore, the user is advised to employ resistors with  
an very small temperature coefficient of resistance.  
Table I.  
Figure V. Connection for VOUT Adjustment  
12  
Enable  
2
Share  
Trim  
R ADJ  
-
+
AFL50xxD  
-
Vout  
Return  
Vout  
To  
Loads  
+
7
Connect Radj to + to increase, - to decrease.  
8
www.irf.com  
AFL50XXD Series  
AFL50XXD Case Outlines  
Case X  
Case W  
Pin Variation of Case Y  
3.000  
2.760  
ø
0.128  
0.050  
0.050  
0.250  
0.250  
1.000  
1.000  
Ref  
1.260 1.500  
0.200 Typ  
Non-cum  
Pin  
ø
0.040  
Pin  
0.040  
0.220  
ø
2.500  
0.220  
0.525  
2.800  
2.975 max  
0.238 max  
0.42  
0.380  
Max  
0.380  
Max  
Case Y  
Case Z  
Pin Variation of Case Y  
1.150  
0.300  
ø
0.140  
0.25 typ  
0.050  
0.050  
0.250  
0.250  
1.000  
Ref  
1.500 1.750 2.00  
1.000  
Ref  
0.200 Typ  
Non-cum  
Pin  
ø
0.040  
Pin  
ø
0.040  
0.220  
0.220  
1.750  
2.500  
0.375  
0.36  
2.800  
2.975 max  
0.525  
0.238 max  
0.380  
Max  
0.380  
Max  
Tolerances, unless otherwise specified: .XX  
.XXX  
=
=
±0.010  
±0.005  
BERYLLIAWARNING: These converters are hermetically sealed;however they contain BeO substrates and should not be ground or subjected to any other  
operations including exposure to acids, which may produce Beryllium dust or fumes containing Beryllium  
www.irf.com  
9
AFL50XXD Series  
Available Screening Levels and ProcessVariations for AFL50XXD Series.  
MIL-STD-883  
Method  
No  
ES  
HB  
CH  
Requirement  
Suffix  
Suffix  
Suffix  
Suffix  
Temperature Range  
Element Evaluation  
Internal Visual  
-20°C to +85°C  
-55°C to +125°C  
-55°C to +125°C  
-55°C to +125°C  
MIL-PRF-38534  
Yes  
2017  
1010  
¬
Yes  
Cond B  
500g  
Yes  
Cond C  
Temperature Cycle  
Constant Acceleration  
Burn-in  
Cond C  
2001  
Cond A  
Cond A  
1015  
48hrs @ 85°C  
48hrs @ 125°C  
25°C  
160hrs @ 125°C  
160hrs @ 125°C  
Final Electrical (Group A)  
Seal, Fine & Gross  
External Visual  
MIL-PRF-38534  
1014  
25°C  
¬
-55, +25, +125°C -55, +25, +125°C  
Cond A, C  
Yes  
Cond A, C  
Yes  
Cond A, C  
Yes  
2009  
¬
* per Commercial Standards  
AFL50XXD Pin Designation  
Part Numbering  
Pin No.  
Designation  
Positive Input  
Input Return  
Case  
AFL 50 05 D X / CH  
1
2
Model  
Screening  
, ES  
Input Voltage  
Case Style  
HB, CH  
28= 28 V, 50= 50 V  
W, X, Y, Z  
120=120 V, 270= 270 V  
3
Output Voltage  
05= 5 V, 12= 12 V,  
15= 15 V  
Outputs  
S = Single  
D = Dual  
4
Enable 1  
5
Sync Output  
Sync Input  
6
7
Positive Output  
Output Return  
Negative Output  
Output Voltage Trim  
Share  
8
9
10  
11  
12  
Enable 2  
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331  
ADVANCED ANALOG: 2270 Martin Av., Santa Clara, California 95050, Tel: (408) 727-0500  
Visit us at www.irf.com for sales contact information.  
Data and specifications subject to change without notice. 07/02  
10  
www.irf.com  

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