AM7942-2JC [ETC]
Telecommunication IC ; 电信IC\n型号: | AM7942-2JC |
厂家: | ETC |
描述: | Telecommunication IC
|
文件: | 总20页 (文件大小:244K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Am7942
Subscriber Line Interface Circuit
DISTINCTIVE CHARACTERISTICS
Programmable constant-current feed
Receive current gain = 200
Programmable loop-detect threshold
Low standby power
Tip Open state for ground-start lines
–19 V to –58 V battery operation
Ideal for PBX and KTS applications
On-chip switching regulator for low-power
dissipation
Performs polarity reversal
Ground-key detector
Can be used with or without the on-chip
switching regulator
Pin for external ground-key noise filter
capacitor
Two-wire impedance set by single external
impedance
Test relay driver option
On-hook transmission
BLOCK DIAGRAM
TESTOUT
Test Relay Driver
Ring Relay Driver
RINGOUT
A(TIP)
C1
C2
C3
Ground-Key
Detector
Input Decoder
and Control
HPA
HPB
C4
E1
DET
Two-Wire
Interface
GKFIL
RSN
Signal
Transmission
VTX
Off-Hook
Detector
B(RING)
DA
RD
RDC
CAS
Power-Feed
Controller
Ring-Trip
Detector
DB
VREG
L
Switching
Regulator
VBAT
BGND
VCC
VEE
AGND/DGND
CHS
CHCLK
QBAT
15474A-001
Publication# 080127 Rev: F Amendment: /0
Issue Date: October 1999
ORDERING INFORMATION
Standard Products
Legerity standard products are available in several packages and operating ranges. The order number (Valid Combination) is
formed by a combination of the elements below.
Am7942
J
C
TEMPERATURE RANGE
C = Commercial (0°C to 70°C)*
PACKAGE TYPE
J = 32-pin Plastic Leaded Chip Carrier (PL 032)
PERFORMANCE GRADE
Blank = Standard specification
–1 = Performance Grading
–2 = Performance Grading
DEVICE NUMBER/DESCRIPTION
Am7942
Subscriber Line Interface Circuit
Valid Combinations
Valid Combinations
Valid Combinations lists configurations planned
to be supported in volume for this device. Consult
the local Legerity sales office to confirm
availability of specific valid combinations, to
check on newly released combinations, and to
obtain additional data on Legerity’s standard
military–grade products.
–1
Am7942
JC
–2
Note:
* Functionality of the device from 0°C to +70°C is guaranteed by production testing. Performance from –40°C to +85°C is guar-
anteed by characterization and periodic sampling of production units.
2
Am7942 Data Sheet
CONNECTION DIAGRAMS
Top View
32-Pin PLCC
4
3
2
1
32 31 30
TP
TESTOUT
L
5
6
29
28
TP
DA
RD
7
27
26
VBAT
8
HPB
HPA
QBAT
9
25
24
10
CHS
VTX
CHCLK
C4
11
12
VEE
23
22
RSN
13
AGND/DGND
E1
21
14 15 16 17 18 19 20
Notes:
1. Pin 1 is marked for orientation.
2. TP is a thermal conduction pin tied to substrate (QBAT).
SLIC Products
3
PIN DESCRIPTIONS
Pin Names
AGND/DGND
A(TIP)
Type
Gnd
Description
Analog and Digital ground.
Output
Gnd
Output of A(TIP) power amplifier.
Battery (power) ground.
BGND
B(RING)
C3–C1
Output
Input
Output of B(RING) power amplifier.
Decoder. TTL compatible. C3 is MSB and C1 is LSB.
C4
Input
Test Relay Driver Command. TTL compatible. A logic Low enables the driver.
CAS
Capacitor
Anti-saturation pin for capacitor to filter reference voltage when operating in anti-saturation
region.
CHCLK
CHS
Input
Input
Chopper Clock. Input to switching regulator (TTL compatible). Freq = 256 kHz (typ). See
Note 1.
Chopper Stabilization. (See Note 1) Connection for external chopper stabilizing
components.
DA
Input
Ring-trip negative. Negative input to ring-trip comparator.
Ring-trip positive. Positive input to ring-trip comparator.
DB
Input
DET
Output
Switchhook detector. When enabled, a logic Low indicates the selected detector is tripped.
The detector is selected by the logic inputs (C3–C1, E1). The output is open-collector with
a built-in 15 kΩ pull-up resistor.
E1
Input
Ground-Key Enable. E1 = High connects the ground-key detector to DET. E1 = Low
connects the off-hook or ring-trip detector to DET.
GKFIL
HPA
HPB
L
—
Connection for external ground-key, noise-filter capacitor. See Note 2.
High-Pass Filter Capacitor. A(TIP) side of high-pass filter capacitor.
High-Pass Filter Capacitor. B(RING) side of high-pass filter capacitor.
Switching Regulator Power Transistor. Connection point for filter inductor and anode of
Capacitor
Capacitor
Output
(See Note 1) Switching Regulator Power Transistor. Connection point for filter inductor and anode of
catch diode. Has up to 60 V of pulse waveform on it and must be isolated from sensitive
circuits. Keep the diode connections short because of the high currents and high di/dt.
QBAT
RD
Battery
Resistor
Resistor
Quiet Battery. (See Note 1). Filtered battery supply for the signal processing circuits.
Detector resistor. Detector threshold set and filter pin.
RDC
DC feed resistor. Connection point for the DC feed current programming network. The other
end of the network connects to the receiver summing node (RSN).
RINGOUT
RSN
Output
Input
Ring Relay Driver. Open-collector driver with emitter internally connected to BGND.
Receive Summing Node. The metallic current (AC and DC) between A(TIP) and B(RING) is
equal to 500 x the current into this pin. The networks that program receive gain, two-wire
impedance, and feed current all connect to this node.
TESTOUT
TP
Output
Test Relay Driver. Open collector driver with emitter internally connected to BGND.
Thermal
Thermal pin. Connection for heat dissipation. Internally connected to substrate (QBAT).
Leave as open circuit or connected to QBAT. In both cases, the TP pins can connect to an
area of copper on the board to enhance heat dissipation.
VBAT
VCC
Battery
Power
Power
Input
Battery supply.
+5 V power supply.
–5 V power supply.
VEE
VREG
Regulated Voltage. (See Note 1.) Provides negative power supply for power amplifiers.
Connection point for inductor, filter capacitor, and chopper stabilization.
VTX
Output
Transmit Audio. This output is a unity gain version of the A(TIP) and B(RING) metallic
voltage. VTX also sources the two-wire input impedance programming network.
Notes:
1. All pins, except CHCLK, connect to VBAT when using SLIC without a switching regulator. CHCLK is connected to AGND/
DGND.
2. To prevent noise pickup by the detection circuits when using Ground-Key Detect state (E1 = logical 1), a 3300 pF minimum
bypass capacitor is recommended between the GKFIL pin and ground.
4
Am7942 Data Sheet
ABSOLUTE MAXIMUM RATINGS
OPERATING RANGES
Storage temperature . . . . . . . . . . . . –55°C to +150°C
Commercial (C) Devices
V
CC with respect to AGND/DGND . . .–0.4 V to +7.0 V
Ambient temperature . . . . . . . . . . . . . . 0°C to +70°C*
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . 4.75 V to 5.25 V
VEE . . . . . . . . . . . . . . . . . . . . . . . . –4.75 V to –5.25 V
VEE with respect to AGND/DGND . . .+0.4 V to –7.0 V
VBAT with respect to AGND/DGND. . . +0.4 V to –70 V
Note: Rise time of VBAT (dv/dt) must be limited to 27 V/µs or
less when QBAT bypass = 0.33 µF.
V
BAT. . . . . . . . . . . . . . . . . . . . . . . . . . –19 V to –58 V
AGND/DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V
BGND with respect to AGND/DGND .+1.0 V to –3.0 V
BGND with respect to
A(TIP) or B(RING) to BGND:
AGND/DGND. . . . . . . . . . . . –100 mV to +100 mV
Continuous . . . . . . . . . . . . . . . . . . –70 V to +1.0 V
10 ms (f = 0.1 Hz) . . . . . . . . . . . . . –70 V to +5.0 V
1 µs (f = 0.1 Hz) . . . . . . . . . . . . . . .–90 V to +10 V
250 ns (f = 0.1 Hz) . . . . . . . . . . . .–120 V to +15 V
Load Resistance on VTX to ground . . . . . . 10 kΩ min
The Operating Ranges define those limits between which the
functionality of the device is guaranteed.
Current from A(TIP) or B(RING). . . . . . . . . . . . 150 mA
Voltage on RINGOUT. . . . .BGND to 70 V above QBAT
Voltage on TESTOUT. . . . .BGND to 70 V above QBAT
Current through relay drivers . . . . . . . . . . . . . . 60 mA
* Functionality of the device from 0°C to +70°C is guaranteed
by production testing. Performance from –40°C to +85°C is
guaranteed by characterization and periodic sampling of
production units.
Can be used without switching regulator components in this
range of battery voltages, provided maximum power
dissipation specifications are not exceeded.
Voltage on ring-trip inputs
(DA and DB) . . . . . . . . . . . . . . . . . . . . . VBAT to 0 V
Current into ring-trip inputs . . . . . . . . . . . . . . . . . 10 mA
Peak current into regulator
switch (L pin). . . . . . . . . . . . . . . . . . . . . . . 150 mA
Switcher transient peak off
voltage on L pin. . . . . . . . . . . . . . . . . . . . . . +1.0 V
C4–C1, E1, CHCLK to
AGND/DGND . . . . . . . . . . . .–0.4 V to VCC + 0.4 V
Maximum power dissipation, TA (see note) . . . . .70°C
In 32-pin PLCC package. . . . . . . . . . . . . . . 1.74 W
Note: Thermal limiting circuitry on chip will shut down the
circuit at a junction temperature of about 165°C. The device
should never be exposed to this temperature. Operation
above 145°C junction temperature may degrade device
reliability. See the SLIC Packaging Considerations for more
information.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent device failure. Functionality at or above
these limits is not implied. Exposure to Absolute Maximum
Ratings for extended periods may affect device reliability.
SLIC Products
5
ELECTRICAL CHARACTERISTICS
Description
Analog (VTX) output impedance
Analog (VTX) output offset
Test Conditions (See Note 1)
Min
Typ
Max
Unit
Note
3
Ω
4
0°C to +70°C
–35
–35
–30
+35
+35
+30
–1*
–2
mV
–40°C to +85°C
300 Hz to 3.4 kHz
–40
–40
–35
+40
+40
+35
–1*
–2
4
Analog (RSN) input impedance
Longitudinal impedance at A or B
Overload level
1
20
35
Ω
4-wire
2-wire
–2.5
+2.5
Vpk
2
Transmission Performance, 2-Wire Impedance (See Test Circuit D)
2-wire return loss 300 Hz to 3400 Hz
Longitudinal Balance (2-Wire and 4-Wire, See Test Circuit C); RL = 600 Ω
26
dB
4, 10
Longitudinal to metallic L-T, L-4
200 Hz to 1 kHz
52
63
58
54
normal polarity 0°C to +70°C
normal polarity –40°C to +85°C
reverse polarity
1, 2
1, 2, 4
1, 2
1 kHz to 3.4 kHz
52
58
54
54
normal polarity 0°C to +70°C
normal polarity –40°C to +85°C
reverse polarity
dB
1, 2
1, 2, 4
1, 2
Longitudinal signal generation 4-L
300 Hz to 800 Hz
Reverse polarity
–1*
–2
40
40
42
Active state
OHT state
all*
all
28
18
Longitudinal current capability per wire
mArms
Insertion Loss (2- to 4-Wire and 4- to 2-Wire, See Test Circuits A and B)
BAT = –48 V, RLDC = RLAC = 600 Ω; BAT = –24 V, RLDC = 300 Ω, RLAC = 600 Ω
Gain accuracy
0 dBm, 1 kHz
0°C to +70°C
–0.15
–0.15
–0.10
+0.15
+0.15
+0.10
–1*
–2
0 dBm, 1 kHz
–40°C to +85°C
–0.20
–0.20
–0.15
+0.20
+0.20
+0.15
—
4
—
–1*
–2
dB
Variation with frequency
300 Hz to 3400 Hz
Relative to 1 kHz
0°C to +70°C
–0.15
–0.15
–0.10
+0.15
+0.15
+0.10
–1*
–2
300 Hz to 3400 Hz
Relative to 1 kHz
–40°C to +85°C
–0.20
–0.20
–0.15
+0.20
+0.20
+0.15
—
—
4
–1*
–2
Note:
*P.G. = Performance Grade
6
Am7942 Data Sheet
ELECTRICAL CHARACTERISTICS (continued)
Description
Gain tracking
Test Conditions (See Note 1)
Min
Typ
Max
Unit
Note
0°C to +70°C
–0.10
+0.10
+7 dBm to –55 dBm
Reference: –0 dBm
dB
–40°C to +85°C
–0.15
+0.15
4
4
—
+7 dBm to –55 dBm
Reference: –0 dBm
Balance Return Signal (4- to 4-Wire, See Test Circuit B)
BAT = –48 V, RLDC = RLAC = 600 Ω; BAT = –24 V, RLDC = 300 Ω, RLAC = 600 Ω
Gain accuracy
0 dBm, 1 kHz
0°C to +70°C
–0.15
–0.15
–0.10
+0.15
+0.15
+0.10
—
3
—
–1*
–2
0 dBm, 1 kHz
–40°C to +85°C
–0.20
–0.20
–0.15
+0.20
+0.20
+0.15
—
3, 4
3, 4
–1*
–2
Variation with frequency
300 Hz to 3400 Hz
Relative to 1 kHz
0°C to +70°C
–0.10
+0.10
3
dB
300 Hz to 3400 Hz
Relative to 1 kHz
–40°C to +85°C
3
3
3, 4
–0.15
–0.10
+0.15
+0.10
Gain tracking
0°C to +70°C
3
+3 dBm to –55 dBm
Reference: 0 dBm
–40°C to +85°C
+3 dBm to –55 dBm
Reference: 0 dBm
–0.15
–0.15
3, 4
Group delay
f = 1 kHz
5.3
µs
4, 12
Total Harmonic Distortion (2- to 4-Wire and 4- to 2-Wire, See Test Circuits A and B)
BAT = –48 V, RLDC = RLAC = 600 Ω
Harmonic distortion
300 Hz to 3400 Hz
Idle Channel Noise
0 dBm
–64
–55
–50
–40
dB
+7 dBm
BAT = –48 V, RLDC = RLAC = 600 Ω; BAT = –24 V, RLDC = 300 Ω, RLAC = 600 Ω
C-message weighted noise
2-wire, 0°C to +70°C
+7
+7
+10
+12
4
4
2-wire, –40°C to +85°C
dBrnC
dBmp
4-wire, 0°C to +70°C
4-wire, –40°C to +85°C
+10
+12
4
4
Psophometric weighted noise
2-wire, 0°C to +70°C
2-wire, –40°C to +85°C
–83
–83
–80
–78
—
4
4-wire, 0°C to +70°C
4-wire, –40°C to +85°C
–80
–78
—
4
Note:
*P.G. = Performance Grade
SLIC Products
7
ELECTRICAL CHARACTERISTICS (continued)
Description
Test Conditions (See Note 1)
Min
Typ
Max
Unit
Note
Single Frequency Out-of-Band Noise (See Test Circuit E)
Metallic
4 kHz to 9 kHz
9 kHz to 1 MHz
256 kHz and harmonics**
–76
–76
–63
4
4, 5, 8
4, 5
dBm
Longitudinal
1 kHz to 15 kHz
Above 15 kHz
256 kHz and harmonics**
–70
–85
–57
4
4, 5, 8
4, 5
Line Characteristics (See Figures 1a, 1b, 1c)
Short loops, Active state
Battery = –24 V, RLDC = 300 Ω
Battery = –43 V, RLDC = 600 Ω
Battery = –48 V, RLDC = 600 Ω
4, 9
4
—
32.4
35.0
37.6
19.5
Long loops, Active state
Battery = –24 V, RLDC = 640 Ω
Battery = –43 V, RLDC = 1300 Ω
Battery = –48 V, RLDC = 1900 Ω
20.0
23.0
18.0
4, 9
4
—
mA
OHT state
Battery = –24 V, RLDC = 600 Ω
Battery = –48 V, RLDC = 600 Ω
4, 9
—
15.5
17.5
70
Loop current
Tip Open state, RL = 0
Disconnect state, RL = 0
1.0
ILLIM (ITip and IRing)
Tip and ring shorted to GND
105
Power Dissipation Battery, Normal Loop Polarity
On-hook Open Circuit state
Battery = –24 V, w/o switching reg.
Battery = –48 V, with switching reg.
30
35
75
100
9
—
On-hook OHT state
Battery = –24 V, w/o switching reg.
Battery = –48 V, with switching reg.
175
135
9
—
100
225
On-hook Active state
Battery = –24 V, w/o switching reg.
Battery = –48 V, with switching reg.
135
180
225
300
9
—
mW
Off-hook OHT state
RL = 50 Ω
Battery = –24 V, w/o switching reg.
Battery = –48 V, with switching reg.
500
400
800
750
9
—
Off-hook Active state
RL = 50 Ω
Battery = –24 V, w/o switching reg.
Battery = –48 V, with switching reg.
800
800
1100
1000
9
—
Supply Currents, Battery = –24 V or –48 V
VCC on-hook supply current
VEE on-hook supply current
VBAT on-hook supply current
Note:
Open Circuit state
OHT state
Active state
3.0
6.0
7.5
4.5
10.0
12.0
Open Circuit state
OHT state
Active state
1.0
2.2
2.7
2.3
3.5
6.0
mA
9
Open Circuit state
OHT state
Active state
0.4
3.0
4.0
1.0
5.0
6.0
**Applies only when switching regulator is used.
8
Am7942 Data Sheet
ELECTRICAL CHARACTERISTICS (continued)
Description
Test Conditions (See Note 1)
Min
Typ
Max
Unit
Note
Power Supply Rejection Ratio (VRIPPLE = 50 mVrms)
VCC
VEE
VBAT
50 Hz to 3.4 kHz
3.4 kHz to 50 kHz
25
22
45
35
50 Hz to 3.4 kHz
3.4 kHz to 50 kHz
20
10
40
25
dB
6
4
50 Hz to 3.4 kHz
3.4 kHz to 50 kHz
27
20
45
40
Effective int. resistance
Off-Hook Detector
Current threshold
CAS to GND
85
170
255
+20
kΩ
IDET = 365/RD
–20
%
Ground-Key Detector Thresholds, Active State
Ground-key resistance threshold
Battery = –24 V, B(RING) to GND
Battery = –48 V, B(RING) to GND
1.0
2.0
2.2
5.0
4.5
10.0
9
—
kΩ
Ground-key current threshold
B(RING) to GND
Midpoint to GND
9
9
mA
7
4
Effective internal resistance
Ring-Trip Detector Input
Bias current
GKFIL to AGND/DGND
18
36
54
kΩ
–5
–0.05
µA
Offset voltage
Source resistance = 0 to 2 MΩ
–50
0
+50
mV
11
Logic Inputs (C4–C1, E0, E1, and CHCLK)
Input High voltage
2.0
V
Input Low voltage
0.8
40
45
Input High current
Input High current
Input Low current
Logic Output (DET)
Output Low voltage
Output High voltage
All inputs except E1
–75
–75
–0.4
µA
Input E1
mA
IOUT = 0.8 mA
0.4
V
IOUT = –0.1 mA
2.4
Relay Driver Outputs (RINGOUT, TESTOUT)
On voltage
Off leakage
25 mA sink
VOH = +15 V
+1.5
100
V
µA
SLIC Products
9
RELAY DRIVER SCHEMATICS
RINGOUT
TESTOUT
BGND
BGND
15474A-002
2
1
0
TA = 70°C
TA = 25°C
ON Voltage
at RINGOUT or TESTOUT
(V)
0
30
Current into RINGOUT or TESTOUT (mA)
60
SWITCHING CHARACTERISTICS
Symbol
Parameter
Test Conditions
Temperature
Range
Min Typ Max Unit Note
tgkde
E1 Low to DET High (E0 = 1)
E1 Low to DET Low (E0 = 1)
E1 High to DET Low (E0 = 1)
E1 High to DET High (E0 = 1)
0°C to +70°C
3.8
4.0
Ground-Key Detect state
RL open, RG connected
(See Figure H)
–40°C to +85°C
0°C to +70°C
–40°C to +85°C
1.1
1.6
µs
4
tshde
0°C to +70°C
–40°C to +85°C
1.2
1.7
Switchhook Detect state
RL = 600 Ω, RG open
(See Figure G)
0°C to +70°C
–40°C to +85°C
3.8
4.0
SWITCHING WAVEFORMS
E1 to DET
E1
DET
tgkde
tshde
tgkde
tshde
Note:
All delays measured at 1.4 V levels.
15474A-003
10
Am7942 Data Sheet
Notes:
1. Unless otherwise noted, test conditions are BAT = –48 V, VCC = +5 V, VEE = –5 V, RL = 600 Ω, CHP = 0.33 µF,
R
DC1 = RDC2 = 7.14 kΩ, CDC = 0.47 µF, RD = 35.4 kΩ, CCAS = 0.47 µF, no fuse resistors, RT =120 kΩ, and RRX = 60 kΩ.
Switching regulator components: L = 1 mH, CFIL = 0.47 µF (see Application Circuit).
2. Overload level is defined when THD = 1%.
3. Balance return signal is the signal generated at VTX by VRX. This specification assumes the two-wire AC load impedance
matches the programmed impedance.
4. Not tested in production. This parameter is guaranteed by characterization or correlation to other tests.
5. For frequencies below 12 kHz, these tests are performed with a longitudinal impedance of 90 Ω and metallic impedance of
300 Ω. For frequencies greater than 12 kHz, a longitudinal impedance of 90 Ω and a metallic impedance of 135 Ω is used.
These tests are extremely sensitive to circuit board layout. Please refer to application notes for details.
6. This parameter is tested at 1 kHz in production. Performance at other frequencies is guaranteed by characterization.
7. “Midpoint” is defined as the connection point between two 300 Ω series resistors connected between A(TIP) and B(RING).
8. Fundamental and harmonics from 256 kHz switch regulator chopper are not included.
9. For –24 V battery, switching regulator is disabled. L, CHS, and VREG pins connected to VBAT pin; CHCLK pin connected to
AGND/DGND.
10. Assumes the following ZT network:
VTX
RSN
60 kΩ
60 kΩ
150 pF
11. Tested with 0 Ω source impedance. 2 MΩ is specified for system design purposes only.
12. Group delay can be considerably reduced by using a ZT network such as that shown in Note 10 above. The network reduces
the group delay to less than 2 µs. The effect of group delay on linecard performance may be compensated for by using the
QSLAC™ or DSLAC™ device.
Table 1. SLIC Decoding
DET Output
State
C3 C2 C1
Two-Wire Status
Open Circuit
E1 = 0
Ring trip
E1 = 1
Ring trip
0
1
2
3
4
5
6
7
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Ringing
Ring trip
Ring trip
Ground key
Ground key
—
Active
Loop detector
Loop detector
Loop detector
Loop detector
Loop detector
Loop detector
On-Hook TX (OHT)
Tip Open
Reserved
—
Active Polarity Reversal
OHT Polarity Reversal
Ground key
Ground key
SLIC Products
11
Table 2. User-Programmable Components
ZT is connected between the VTX and RSN pins. The fuse re-
∗
ZT = 200(Z2WIN – 2RF
)
sistors are RF, and Z2WIN is the desired 2-wire AC input im-
pedance. When computing ZT, the internal current amplifier
pole and any external stray capacitance between VTX and
RSN must be taken into account.
ZRX is connected from VRX to the RSN. ZT is defined above,
and G42L is the desired receive gain.
ZL
200ZT
------------ -------------------------------------------------
ZRX
=
•
G42L ZT + 200(ZL + 2RF)
RDC1, RDC2, and CDC form the network connected to the
RDC pin. RDC1 and RDC2 are approximately equal. ILOOP is
the desired loop current in the constant-current region.
500
R
DC1 + RDC2 = -------------
ILOOP
R
DC1 + RDC2
-------------------------------
CDC = 1.5 ms •
RDC1 RDC2
RD and CD form the network connected from RD to –5 V, and
IT is the threshold current between on hook and off hook.
365
0.5 ms
--------
IT
RD
=
, CD = ----------------
RD
CCAS is the regulator filter capacitor, and fc is the desired filter
cut-off frequency.
1
CCAS = -----------------------------
3.4 • 105πfc
Note:
*RFUSE = 20 Ω–50 Ω, user selectable.
12
Am7942 Data Sheet
DC FEED CHARACTERISTICS
RDC1 + RDC2 = RDC = 14.28 kΩ
Active state
OHT state
Notes:
1. Constant-current region:
500
Active state:
OHT state:
IL = ----------
RDC
250
IL = ---------
RDC
2. Anti-saturation turn-on (Active state):
a. Battery independent:
b. Battery tracking:
VAB = 35.5 V,
(|VBAT| > 46.2 V)
VAB = 1.1 |VBAT| – 15,
(|VBAT| ≥ 46.2 V)
(|VBAT| < 46.2 V)
VAB = 0.7 |VBAT| + 3.5,
3. Open circuit voltage:
Active state:
VAB = 42.6,
AB = 0.7 |VBAT| + 5.89,
(|VBAT| > 53 V)
(|VBAT| ≤ 53 V)
V
OHT state,
VAB = 39.1,
(|VBAT| > 49.8 V)
VAB = 0.7 |VBAT| + 4.7,
(|VBAT| ≤ 49.8 V)
4. Anti-saturation 1 region:
Active state:
RDC
æ
è
ö
----------
70.4
VAB = 46.2 – IL
VAB = 39.1 – IL
ø
RDC
----------
70.4
æ
è
ö
ø
OHT state:
5. Anti-saturation 2 region:
Active state:
RDC
æ
è
ö
----------
210
VAB = 0.7 VBAT + 5.89 – IL
ø
RDC
æ
è
ö
----------
210
OHT state:
VAB = 0.7 VBAT + 4.7 – IL
ø
a. VA–VB (VAB) Voltage vs. Loop Current (Typical)
SLIC Products
13
DC FEED CHARACTERISTICS (continued)
RDC1 + RDC2 = RDC = 14.28 kΩ
VBAT = 47.3 V
b. Loop Current vs. Load Resistance (Typical)
A
RSN
RDC
a
b
RDC1
SLIC
IL
RL
RDC2
CDC
B
Feed current programmed by RDC1 and RDC2
c. Feed Programming
15474A-004
Figure 1. DC Feed Characteristics
14
Am7942 Data Sheet
TEST CIRCUITS
(TIP)
A
VTX
VTX
(TIP)
A
RL
2
RT
SLIC
SLIC
VL
VAB
RT
VAB
RL
AGND
AGND
RL
2
RRX
RRX
RSN
RSN
(RING)
B
B
(RING)
VRX
IL4-2 = –20 log (VAB / VRX
)
IL2-4 = –20 log (VTX / VAB
)
BRS = 20 log (VTX / VRX
)
A. Two- to Four-Wire Insertion Loss
B. Four- to Two-Wire Insertion Loss and Balance Return Signal
ZD
A
(TIP)
VTX
VTX
(TIP)
A
1/ωC << RL
RL
2
RT
S1
C
SLIC
R
R
AGND
VL
RT
S2
VM
AGND
VS
SLIC
VL
ZIN
RL
2
RRX
VRX
RSN
B(RING)
RSN
(RING)
B
RRX
S2 Open, S1 Closed:
L-T Long. Bal. = 20 log (VAB / VL)
L-4 Long. Bal. = 20 log (VTX / VL)
Note:
ZD is the desired impedance (e.g., the characteristic
impedance of the line).
S2 Closed, S1 Open:
RL = –20 log (2 VM / VS)
4-L Long. Sig. Gen. = 20 log (VL / VRX
)
C. Longitudinal Balance
D. Two-Wire Return Loss Test Circuit
SLIC Products
15
TEST CIRCUITS (continued)
RL
C
A(TIP)
A(TIP)
68 Ω
SM
RL
RE
56 Ω
IDC
VN
SLIC
B(RING)
68 Ω
B(RING)
SE
Current Feed or Ground Key
C
1/ωC << 90 Ω
E. Single-Frequency Noise
F. Ground-Key Detection Center Point Test
VCC
6.2 kΩ
A(TIP)
A(TIP)
DET
E1
15 pF
RL = 600 Ω
B(RING)
RG
B(RING)
RG: 2 kΩ at VBAT = –48 V
1 kΩ at VBAT = –24 V
H. Ground-Key Switching
G. Loop-Detector Switching
16
Am7942 Data Sheet
PHYSICAL DIMENSIONS
PL032
SLIC Products
17
REVISION SUMMARY
Revision C to Revision D
•
•
Minor changes were made to the data sheet style and format to conform to Legerity standards.
Table 1—Some information in the table was revised, including the addition of the Reserved status.
Revision D to Revision E
•
•
Minor changes were made to the data sheet style and format to conform to Legerity standards.
In the Pin Description table, the TP pin description was inserted/changed to: “Thermal pin. Connection for heat
dissipation. Internally connected to substrate (QBAT). Leave as open circuit or connected to QBAT. In both cases,
the TP pins can connect to an area of copper on the board to enhance heat dissipation."
Revision E to Revision F
•
•
•
The physical dimension (PL032) was added to the Physical Dimensions section.
Deleted the Ceramic DIP and Plastic DIP packages and references to them.
Updated the Pin Description table to correct inconsistencies.
Legerity provides silicon solutions that enhance the performance, speeds time-to-market, and lowers the system
cost of our customers' products. By combining process, design, systems architecture, and a complete set of
software and hardware support tools with unparalleled factory and worldwide field applications support, Legerity
ensures its customers enjoy a smoother design experience. It is this commitment to our customers that places
Legerity in a class by itself.
18
Am7942 Data Sheet
The contents of this document are provided in connection with Legerity, Inc. products. Legerity makes no representations or warranties with re-
spect to the accuracy or completeness of the contents of this publication and reserves the right to make changes to specifications and product
descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights
is granted by this publication. Except as set forth in Legerity's Standard Terms and Conditions of Sale, Legerity assumes no liability whatsoever,
and disclaims any express or implied warranty, relating to its products including, but not limited to, the implied warranty of merchantability, fitness
for a particular purpose, or infringement of any intellectual property right.
Legerity's products are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the
body, or in other applications intended to support or sustain life, or in any other application in which the failure of Legerity's product could create
a situation where personal injury, death, or severe property or environmental damage may occur. Legerity reserves the right to discontinue or
make changes to its products at any time without notice.
© 1999 Legerity, Inc.
All rights reserved.
Trademarks
Legerity, the Legerity logo, and combinations thereof, DSLAC and QSLAC are trademarks of Legerity, Inc.
Other product names used in this publication are for identification purposes only and may be trademarks of their respective companies.
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