BCP68T3 [ETC]

TRANSISTOR | BJT | NPN | 20V V(BR)CEO | 1A I(C) | SOT-223 ; 晶体管| BJT | NPN | 20V V（ BR ） CEO | 1A I（C ） | SOT- 223\n


型号：	BCP68T3
厂家：	ETC
描述：	TRANSISTOR \| BJT \| NPN \| 20V V(BR)CEO \| 1A I(C) \| SOT-223 晶体管\| BJT \| NPN \| 20V V（ BR ） CEO \| 1A I（C ） \| SOT- 223\n 晶体晶体管
文件：	总8页 (文件大小：75K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

ON Semiconductort

BCP68T1

NPN Silicon

Epitaxial Transistor

ON Semiconductor Preferred Device

MEDIUM POWER

NPN SILICON

HIGH CURRENT

TRANSISTOR

This NPN Silicon Epitaxial Transistor is designed for use in low

voltage, high current applications. The device is housed in the

SOT-223 package, which is designed for medium power surface

mount applications.

SURFACE MOUNT

• High Current: I = 1.0 Amp

• The SOT-223 Package can be soldered using wave or reflow.

• SOT-223 package ensures level mounting, resulting in improved

thermal conduction, and allows visual inspection of soldered joints.

The formed leads absorb thermal stress during soldering, eliminating

the possibility of damage to the die

• Available in 12 mm Tape and Reel

CASE 318E-04, STYLE 1

TO-261AA

Use BCP68T1 to order the 7 inch/1000 unit reel.

Use BCP68T3 to order the 13 inch/4000 unit reel.

• The PNP Complement is BCP69T1

COLLECTOR 2,4

BASE

EMITTER 3

MAXIMUM RATINGS (T = 25°C unless otherwise noted)

Rating

Collector-Emitter Voltage

Collector-Base Voltage

Symbol

Value

Unit

Vdc

Adc

CEO

CBO

EBO

Emitter-Base Voltage

Collector Current

(1)

Total Power Dissipation @ T = 25°C

Derate above 25°C

1.5

Watts

mW/°C

Operating and Storage Temperature Range

DEVICE MARKING

T , T

–65 to 150

°C

stg

THERMAL CHARACTERISTICS

Characteristic

Symbol

Max

Unit

Thermal Resistance — Junction-to-Ambient (surface mounted)

83.3

°C/W

θJA

Maximum Temperature for Soldering Purposes

Time in Solder Bath

260

°C

Sec

1. Device mounted on a FR-4 glass epoxy printed circuit board 1.575 in. x 1.575 in. x 0.0625 in.; mounting pad for the collector lead = 0.93 sq. in.

Preferred devices are ON Semiconductor recommended choices for future use and best overall value.

Semiconductor Components Industries, LLC, 2001

Publication Order Number:

November, 2001 – Rev. 3

BCP68T1/D

BCP68T1

ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)

Characteristics

Symbol

Min

Typ

Max

Unit

OFF CHARACTERISTICS

Collector-Emitter Breakdown Voltage

(I = 100 µAdc, I = 0)

5.0

—

Vdc

(BR)CES

(BR)CEO

(BR)EBO

Collector-Emitter Breakdown Voltage

(I = 1.0 mAdc, I = 0)

Emitter-Base Breakdown Voltage

(I = 10 µAdc, I = 0)

Vdc

Collector-Base Cutoff Current

(V = 25 Vdc, I = 0)

µAdc

CBO

Emitter-Base Cutoff Current

(V = 5.0 Vdc, I = 0)

—

EBO

ON CHARACTERISTICS (2)

DC Current Gain

—

(I = 5.0 mAdc, V

= 10 Vdc)

= 1.0 Vdc)

—

375

—

(I = 500 mAdc, V

(I = 1.0 Adc, V

= 1.0 Vdc)

Collector-Emitter Saturation Voltage

(I = 1.0 Adc, I = 100 mAdc)

—

0.5

Vdc

CE(sat)

Base-Emitter On Voltage

(I = 1.0 Adc, V = 1.0 Vdc)

BE(on)

—

1.0

DYNAMIC CHARACTERISTICS

Current-Gain — Bandwidth Product

—

MHz

(I = 10 mAdc, V

= 5.0 Vdc)

2. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0%

TYPICAL ELECTRICAL CHARACTERISTICS

300

200

300

200

= 125°C

= 25°C

100

= -55°C

= 10 V

= 25°C

f = 30 MHz

= 1.0 V

1.0

100

1000

100

200

1000

I , COLLECTOR CURRENT (mA)

Figure 1. DC Current Gain

Figure 2. Current-Gain-Bandwidth Product

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BCP68T1

TYPICAL ELECTRICAL CHARACTERISTICS

1.0

0.8

0.6

0.4

0.2

= 25°C

@ I /I = 10

C B

BE(sat)

@ V = 1.0 V

BE(on)

@ I /I = 10

C B

CE(sat)

5.0

1.0

100

1000

1.0

2.0

3.0

4.0

I , COLLECTOR CURRENT (mA)

V , REVERSE VOLTAGE (VOLTS)

Figure 3. “On” Voltage

Figure 4. Capacitance

5.0

-ā0.8

-1.2

-1.6

-ā2.0

-ā2.4

-ā2.8

= 25°C

θVB

for V

5.0

1.0

100

1000

V , REVERSE VOLTAGE (VOLTS)

I , COLLECTOR CURRENT (mA)

Figure 5. Capacitance

Figure 6. Base-Emitter Temperature Coefficient

1.0

0.8

0.6

= 25°C

= 1000 mA

= 10 mA

= 100 mA

= 50 mA

0.4

0.2

= 500 mA

0.01

0.1

1.0

I , BASE CURRENT (mA)

100

Figure 7. Saturation Region

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BCP68T1

INFORMATION FOR USING THE SOT–223 SURFACE MOUNT PACKAGE

MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS

Surface mount board layout is a critical portion of the total

design. The footprint for the semiconductor packages must

be the correct size to insure proper solder connection

interface between the board and the package. With the

correct pad geometry, the packages will self align when

subjected to a solder reflow process.

0.15

3.8

0.079

2.0

0.248

6.3

SOT–223

0.091

2.3

0.091

2.3

0.079

2.0

inches

0.059

1.5

0.059

1.5

0.059

1.5

SOT–223 POWER DISSIPATION

The power dissipation of the SOT–223 is a function of

doubled with this method, area is taken up on the printed

circuit board which can defeat the purpose of using

the pad size. This can vary from the minimum pad size for

soldering to the pad size given for maximum power dissipa-

tion. Power dissipation for a surface mount device is deter-

surface mount technology. A graph of R

tor pad area is shown in Figure 8.

versus collec-

θJA

mined byT

, the maximum rated junction temperature

of the die, Rθ , the thermal resistance from the device

J(max)

160

junction to ambient; and the operating temperature, T . Us-

ing the values provided on the data sheet for the SOT–223

Board Material = 0.0625″

GĆ10/FRĆ4, 2 oz Copper

140

= 25°C

package, P can be calculated as follows.

0.8 Watts

– T

J(max)

θJA

120

The values for the equation are found in the maximum

ratings table on the data sheet. Substituting these values into

1.5 Watts

1.25 Watts*

the equation for an ambient temperature T of 25°C, one

can calculate the power dissipation of the device which in

this case is 1.5 watts.

100

*Mounted on the DPAK footprint

0.0

0.2

0.4

0.6

0.8

1.0

150°C – 25°C

83.3°C/W

= 1.50 watts

A, Area (square inches)

Figure 8. Thermal Resistance versus Collector

Pad Area for the SOT-223 Package (Typical)

The 83.3°C/W for the SOT-223 package assumes the

use of the recommended footprint on a glass epoxy

printed circuit board to achieve a power dissipation of 1.5

watts. There are other alternatives to achieving higher

power dissipation from the SOT-223 package. One is to

increase the area of the collector pad. By increasing the

area of the collector pad, the power dissipation can be

increased. Although the power dissipation can almost be

Another alternative would be to use a ceramic substrate

or an aluminum core board such as Thermal Clad . Using

a board material such as Thermal Clad, an aluminum core

board, the power dissipation can be doubled using the same

footprint.

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BCP68T1

SOLDER STENCIL GUIDELINES

Prior to placing surface mount components onto a printed

The stencil opening size for the surface mounted package

should be the same as the pad size on the printed circuit

board, i.e., a 1:1 registration.

circuit board, solder paste must be applied to the pads. A

solder stencil is required to screen the optimum amount of

solder paste onto the footprint. The stencil is made of brass

or stainless steel with a typical thickness of 0.008 inches.

SOLDERING PRECAUTIONS

The melting temperature of solder is higher than the rated

temperature of the device. When the entire device is heated

to a high temperature, failure to complete soldering within

a short time could result in device failure. Therefore, the

following items should always be observed in order to

minimize the thermal stress to which the devices are

subjected.

• Always preheat the device.

• The delta temperature between the preheat and

soldering should be 100°C or less.*

• The soldering temperature and time should not exceed

260°C for more than 10 seconds.

• When shifting from preheating to soldering, the

maximum temperature gradient should be 5°C or less.

• After soldering has been completed, the device should

be allowed to cool naturally for at least three minutes.

Gradual cooling should be used as the use of forced

cooling will increase the temperature gradient and

result in latent failure due to mechanical stress.

• Mechanical stress or shock should not be applied dur-

ing cooling

* Soldering a device without preheating can cause exces-

sive thermal shock and stress which can result in damage

to the device.

• When preheating and soldering, the temperature of the

leads and the case must not exceed the maximum

temperature ratings as shown on the data sheet. When

using infrared heating with the reflow soldering

method, the difference should be a maximum of 10°C.

TYPICAL SOLDER HEATING PROFILE

For any given circuit board, there will be a group of

control settings that will give the desired heat pattern. The

operator must set temperatures for several heating zones,

and a figure for belt speed. Taken together, these control

settings make up a heating “profile” for that particular

circuit board. On machines controlled by a computer, the

computer remembers these profiles from one operating

session to the next. Figure 7 shows a typical heating profile

for use when soldering a surface mount device to a printed

circuit board. This profile will vary among soldering

systems but it is a good starting point. Factors that can

affect the profile include the type of soldering system in

use, density and types of components on the board, type of

solder used, and the type of board or substrate material

being used. This profile shows temperature versus time.

The line on the graph shows the actual temperature that

might be experienced on the surface of a test board at or

near a central solder joint. The two profiles are based on a

high density and a low density board. The Vitronics

SMD310 convection/infrared reflow soldering system was

used to generate this profile. The type of solder used was

62/36/2 Tin Lead Silver with a melting point between

177–189°C. When this type of furnace is used for solder

reflow work, the circuit boards and solder joints tend to

heat first. The components on the board are then heated by

conduction. The circuit board, because it has a large surface

area, absorbs the thermal energy more efficiently, then

distributes this energy to the components. Because of this

effect, the main body of a component may be up to 30

degrees cooler than the adjacent solder joints.

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BCP68T1

STEP 5

HEATING

ZONES 4 & 7

SPIKE"

STEP 6 STEP 7

VENT COOLING

STEP 1

PREHEAT

ZONE 1

RAMP"

STEP 2

VENT

STEP 3

HEATING

STEP 4

HEATING

ZONES 3 & 6

SOAK"

SOAK" ZONES 2 & 5

RAMP"

205° TO 219°C

PEAK AT

SOLDER JOINT

200°C

150°C

170°C

DESIRED CURVE FOR HIGH

MASS ASSEMBLIES

160°C

150°C

SOLDER IS LIQUID FOR

40 TO 80 SECONDS

(DEPENDING ON

140°C

100°C

MASS OF ASSEMBLY)

100°C

50°C

DESIRED CURVE FOR LOW

MASS ASSEMBLIES

TIME (3 TO 7 MINUTES TOTAL)

MAX

Figure 9. Typical Solder Heating Profile

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BCP68T1

PACKAGE DIMENSIONS

SOT–223 (TO–261)

CASE 318E–04

ISSUE K

NOTES:

ąă1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

ąă2. CONTROLLING DIMENSION: INCH.

INCHES

DIM MIN MAX

MILLIMETERS

MIN

6.30

3.30

1.50

0.60

2.90

2.20

MAX

6.70

3.70

1.75

0.89

3.20

2.40

0.100

0.35

2.00

1.05

0.249

0.130

0.060

0.024

0.115

0.087

0.263

0.145

0.068

0.035

0.126

0.094

0.0008 0.0040 0.020

0.009

0.060

0.033

0.014

0.078

0.041

0.24

1.50

0.85

0.08 (0003)

0.264

0.287

6.70

7.30

STYLE 1:

PIN 1. BASE

2. COLLECTOR

3. EMITTER

4. COLLECTOR

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BCP68T1

Thermal Clad is a trademark of the Bergquist Company.

ON Semiconductor and

are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes

without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular

purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,

including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or

specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be

validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.

SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications

intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or

death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold

SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable

attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim

alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.

PUBLICATION ORDERING INFORMATION

Literature Fulfillment:

JAPAN: ON Semiconductor, Japan Customer Focus Center

4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031

Phone: 81–3–5740–2700

Literature Distribution Center for ON Semiconductor

P.O. Box 5163, Denver, Colorado 80217 USA

Phone: 303–675–2175 or 800–344–3860 Toll Free USA/Canada

Fax: 303–675–2176 or 800–344–3867 Toll Free USA/Canada

Email: ONlit@hibbertco.com

Email: r14525@onsemi.com

ON Semiconductor Website: http://onsemi.com

For additional information, please contact your local

Sales Representative.

N. American Technical Support: 800–282–9855 Toll Free USA/Canada

BCP68T1/D

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BCP68T3 [ETC]

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