BSV52LT1/D [ETC]

Switching Transistor ; 开关晶体管\n
BSV52LT1/D
型号: BSV52LT1/D
厂家: ETC    ETC
描述:

Switching Transistor
开关晶体管\n

晶体 开关 晶体管
文件: 总4页 (文件大小:39K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
ON Semiconductort  
Switching Transistor  
NPN Silicon  
BSV52LT1  
MAXIMUM RATINGS  
Rating  
Collector–Emitter Voltage  
Collector–Base Voltage  
Symbol  
Value  
12  
Unit  
Vdc  
V
CEO  
V
CBO  
3
20  
Vdc  
1
Collector Current — Continuous  
THERMAL CHARACTERISTICS  
Characteristic  
I
100  
mAdc  
C
2
Symbol  
Max  
Unit  
CASE 318–08, STYLE 6  
SOT–23 (TO–236AB)  
(1)  
Total Device Dissipation FR–5 Board  
P
D
225  
mW  
T = 25°C  
A
Derate above 25°C  
1.8  
556  
300  
mW/°C  
°C/W  
mW  
Thermal Resistance Junction to Ambient  
R
q
JA  
COLLECTOR  
3
Total Device Dissipation  
P
D
(2)  
Alumina Substrate, T = 25°C  
A
Derate above 25°C  
2.4  
417  
mW/°C  
°C/W  
°C  
1
Thermal Resistance Junction to Ambient  
Junction and Storage Temperature  
DEVICE MARKING  
R
q
JA  
BASE  
T , T  
–55 to +150  
J
stg  
2
EMITTER  
BSV52LT1 = B2  
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)  
A
Characteristic  
OFF CHARACTERISTICS  
Symbol  
Min  
Max  
Unit  
Collector–Emitter Breakdown Voltage  
V
Vdc  
(BR)CEO  
(I = 1.0 mAdc)  
C
12  
Collector Cutoff Current  
I
CBO  
(V = 10 Vdc, I = 0)  
100  
5.0  
nAdc  
µAdc  
CB  
E
(V = 10 Vdc, I = 0, T = 125°C)  
CB  
E
A
1. FR–5 = 1.0 0.75 0.062 in.  
2. Alumina = 0.4 0.3 0.024 in. 99.5% alumina.  
Semiconductor Components Industries, LLC, 2001  
1
Publication Order Number:  
March, 2001 – Rev. 1  
BSV52LT1/D  
BSV52LT1  
ELECTRICAL CHARACTERISTICS (continued) (T = 25°C unless otherwise noted)  
A
Characteristic  
ON CHARACTERISTICS  
Symbol  
Min  
Max  
Unit  
DC Current Gain  
H
FE  
(I = 1.0 mAdc, V = 1.0 Vdc)  
25  
40  
25  
120  
C
CE  
(I = 10 mAdc, V = 1.0 Vdc)  
C
CE  
(I = 50 mAdc, V = 1.0 Vdc)  
C
CE  
Collector–Emitter Saturation Voltage  
(I = 10 mAdc, I = 300 µAdc)  
V
V
mVdc  
mVdc  
CE(sat)  
BE(sat)  
300  
250  
400  
C
B
(I = 10 mAdc, I = 1.0 mAdc)  
C
B
(I = 50 mAdc, I = 5.0 mAdc)  
C
B
Base–Emitter Saturation Voltage  
(I = 10 mAdc, I = 1.0 mAdc)  
700  
850  
1200  
C
B
(I = 50 mAdc, I = 5.0 mAdc)  
C
B
SMALL–SIGNAL CHARACTERISTICS  
Current–Gain — Bandwidth Product  
f
MHz  
pF  
T
(I = 10 mAdc, V = 10 Vdc, f = 100 MHz)  
400  
C
CE  
Output Capacitance  
C
obo  
(V = 5.0 Vdc, I = 0, f = 1.0 MHz)  
4.0  
4.5  
CB  
E
Input Capacitance  
C
pF  
ibo  
(V = 1.0 Vdc, I = 0, f = 1.0 MHz)  
EB  
C
SWITCHING CHARACTERISTICS  
Storage Time  
t
ns  
ns  
ns  
s
(I = I = I = 10 mAdc)  
13  
12  
18  
C
B1  
B2  
Turn–On Time  
(V = 1.5 Vdc, I = 10 mAdc, I = 3.0 mAdc)  
BE  
t
t
on  
C
B
Turn–Off Time  
(I = 10 mAdc, I = 3.0 mAdc)  
C
off  
B
http://onsemi.com  
2
BSV52LT1  
INFORMATION FOR USING THE SOT–23 SURFACE MOUNT PACKAGE  
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS  
Surface mount board layout is a critical portion of the total  
design. The footprint for the semiconductor packages must  
be the correct size to insure proper solder connection  
interface between the board and the package. With the  
correct pad geometry, the packages will self align when  
subjected to a solder reflow process.  
0.037  
0.95  
0.037  
0.95  
0.079  
2.0  
0.035  
0.9  
0.031  
0.8  
inches  
mm  
SOT–23  
SOT–23 POWER DISSIPATION  
SOLDERING PRECAUTIONS  
The power dissipation of the SOT–23 is a function of the  
pad size. This can vary from the minimum pad size for  
soldering to a pad size given for maximum power  
dissipation. Power dissipation for a surface mount device is  
The melting temperature of solder is higher than the rated  
temperature of the device. When the entire device is heated  
to a high temperature, failure to complete soldering within  
a short time could result in device failure. Therefore, the  
following items should always be observed in order to  
minimize the thermal stress to which the devices are  
subjected.  
determined by T , the maximum rated junction  
J(max)  
temperature of the die, R , the thermal resistance from the  
θJA  
device junction to ambient, and the operating temperature,  
T . Using the values provided on the data sheet for the  
A
SOT–23 package, P can be calculated as follows:  
Always preheat the device.  
D
The delta temperature between the preheat and soldering  
should be 100°C or less.*  
T
J(max) – TA  
Rθ  
PD =  
JA  
When preheating and soldering, the temperature of the  
leads and the case must not exceed the maximum  
temperature ratings as shown on the data sheet. When  
using infrared heating with the reflow soldering method,  
the difference shall be a maximum of 10°C.  
The values for the equation are found in the maximum  
ratings table on the data sheet. Substituting these values into  
the equation for an ambient temperature T of 25°C, one can  
A
calculate the power dissipation of the device which in this  
case is 225 milliwatts.  
The soldering temperature and time shall not exceed  
260°C for more than 10 seconds.  
150°C – 25°C  
556°C/W  
PD =  
= 225 milliwatts  
When shifting from preheating to soldering, the maximum  
temperature gradient shall be 5°C or less.  
The 556°C/W for the SOT–23 package assumes the use of  
the recommended footprint on a glass epoxy printed circuit  
board to achieve a power dissipation of 225 milliwatts.  
There are other alternatives to achieving higher power  
dissipation from the SOT–23 package. Another alternative  
would be to use a ceramic substrate or an aluminum core  
board such as Thermal Clad . Using a board material such  
as Thermal Clad, an aluminum core board, the power  
dissipation can be doubled using the same footprint.  
After soldering has been completed, the device should be  
allowed to cool naturally for at least three minutes.  
Gradual cooling should be used as the use of forced  
cooling will increase the temperature gradient and result  
in latent failure due to mechanical stress.  
Mechanical stress or shock should not be applied during  
cooling.  
* Soldering a device without preheating can cause  
excessive thermal shock and stress which can result in  
damage to the device.  
http://onsemi.com  
3
BSV52LT1  
PACKAGE DIMENSIONS  
SOT–23 (TO–236)  
CASE 318–08  
ISSUE AF  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
2. CONTROLLING DIMENSION: INCH.  
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD  
FINISH THICKNESS. MINIMUM LEAD THICKNESS  
IS THE MINIMUM THICKNESS OF BASE  
MATERIAL.  
A
L
3
INCHES  
DIM MIN MAX  
MILLIMETERS  
S
C
B
MIN  
2.80  
1.20  
0.89  
0.37  
1.78  
MAX  
3.04  
1.40  
1.11  
1
2
A
B
C
D
G
H
J
0.1102 0.1197  
0.0472 0.0551  
0.0350 0.0440  
0.0150 0.0200  
0.0701 0.0807  
V
G
0.50  
2.04  
0.100  
0.177  
0.69  
1.02  
2.64  
0.60  
0.0005 0.0040 0.013  
0.0034 0.0070 0.085  
K
L
0.0140 0.0285  
0.0350 0.0401  
0.0830 0.1039  
0.0177 0.0236  
0.35  
0.89  
2.10  
0.45  
S
V
H
J
D
K
STYLE 6:  
PIN 1. BASE  
2. EMITTER  
3. COLLECTOR  
Thermal Clad is a trademark of the Bergquist Company.  
ON Semiconductor and  
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes  
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular  
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,  
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or  
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be  
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.  
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or  
death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold  
SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable  
attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim  
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.  
PUBLICATION ORDERING INFORMATION  
NORTH AMERICA Literature Fulfillment:  
CENTRAL/SOUTH AMERICA:  
Literature Distribution Center for ON Semiconductor  
P.O. Box 5163, Denver, Colorado 80217 USA  
Spanish Phone: 303–308–7143 (Mon–Fri 8:00am to 5:00pm MST)  
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001–800–4422–3781  
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JAPAN: ON Semiconductor, Japan Customer Focus Center  
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Phone: 81–3–5740–2700  
Email: r14525@onsemi.com  
English Phone: (+1) 303–308–7142 (Mon–Fri 12:00pm to 5:00pm GMT)  
Email: ONlit@hibbertco.com  
ON Semiconductor Website: http://onsemi.com  
EUROPEAN TOLL–FREE ACCESS*: 00–800–4422–3781  
For additional information, please contact your local  
Sales Representative.  
*Available from Germany, France, Italy, UK, Ireland  
BSV52LT1/D  

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