DM9314 [ETC]
;型号: | DM9314 |
厂家: | ETC |
描述: |
|
文件: | 总6页 (文件大小:126K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
June 1989
9314/DM9314 Quad Latch
General Description
The ’9314 is a multifunctional 4-bit latch designed for gener-
al purpose storage applications in high speed digital sys-
tems. All outputs have active pull-up circuitry to provide high
capacitance drive and to provide low impedance in both
logic states for good noise immunity.
Connection Diagram
Logic Symbol
Dual-In-Line Package
TL/F/9788–2
e
e
V
Pin 16
CC
GND
TL/F/9788–1
Order Number 9314DMQB, 9314FMQB or DM9314N
See NS Package Number J16A, N16E or W16A
Pin 8
Pin Names
Description
E
Enable Input (Active LOW)
Data Inputs
D0–D3
S0–S3
MR
Set Inputs (Active LOW)
Master Reset Input (Active LOW)
Latch Outputs
Q0–Q3
C
1995 National Semiconductor Corporation
TL/F/9788
RRD-B30M115/Printed in U. S. A.
Absolute Maximum Ratings (Note)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Note: The ‘‘Absolute Maximum Ratings’’ are those values
beyond which the safety of the device cannot be guaran-
teed. The device should not be operated at these limits. The
parametric values defined in the ‘‘Electrical Characteristics’’
table are not guaranteed at the absolute maximum ratings.
The ‘‘Recommended Operating Conditions’’ table will define
the conditions for actual device operation.
Supply Voltage
Input Voltage
7V
5.5V
Operating Free Air Temperature Range
Military
Commercial
b
b
a
55 C to 125 C
§
0 C to 70 C
§
a
§
§
a
65 C to 150 C
Storage Temperature Range
§
§
Recommended Operating Conditions
Military
Commercial
Symbol
Parameter
Units
Min
4.5
2
Nom
Max
Min
4.75
2
Nom
Max
V
V
V
Supply Voltage
5
5.5
5
5.25
V
V
CC
High Level Input Voltage
Low Level Input Voltage
High Level Output Current
Low Level Output Current
Free Air Operating Temperature
Setup Time HIGH or LOW
IH
0.8
0.8
V
IL
b
b
0.8
16
I
I
0.8
16
125
mA
mA
OH
OL
b
T
A
55
0
70
C
§
t
t
(H)
5.0
5.0
18
s
ns
ns
(L)
D
n
to E
18
s
t
t
(H)
(L)
Hold Time HIGH or LOW
to E
0
0
h
D
5.0
5.0
h
n
t
t
t
t
t
(H)
(L)
(L)
(L)
Setup Time HIGH, D to S
n
8.0
8.0
18
18
0
8.0
8.0
18
18
0
ns
ns
ns
ns
ns
s
n
Hold Time LOW, D to S
n
h
n
E Pulse Width LOW
w
w
MR Pulse Width LOW
Recovery Time, MR to E
rec
Electrical Characteristics
Over recommended operating free air temperature range (unless otherwise noted)
Typ
Symbol
Parameter
Conditions
Min
Max
Units
(Note 1)
e
e
e b
e
b
1.5
V
V
Input Clamp Voltage
V
Min, I
Min, I
12 mA
Max
V
V
I
CC
I
High Level Output Voltage
V
V
OH
CC
OH
2.4
3.4
0.2
e
Max
IL
e
e
Max
V
OL
Low Level Output Voltage
V
V
Min, I
CC
OL
0.4
V
e
Min
IH
@
Input Current Max
e
e
5.5V
I
I
V
Min, V
I
I
CC
1
mA
mA
Input Voltage
e
e
High Level Input Current
V
Max, V
2.4V
0.4V
40
60
IH
CC
I
Data Inputs
e
CC
e
b
I
I
I
Low Level Input Current
V
Max, V
1.6
2.7
IL
I
mA
b
Data Inputs
e
CC
(Note 2)
b
b
b
Short Circuit
V
Max
MIL
20
20
70
70
OS
CC
mA
mA
Output Current
b
COM
e
Supply Current
V
Max
55
CC
e
e
25 C.
Note 1: All typicals are at V
5V, T
§
Note 2: Not more than one output should be shorted at a time.
CC
A
2
e a
e a
25 C (See Section 1 for waveforms and load configurations)
Switching Characteristics V
5.0V, T
§
CC
A
e
C
L
15 pF
Symbol
Parameter
Units
Min
Max
t
t
Propagation Delay
E to Q
24
24
PLH
PHL
ns
ns
ns
ns
n
t
t
Propagation Delay
to Q
12
24
PLH
PHL
D
n
n
t
Propagation Delay
MR to Q
PLH
18
24
n
t
Propagation Delay
to Q
PHL
S
n
n
Functional Description
Truth Table
The ’9314 consists of four latches with a common active
LOW Enable input and active LOW Master Reset input.
When the Enable goes HIGH, data present in the latches is
stored and the state of the latch is no longer affected by the
MR
E
D
S
Q
Operation
n
H
H
H
L
L
L
H
X
L
L
X
L
D Mode
H
S
n
and D inputs. The Master Reset when activated over-
n
H
Q
n
b
1
rides all other input conditions forcing all latch outputs LOW.
Each of the four latches can be operated in one of two
modes:
H
H
H
H
H
L
L
L
L
H
L
H
L
L
L
L
H
L
R/S Mode
H
H
X
D-TYPE LATCHÐFor D-type operation the S input of a latch
is held LOW. While the common Enable is active the latch
output follows the D input. Information present at the latch
output is stored in the latch when the Enable goes HIGH.
H
X
Q
Q
b
n
1
1
b
n
L
X
X
X
L
Reset
SET/RESET LATCHÐDuring set/reset operation when the
common Enable is LOW a latch is reset by a LOW on the D
input, and can be set by a LOW on the S input if the D input
is HIGH. If both S and D inputs are LOW, the D input will
dominate and the latch will be reset. When the Enable goes
HIGH, the latch remains in the last state prior to disable-
ment. The two modes of latch operation are shown in the
Truth Table.
e
e
e
H
L
HIGH Voltage Level
LOW Voltage Level
Immaterial
X
Q
Q
e
Previous Output State
Present Output State
b
n
n
1
e
3
Logic Diagram
TL/F/9788–3
4
Physical Dimensions inches (millimeters)
16-Lead Ceramic Dual-In-Line Package (J)
Order Number 9314DMQB
NS Package Number J16A
16-Lead Molded Dual-In-Line Package (N)
Order Number DM9314N
NS Package Number N16E
5
Physical Dimensions inches (millimeters) (Continued)
16-Lead Ceramic Flat Package (W)
Order Number 9314FMQB
NS Package Number W16A
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and whose
failure to perform, when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
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Corporation
National Semiconductor
Europe
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Hong Kong Ltd.
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Japan Ltd.
a
1111 West Bardin Road
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National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
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