E4707B-EDGE4707B [ETC]

Quad Channel Per-Pin Precision Measurement Unit ; 四通道每针精密测量单元\n
E4707B-EDGE4707B
型号: E4707B-EDGE4707B
厂家: ETC    ETC
描述:

Quad Channel Per-Pin Precision Measurement Unit
四通道每针精密测量单元\n

文件: 总25页 (文件大小:194K)
中文:  中文翻译
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Edge4707B  
Quad Channel Per-Pin  
Precision Measurement Unit  
TEST AND MEASUREMENT PRODUCTS  
Features  
Description  
The Edge4707B is a precision measurement unit designed  
for automatic test equipment and instrumentation.  
Manufactured in a wide voltage CMOS process, it is a  
monolithic solution for a quad channel per pin PMU.  
FV / MI Capability  
FI / MV Capability  
FV / MV Capability  
FI / MI Capability  
4 Current Ranges (2 µA, 20 µA, 200 µA, 2mA)  
2V to + 13V Output Range (Zero Current)  
0V to 11V Output Range (Full Scale Current)  
FV Linearity to ± .025% FSR  
Central PMU Switches  
Each channel of the Edge4707B features a PMU that can  
force or measure voltage over a 15V I/O range, and  
supports 4 current ranges: 2 µA, 200 µA, 20 µA, and 2  
mA.  
Per Pin Super Voltage Switches  
Each channel of the Edge4707B features an on-board  
window comparator that provides two bits of information:  
DUT too high and DUT too low. There is also a monitor  
function which provides a real time analog signal  
proportional to either the measured voltage or current.  
Functional Block Diagram  
E_SN_IN  
E_FC_IN  
*
CHANNEL 0  
The Edge4707B is designed to be a low power, low cost,  
small footprint solution to allow high pin count testers to  
support a PMU per pin.  
45Ω  
VINP  
IVIN  
100Ω  
FORCE  
1KΩ  
1KΩ  
1KΩ  
FV / FI*  
MI / MV*  
SENSE  
DUTLTH  
DUTGTL  
IVMON  
In addition, two independent switches per channel (for a  
central PMU force and sense) plus two wide voltage analog  
muxes per channel are included.  
IVMAX  
IVMIN  
COMPARATORS  
DETECTOR LOGIC  
VOLTAGE MONITOR  
DISABLE  
CHANNEL 1  
45Ω  
VINP  
IVIN  
100Ω  
FORCE  
FV / FI*  
MI / MV*  
Applications  
SENSE  
DUTLTH  
DUTGTL  
IVMON  
IVMAX  
IVMIN  
COMPARATORS  
DETECTOR LOGIC  
VOLTAGE MONITOR  
Automated Test Equipment  
- Memory Testers  
DISABLE  
CHANNEL 2  
45Ω  
- VLSI Testers  
- Mixed Signal Tester  
VINP  
IVIN  
100Ω  
FORCE  
FV / FI*  
MI / MV*  
SENSE  
DUTLTH  
DUTGTL  
IVMON  
IVMAX  
IVMIN  
COMPARATORS  
DETECTOR LOGIC  
VOLTAGE MONITOR  
DISABLE  
CHANNEL 3  
45Ω  
VINP  
IVIN  
100Ω  
FORCE  
1KΩ  
FV / FI*  
MI / MV*  
SENSE  
DUTLTH  
DUTGTL  
IVMON  
IVMAX  
IVMIN  
COMPARATORS  
DETECTOR LOGIC  
VOLTAGE MONITOR  
DISABLE  
* Typical values  
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Revision 3 / December 18, 2002  
1
Edge4707B  
TEST AND MEASUREMENT PRODUCTS  
PIN Description  
Pin Name  
Pin #  
Description  
VINP[0:3]  
C2, F5, H3, L2  
Analog voltage input which forces the output voltage (FV/MI mode) (one per  
channel).  
IVIN[0:3]  
C1, F2, H4, J5  
Analog voltage input which forces the output current (FI/MV mode) (one per  
channel).  
FORCE[0:3]  
C14, F12, H13, L12 Analog output pin which forces current or voltage.  
C13, G10, H14, K11 Analog input pin which senses voltage.  
SENSE[0:3]  
FV/FI*[0:3]  
D10, B8, A6, E6  
B10, A8, C6, D5  
TTL compatible input which determines whether the PMU is forcing voltage or  
forcing current.  
MI/MV*[0:3]  
TTL compatible input which determines whether the PMU is measuring current  
or measuring voltage.  
RS0[0:3]  
RS1[0:3]  
B11, A9, C7, C5  
A12, C10, D8, A5  
TTL compatible current range select inputs.  
IVMIN[0:3]  
IVMAX[0:3]  
G5, E1, H2, K3  
C3, E3, H1, L1  
Analog input voltages which establish the lower and upper threshold level for  
the measurement comparator.  
DUTLTH[0:3]  
DUTGTL[0:3]  
P11, N9, N7, N5  
N11, P9, P7, P5  
Digital comparator output that indicates the DUT measurement is less than the  
upper threshold and greater than the lower threshold.  
DISABLE[0:3]  
E_SNSEL[0:3]  
E_SN_IN  
A11, C9, D7, A4  
D11, E9, B7, B5  
L4  
TTL compatible input which places the IVMON outputs in high impedance.  
TTL switch select for the external SENSE switch for Channels 03.  
Analog output for external SENSE.  
E_FC_IN  
K5  
Analog input for external FORCE signal.  
E_FCSEL[0:3]  
I_FCSEL[0:3]  
E10, B9, A7, D6  
C11, D9, B6, B4  
TTL switch select for the external FORCE switch for Channels 03.  
TTL switch select for internal FORCE switch for Channels 03.  
RA[0:3], RB[0:3]  
RC[0:3], RD[0:3]  
D13, G11, J14, K10 External resistor input corresponding to Ranges A through D.  
D14, G12, J13, L11  
E12, G14, J10, M14  
F11, G13, K12, M13  
RES_IN[0:3]  
F10, F13, J12, L13  
External resistor input. One side of the external resistors connect to RA[0:3],  
RB[0:3], RC[0:3], RD[0:3]. The other side of all resistors connect to RES_IN.  
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Revision 3 / December 18, 2002  
2
Edge4707B  
TEST AND MEASUREMENT PRODUCTS  
PIN Description (continued)  
Pin Name  
Pin #  
Description  
IVMON[0:3]  
B1, E2, G4, J4  
Analog voltage output that provides a real time monitor of either the measured  
voltage or measured current level.  
COMP1[0:3]  
COMP2[0:3]  
D4, F1, J2, K4  
E5, F3, J1, M1  
Internal compensation pins that require an external capacitor connected  
between the two pins.  
COMP3[0:3]  
D2, F4, J3, M2  
Internal compensation pin that requires an external capacitor connected  
between the pin and ground.  
Internal compensation pin that requires an external capacitor connected  
between the pin and the RES_IN pin.  
COMP4[0:3]  
D1, G2, H5, L3  
N/C  
A2, A13, A14, B2,  
B3, B12, B13, B14,  
C4, C12, H10, K7,  
M3, M11, N2, N3,  
N12, N13, N14, P1,  
P2, P12, P13, P14  
Not connected.  
Analog MUX  
Switches  
V
K9, M9, M7, M5  
L10, K8, L7, K6  
L9, M8, M6, M4  
M10, L8, L6, L5  
A10, C8, E7, A3  
P10, N8, N6, N4  
N10, P8, P6, P4  
Driver High input.  
Super voltage input High.  
Driver Low input.  
Super voltage input Low.  
Select for MUX.  
IH[0 :3 ]  
V
IHH[0 :3 ]  
V
IL[0 :3 ]  
V
ILH[0 :3 ]  
SVSEL[0:3]  
DVH[0:3]  
DVL[0:3]  
Output High.  
Output Low.  
Power Pins  
VCC[1:4]  
A1, D12, E4, E14,  
G3, H12, K2, K13  
Positive analog power supply.  
VDD  
P3  
Positive digital supply.  
VEE[1:4]  
D3, E13, G1, H11,  
K1, K14, M12, N1  
Negative analog power supply.  
GND[1:4]  
E11, F14, J11, L14  
Ground.  
Revision 3 / December 18, 2002  
3
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Edge4707B  
TEST AND MEASUREMENT PRODUCTS  
PIN Description (continued)  
A1 Ball Pad  
Indicator  
Bottom View  
12 mm X 12 mm 180 FLEXBGA  
P2  
P3  
N3  
M3  
L3  
P4  
P5  
P6  
P7  
P8  
P9  
P10  
P11  
P12  
P13  
P14  
P1  
P
N/C  
N/C  
N/C  
VDD  
N/C  
N/C  
DVL3  
N4  
DUTGTL3  
N5  
DUTGTL2  
N7  
DVL1  
N8  
DUTGTL1  
N9  
N/C  
N12  
N/C  
N13  
N/C  
N14  
DVL2  
DVH0  
N10  
DUTLTH0  
N11  
N2  
M2  
N6  
N1  
M1  
N
VEE4  
DVH3  
DUTLTH3  
M5  
DVH2  
M6  
DUTLTH2  
M7  
DVH1  
M8  
DUTLTH1  
M9  
DVL0  
M10  
DUTGTL0  
M11  
N/C  
M12  
N/C  
M13  
N/C  
M14  
M4  
M
L
COMP2_3  
L1  
COMP3_3  
L2  
VIL3  
VIH3  
L5  
VIL2  
VIH2  
L7  
VIL1  
L8  
VIH1  
L9  
VILH0  
L10  
N/C  
L11  
VEE4  
RD3  
L13  
RC3  
L14  
L4  
L6  
L12  
IVMAX3  
K1  
VINP3  
VCC4  
COMP4_3  
K3  
E_SN_IN  
K4  
VILH3  
K5  
VILH2  
VIHH2  
K7  
VILH1  
K8  
VIL0  
K9  
VIHH0  
K10  
RB3  
K11  
FORCE3  
K12  
RESIN3  
K13  
GND4  
K14  
K2  
J2  
K6  
K
VEE3  
IVMIN3  
J3  
COMP1_3  
J4  
E_FC_IN  
J5  
VIHH3  
VIHH1  
VIH0  
J9  
RA3  
J10  
SENSE3  
J11  
RD2  
J12  
VCC4  
J13  
VEE3  
J14  
J6  
J7  
J8  
J1  
J
COMP2_2 COMP1_2 COMP3_2  
H2 H3  
IVMON3  
H4  
IVIN3  
H5  
RC2  
GND3  
H11  
RESIN2  
H12  
RB2  
RA2  
H6  
H7  
H8  
H9  
H10  
G10  
H13  
H14  
H1  
A1 Ball Pad Corner Indicator  
(No Solder Ball)  
H
G
VINP2  
IVIN2  
G4  
COMP4_2  
G5  
IVMAX2  
IVMIN2  
VEE2  
G11  
VCC3  
G12  
FORCE2  
G13  
SENSE2  
G14  
G2  
G3  
G6  
G7  
G8  
G9  
G1  
VEE2  
COMP4_1  
F2  
VCC3  
SENSE1  
F10  
RA1  
F11  
RB1  
F12  
RD1  
F13  
RC1  
F14  
IVMIN0  
F5  
IVMON2  
F4  
F3  
F6  
F7  
F8  
F9  
F1  
F
E
D
C
COMP1_1  
E1  
IVIN1  
E2  
COMP2_1  
E3  
COMP3_1  
E4  
VINP1  
E5  
RESIN0  
E10  
RD0  
E11  
FORCE1  
E12  
RESIN1  
E13  
GND2  
E14  
E6  
E7  
E8  
E9  
COMP2_0  
D5  
FV/FI*3  
D6  
SVSEL2  
E_SNSEL1 E_FCSEL0  
GND1  
D11  
RC0  
D12  
VEE1  
D13  
VCC2  
D14  
IVMIN1  
D1  
IVMON1  
D2  
IVMAX1  
D3  
VCC2  
D4  
D7  
D8  
D9  
D10  
COMP3_0  
C2  
COMP4_0  
C1  
VEE1  
C3  
COMP1_0  
C4  
MI/MV*3 E_FCSEL3  
C5 C6  
DISABLE2  
C7  
RS1_2  
I_FCSEL1  
C9  
FV/FI*0  
E_SNSEL0  
C11  
VCC1  
C12  
RA0  
C13  
RB0  
C14  
C8  
C10  
N/C  
B4  
N/C  
B12  
VINP0  
B2  
RS0_3  
B5  
MI/MV*2  
RS0_2  
B7  
SVSEL1  
B8  
DISABLE1  
B9  
RS1_1  
B10  
I_FCSEL0  
B11  
SENSE0  
B13  
FORCE0  
B14  
IVIN0  
B1  
IVMAX0  
B3  
B6  
B
A
IVMON0  
A1  
I_FCSEL3 E_SNSEL3  
I_FCSEL2  
A6  
E_SNSEL2  
A7  
FV/FI*1  
A8  
E_FCSEL1  
A9  
MI/MV*0  
A10  
RS0_0  
A11  
N/C  
A2  
N/C  
A3  
N/C  
A12  
N/C  
A13  
N/C  
A14  
A4  
A5  
VCC1  
SVSEL3  
DISABLE3  
RS1_3  
FV/FI*2  
E_FCSEL2  
MI/MV*1  
RS0_1  
SVSEL0  
DISABLE0  
RS1_0  
N/C  
N/C  
N/C  
1
2
3
4
5
6
7
8
9
10  
11  
12  
13  
14  
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Revision 3 / December 18, 2002  
4
Edge4707B  
TEST AND MEASUREMENT PRODUCTS  
PIN Description (continued)  
A1 Ball Pad  
Indicator  
SEMTECH  
Top View  
12 mm X 12 mm 180 FLEXBGA  
A2  
B2  
C2  
A3  
A4  
A5  
B5  
A6  
A7  
A8  
A9  
A10  
A11  
A12  
A13  
A14  
A1  
B1  
A
B
VCC1  
N/C  
N/C  
SVSEL3  
DISABLE3  
B4  
RS1_3  
FV/FI*2  
E_FCSEL2  
B7  
MI/MV*1  
B8  
RS0_1  
SVSEL0  
B10  
DISABLE0  
B11  
RS1_0  
B12  
N/C  
B13  
N/C  
B14  
B3  
B6  
B9  
N/C  
IVMON0  
C1  
I_FCSEL3 E_SNSEL3  
I_FCSEL2  
C6  
E_SNSEL2  
C7  
FV/FI*1  
E_FCSEL1  
C9  
MI/MV*0  
C10  
RS0_0  
C11  
N/C  
C12  
N/C  
N/C  
C14  
C3  
C4  
D4  
C5  
C8  
C13  
C
D
E
VINP0  
D2  
N/C  
RS0_3  
D5  
MI/MV*2  
D6  
RS0_2  
D7  
SVSEL1  
D8  
DISABLE1  
D9  
RS1_1  
D10  
I_FCSEL0  
D11  
N/C  
D12  
SENSE0  
D13  
FORCE0  
D14  
IVIN0  
D1  
IVMAX0  
D3  
COMP3_0  
E2  
COMP4_0  
E1  
VEE1  
COMP1_0  
E4  
MI/MV*3 E_FCSEL3  
E5 E6  
DISABLE2  
E7  
RS1_2  
E8  
I_FCSEL1  
E9  
FV/FI*0  
E10  
E_SNSEL0  
E11  
VCC1  
E12  
RA0  
E13  
RB0  
E14  
E3  
COMP2_0  
F5  
FV/FI*3  
SVSEL2  
F7  
E_SNSEL1 E_FCSEL0  
GND1  
F11  
RC0  
F12  
VEE1  
F13  
VCC2  
F14  
IVMIN1  
F1  
IVMON1  
F2  
IVMAX1  
F3  
VCC2  
F4  
F6  
F8  
F9  
F10  
F
G
H
COMP1_1  
G1  
IVIN1  
COMP2_1  
G3  
COMP3_1  
G4  
VINP1  
G5  
RESIN0  
G10  
RD0  
G11  
FORCE1  
G12  
RESIN1  
G13  
GND2  
G14  
G2  
G6  
H6  
G7  
H7  
G8  
H8  
G9  
H9  
VEE2  
H1  
COMP4_1  
H2  
VCC3  
H3  
SENSE1  
H10  
RA1  
H11  
RB1  
H12  
RD1  
H13  
RC1  
H14  
IVMIN0  
H5  
IVMON2  
H4  
A1 Ball Pad Corner Indicator  
(No Solder Ball)  
VINP2  
J3  
IVIN2  
J4  
COMP4_2  
J5  
IVMAX2  
J1  
IVMIN2  
J2  
N/C  
J10  
VEE2  
J11  
VCC3  
J12  
FORCE2  
J13  
SENSE2  
J14  
J6  
K6  
L6  
J7  
J8  
J9  
K9  
L9  
J
COMP2_2 COMP1_2 COMP3_2  
K2 K3  
IVMON3  
K4  
IVIN3  
K5  
RC2  
K10  
GND3  
K11  
RESIN2  
K12  
RB2  
K13  
RA2  
K14  
K7  
K8  
K1  
K
L
N/C  
VEE3  
VCC4  
IVMIN3  
L3  
COMP1_3  
L4  
E_FC_IN  
L5  
VIHH3  
VIHH1  
L8  
VIH0  
RA3  
L10  
SENSE3  
L11  
RD2  
L12  
VCC4  
L13  
VEE3  
L14  
L2  
L7  
L1  
IVMAX3  
M1  
VINP3  
M2  
COMP4_3  
M3  
E_SN_IN  
M4  
VILH3  
M5  
VILH2  
M6  
VIHH2  
M7  
VILH1  
M8  
VIL0  
M9  
VIHH0  
M10  
RB3  
FORCE3  
M12  
RESIN3  
M13  
GND4  
M14  
M11  
M
VIL3  
N4  
N/C  
N3  
N/C  
N11  
COMP2_3  
N1  
COMP3_3  
N2  
VIH3  
N5  
VIL2  
N6  
VIH2  
VIL1  
N8  
VIH1  
N9  
VILH0  
N10  
VEE4  
N12  
RD3  
N13  
RC3  
N14  
N7  
N
P
N/C  
N/C  
P3  
VEE4  
DVH3  
P4  
DUTLTH3  
P5  
DVH2  
DUTLTH2  
P7  
DVH1  
P8  
DUTLTH1  
P9  
DVL0  
P10  
DUTGTL0  
P11  
N/C  
P12  
N/C  
P13  
N/C  
P14  
P2  
P6  
P1  
VDD  
DVL3  
DUTGTL3  
DUTGTL2  
DVL1  
DUTGTL1  
N/C  
N/C  
DVH0  
DUTLTH0  
DVL2  
N/C  
N/C  
N/C  
1
2
3
4
5
6
7
8
9
10  
11  
12  
13  
14  
Revision 3 / December 18, 2002  
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Edge4707B  
TEST AND MEASUREMENT PRODUCTS  
Circuit Description  
Circuit Overview  
Control Inputs  
The Edge4707B is a quad channel parametric test and  
measurement unit that can :  
FV/FI* is a TTL compatible input which determines whether  
the PMU forces voltage or current, and MI/MV* is a TTL  
compatible input which determines whether the PMU  
measures current or voltage. FV/FI* and MI/MV* are  
independent for each PMU. Table 1 describes the modes  
of operation controlled by these pins.  
Force Voltage / Measure Current  
Force Current / Measure Voltage  
Force Voltage / Measure Voltage  
Force Current / Measure Current  
Each PMU channel can force or measure voltage over a  
15V range and force or measure current over four distinct  
FV / FI*  
MI/MV*  
Mode of Operation  
ranges:  
0
0
1
1
0
1
0
1
Force Current, Measure Voltage  
Force Current, Measure Current  
Force Voltage, Measure Voltage  
Force Voltage, Measure Current  
± 2 µA  
± 20 µA  
± 200 µA  
± 2 mA.  
An on-board window comparator provides two bit output  
range classification. Also, a monitor passes a real time  
analog voltage which tracks either the measured current  
or voltage.  
Table 1.  
RS0 and RS1 are TTL compatible inputs to an internal  
a na log mux which se le cts a n e xte rna l re sistor  
corresponding to a desired current range. The truth table  
for RS0 to RS1, along with the associated external resistor  
values and current ranges, is shown in Table 2. RS0 and  
RS1 are independent for each channel of the 4707B.  
PPMU Functionality  
The trapezoid in Figure 1 describes the current-voltage  
functionality of the PMU with VCC = 1 5 .5 V and  
VEE = 4.5V, in Range D.  
V
Current  
Range  
V
= +15.5V  
V
(@ I = 0) = 13.25V  
RS1  
RS0  
Range  
"Nominal" Ext. R  
CC  
OUT  
V
(@ 200 µA) = 12.8V (in Range D)  
OUT  
0
0
1
1
0
1
0
1
A
B
C
D
± 2 µA  
RA = 1M  
RB = 100KΩ  
RC = 10KΩ  
RD = 1KΩ  
V
(@ 2 mA) = 11.25V  
OUT  
± 20 µA  
± 200 µA  
± 2 mA  
No restrictions  
Table 2.  
I
(–2 mA)  
I
(2 mA)  
MAX  
MIN  
FORCE/SENSE  
FORCE is an analog output which either forces a current  
or forces a voltage, depending on which operating mode  
is selected.  
V
(@ 2 mA) = –0.25V  
OUT  
V
(@ –200 µA) = –1.8V (in Range D)  
OUT  
V
= –4.5V  
V
(@ I = 0) = –2.25V  
EE  
OUT  
SENSE is a high impedance analog input which measures  
the DUT voltage input in the MV operating mode.  
NOTE: Negative current implies current is flowing into the 4707 from DUT.  
FORCE and SENSE are brought out to separate pins to  
allow remote sensing.  
Figure 1. PMU Functionality  
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Revision 3 / December 18, 2002  
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Edge4707B  
TEST AND MEASUREMENT PRODUCTS  
Circuit Description (continued)  
IVMON  
Force Current Mode  
In the FI mode (FV/FI* = 0), IVIN is a high impedance  
analog voltage input that is converted into a current at  
the FORCE pin using the following relationship:  
IVMON is a real time analog voltage output which tracks  
the sensed parameter.  
In the MV mode, the output voltage displayed at IVMON is  
a 1:1 mapping of the SENSE voltage. In the MI mode,  
IVMON follows the equation:  
Forced Current = IVIN / REXT  
(Positive current is defined as current flowing out of the  
FORCE pin.) The IVIN input voltage range and forced cur-  
rent (at FORCE) can be seen in Table 4.  
IVMON = I(measured) * REXT  
Using nominal values for the external resistors (RA, RB,  
RC, and RD), a voltage at IVMON of + 2V corresponds to  
Imax and 2V corresponds to Imin of the selected current  
range.  
Corresponding  
Forced Current  
IVIN  
+ 2V  
0V  
Imax (full scale)  
0
2V  
Imin (full scale)  
The IVMON pin can also be placed into a high impedance  
state by using the DISABLE input (see Table 3).  
Table 4.  
Disable  
MI / MV*  
Sensed Parameter  
High Impedance  
Measure Voltage Mode  
1
0
0
X
0
Measured Voltage  
Measured Current  
In the MV mode (MI/MV* = 0), DUT voltage is measured  
via the SENSE input pin. Note that EXT_SENSE_SEL = 0  
when the Edge4707B SENSE is used. This measured  
voltage is also tested with the on-board window compara-  
tor.  
1
Table 3.  
Comparator  
Force Voltage Mode  
The Edge4707B features an on-board window compara-  
tor which provides two-bit measurement range classifica-  
tion. IVMAX and IVMIN are high impedance analog inputs  
that establish the upper and lower thresholds for the win-  
dow comparator.  
In the FV mode (FV/FI* = 1), VINP is a high impedance  
analog voltage input that maps directly to the voltage forced  
at the FORCE pin.  
Measure Current Mode  
In the MI mode, an I/V MAX input of + 2V will set the  
upper threshold of the window comparator to a voltage  
corresponding to + FSC (full-scale current), and an I/V MIN  
input of 2V will set the lower threshold to a voltage  
corresponding to FSC (positive current is defined as  
current flowing out of the PMU).  
In the MI mode (MI/MV* = 1), a current monitor is  
connected in series with the PMU forcing amplifier. This  
monitor generates a voltage that is proportional to the  
current passing through it, and is brought out to IVMON.  
This voltage (corresponding to the measured current) is  
also tested by the on-board window comparator.  
DUTGTL the DUTLTH are LVTTL compatible outputs which  
indicate the range of the measured parameter in relation  
to IVMIN and IVMAX. Comparator functionality is sum-  
marized in Table 5 for MI Mode and Table 6 for MV mode.  
Revision 3 / December 18, 2002  
7
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Edge4707B  
TEST AND MEASUREMENT PRODUCTS  
Circuit Description (continued)  
TEST CONDITION  
DUT LTH  
DUT GTL  
IVMON > IVMAX  
IVMON < IVMAX  
0
1
N/A  
IVMON > IVMIN  
IVMON < IVMIN  
1
0
N/A  
1
IVMON < IVMAX  
and  
IVMON > IVMIN  
1
Table 5. MI Comparator Truth Table  
TEST CONDITION  
DUT LTH  
DUT GTL  
SENSE > IVMAX  
SENSE < IVMAX  
0
1
N/A  
SENSE > IVMIN  
SENSE < IVMIN  
1
0
N/A  
1
SENSE < IVMAX  
and  
SENSE > IVMIN  
1
Table 6. MV Comparator Truth Table  
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Revision 3 / December 18, 2002  
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Edge4707B  
TEST AND MEASUREMENT PRODUCTS  
Circuit Description (continued)  
Figure 2. Edge4707B Functional Schematic  
Revision 3 / December 18, 2002  
9
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Edge4707B  
TEST AND MEASUREMENT PRODUCTS  
Circuit Description (continued)  
REXT Selection  
I_FCSEL  
E_FCSEL  
FORCE  
HiZ  
0
1
1
0
0
1
0
1
The Edge 4707B is designed for the voltage drop across  
RA, RB, RC, and RD to be 2V with the maximum current  
passing through them. However, these resistor values  
can be changed to support different applications.  
Illegal Condition  
VINP  
E_FC_IN  
Increasing the maximum current beyond the nominal range  
is not recommended. However, decreasing the maximum  
current is allowed by increasing the external resistor using  
the equation IMAX = 2V / REXT.  
Table 8.  
For external sense operation, the switch controlled by  
E_SNSEL can be used to internally connect the SENSE  
input pin to the E_SN_IN output pin (see Figure 2). This  
allows the user to use the E_SN_IN pin for remote sensing.  
Switch Operation on Force and Sense Lines  
Each channel of the Edge4707B features two switches  
connected to the FORCE output pin (External Force = 45,  
Internal Force = 100) and one 1Kswitch connected  
to the SENSE input pin. These switches are controlled by  
the TTL compatible inputs I_FCSEL, E_FCSEL, and  
E_SNSEL. Switch operation is described in Table 7.  
Analog MUX  
The Edge4707B has a separate analog mux section which  
is intended for 12V flash programming signal muxing with  
lower, more standard voltages. There are five inputs for  
this section, all of which are brought out to external pins  
(see Figure 3). The two outputs, DVH and DVL, connect  
to driver reference voltages of the Edge720 (or other pin  
electronics drivers).  
Switch Select  
Name  
Open/Close  
State on Switch  
Switch  
1 KSwitches  
100, to internal  
I_FCSEL  
E_FCSEL  
E_SNSEL  
0 = Open  
1 = Closed  
VIH  
force circuitry  
DVH  
VIHH  
45, to external  
force circuitry  
0 = Open  
1 = Closed  
VIL  
1K, to external  
0 = Open  
DVL  
sense circuitry  
1 = Closed  
VILH  
Table 7.  
SV_SEL  
These switches can be configured to route the Edge4707B  
for external forcing or sensing operations (see Figure 2).  
For external forcing operation, the switch controlled by  
I_FCSEL can be used to internally isolate the PMU from  
the FORCE output. This enables the user to connect  
the FORCE pin to an external device connected to the  
E_FC_IN pin using the switch controlled by the E_FC_SEL  
input. I_FCSEL and E_FCSEL functionality is described in  
Table 8.  
Figure 3. Analog MUX Section  
(Typically used to provide flash programming and standard  
voltages to driver pin electronic references.)  
The truth table for SV-SEL is shown in Table 9.  
SV_SEL  
DVH = VIH  
DVL = VIL  
0
DVH = VIHH  
1
DVL = VILH  
(supervoltage)  
Table 9. SV-SEL Truth Table  
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Revision 3 / December 18, 2002  
10  
Edge4707B  
TEST AND MEASUREMENT PRODUCTS  
Circuit Description (continued)  
Short Circuit Protection  
The Edge 4707B is designed to survive a direct short circuit  
to any legal voltage at the FORCE and SENSE pins, by  
virtue of a limited current, which results from the presence  
of an external current sense resistor (normally 1 Kto  
1M) in the FORCE path.  
Transient Clamps  
The Edge 4707B has on-board clamps to limit the voltage  
and current spikes that might result from either changing  
the current range or changing the operating mode.  
Power Supply Sequencing  
In order to avoid the possibility of latch-up, the following  
power-up requirements must be satisified:  
1. VEE GND VDD VCC at all times  
2. VEE All inputs VCC  
The following power supply sequencing can be used as a  
guideline when operating the Edge4707:  
Power Up Sequence  
1. VCC (substrate)  
2. VEE/VDD  
3. Digital Inputs  
4. Analog Inputs  
Power Down Sequence  
1. Analog Inputs  
2. Digital Inputs  
3. VEE/VDD  
4. VCC (substrate)  
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11  
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Edge4707B  
TEST AND MEASUREMENT PRODUCTS  
Application Information  
Required External Components (Per Channel)  
22 pF  
COMP1  
COMP2  
1 M  
RA  
RB  
100 KΩ  
10 KΩ  
1 KΩ  
DUT LTH  
RC  
To LVTTL Gate  
To LVTTL Gate  
RD  
Edge4707B  
RES_IN  
DUT GTL  
COMP3  
47 pF  
COMP4  
FORCE  
To DUT  
100 pF  
SENSE  
VCC  
VDD  
VDD  
VEE  
.01 µF  
.1 µF  
.01 µF  
.1 µF  
.01 µF  
VCC  
VEE  
Actual decoupling and compensation  
capacitor values depend on the system environment.  
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Revision 3 / December 18, 2002  
12  
Edge4707B  
TEST AND MEASUREMENT PRODUCTS  
Application Information (continued)  
Calibration  
Maximum Input Voltage Range for FV Mode  
In order to attain a high degree of accuracy in a typical  
ATE application, offset and gain errors are accounted for  
through software calibration. When operating the  
Edge4707B in the Measure Current (MI) or Force Current  
(FI) modes, an additional source of error, common mode  
error, should be accounted for. Common mode error is a  
In order to ensure that the full-scale output voltage range  
(FSV) can be achieved by the 4707B, errors such as gain,  
linearity, and offset must be taken into account when  
determining the input voltage range required at VINP. The  
equations in Table 10 can be used to determine the input  
voltage range required at VINP to achieve full scale voltage  
(FSV) at the FORCE pin.  
measure of how the common mode voltage, V , at the  
CM  
input of the current sense amplifier affects the forced or  
measured current values (see Figure 4). Since this error  
is created by internal resistors in the current sense  
amplifier, it is very linear in nature.  
VINP (Worst Case)  
FORCE  
FSV  
Gain  
+ V + LInearity Error  
OS  
+ FSV  
Using the common mode error and common mode linearity  
specifications, one can see that with a small number of  
calibration steps (see Applications note PMU-A1), the  
effect of this error can be significantly reduced.  
FSV  
Gain  
+ V + LInearity Error  
OS  
FSV  
Table 10.  
Example: If it is desired to operate the 4707B with a FV  
range of 2V to 13V, the VINP input voltages in Table 11  
may be required.  
MI Common Mode Error  
V
OS  
@ IVMON  
CM Linearity  
19.5 mV  
VINP  
FORCE  
+ 13V  
2V  
13.3V  
2.13V  
CM Error = Slope  
Table 11.  
2 mV  
V
CM  
@ FORCE  
VEE + 4.25  
VCC 4.25  
2 mV  
3 mV  
NOTE: In some cases, slope may be negative.  
Figure 4. Graphical Representation  
of Common Mode Error  
Revision 3 / December 18, 2002  
13  
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Edge4707B  
TEST AND MEASUREMENT PRODUCTS  
Application Information (continued)  
Maximum Input Voltage Range for FI Mode  
In order to ensure that the full-scale output current range  
(FSC) can be achieved by the 4707B, errors such as  
gain, linearity, common mode, and offset must be taken  
into account when determining the input voltage range  
required at IVIN. The equations in Table 12 can be used  
to determine the input voltage range required at IVIN to  
achieve full scale current (FSC) at the FORCE pin.  
Corresponding  
IVIN (Worst Case)  
Forced Current  
2V  
Gain  
+ V + Common Mode Error + Linearity Error  
OS  
+ FSC  
2V  
Gain  
+ V + Common Mode Error + Linearity Error  
OS  
FSC  
Table 12.  
Example: To guarantee that the 4707B is capable of  
forcing ± 2 mA with REXT = 1K(Range D), the input  
voltages in Table 13 may be required.  
Corresponding  
IVIN  
Forced Current  
2.15V  
2 mA  
2.15V  
2 mA  
Table 13.  
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Revision 3 / December 18, 2002  
14  
Edge4707B  
TEST AND MEASUREMENT PRODUCTS  
Package Information  
0.10  
A–  
D
B–  
PIN Descriptions  
Top View  
E
E2  
D2  
Detail B  
14  
13  
12  
11  
10  
9
8
7
6
5
4
3
2
1
A
B
C
D
E
F
G
H
Bottom View  
E1  
J
K
L
M
N
P
D1  
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Edge4707B  
TEST AND MEASUREMENT PRODUCTS  
Package Information (continued)  
Detail A  
Side View  
A
/ / ccc C  
/ / bbb C  
NX φb  
C
φ0.20 S C A S B S  
f
C–  
6
φ
0.75 S C  
f
A2  
A1  
aaa C  
e
4
5
Detail A  
Detail B  
Dimensional References  
REF.  
A
MIN.  
1.30  
0.30  
0.65  
11.80  
NOM.  
1.45  
MAX.  
1.55  
NOTES:  
1. All dimensions are in millimeters.  
2. erepresents the basic solder ball grid pitch.  
A1  
A2  
D
0.40  
0.45  
0.70  
0.75  
12.00  
12.20  
3. Mrepresents the basic solder ball matrix size, and symbol Nis  
the maximum allowable number of balls after depopulating.  
4. bis measurable at the maximum solder ball diameter parallel  
to primary datum C.  
D1  
D2  
E
10.40 BSC.  
12.00  
11.80  
11.80  
12.20  
12.20  
12.00  
E1  
E2  
b
10.40 BSC.  
12.00  
5. Dimension cccis measured parallel to primary datum C.  
6. Primary datum Cand seating plane are defined by the spherical  
crowns of the solder balls.  
11.80  
0.50  
12.20  
0.60  
0.55  
c
0.35  
aaa  
bbb  
ccc  
e
0.15  
0.20  
0.25  
0.875  
0.90  
7. Package surface shall be matte finish charmilles 24 to 27.  
8. Package warp shall be 0.050 mm maximum.  
9. Substrate material base is BT resin.  
0.725  
0.70  
0.80  
0.80  
14  
10. The overall package thickness Aalready considers collapse balls.  
f
M
N
180  
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Revision 3 / December 18, 2002  
16  
Edge4707B  
TEST AND MEASUREMENT PRODUCTS  
Recommended Operating Conditions  
Parameter  
Symbol  
Min  
Typ  
Max  
Units  
Positive Analog Power Supply (relative to GND)  
Negative Analog Power Supply (relative to GND)  
Total Analog Power Supply  
VCC  
VEE  
15.25  
4.75  
19.5  
3.15  
25  
15.5  
4.5  
20  
15.75  
4.25  
20.5  
3.45  
65  
V
V
VCC VEE  
VDD  
V
Digital Power Supply (relative to GND)  
Case Temperature  
3.3  
V
TC  
˚ C  
˚ C/W  
θ
Thermal Resistance of Package (Junction to Case)  
JC  
4.1  
Absolute Maximum Ratings  
Parameter  
Symbol  
VCC  
Min  
Typ  
Max  
Units  
V
Positive Power Supply  
Negative Power Supply  
Total Power Supply  
Digital Power Supply  
Digital Inputs  
20  
VEE  
10  
0
V
VCC VEE  
VDD  
21  
V
GND .5  
.5  
VCC  
7.0  
V
V
Analog Inputs  
VEE .5  
VCC + .5  
V
V
VI[H, L, HH, LH] –  
VCC VEE  
Analog MUX Breakdown Voltage  
Current Capability of MUX  
DV[L, H]  
I
4.8  
4.8  
mA  
V
MUX  
External Force and Sense Switch Breakdown Voltage E_FC_IN FORCE  
E_SN_IN FORCE  
VCC VEE  
Storage Temperature  
Junction Temperature  
Soldering Temperature  
55  
65  
+ 125  
+ 125  
260  
˚ C  
˚ C  
˚ C  
Stresses above listed under Absolute Maximum Ratingsmay cause permanent damage to the device. This is a  
stress rating only and functional operation of the device at these or any other conditions above those listed in the  
operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for  
extended periods may affect device reliability.  
Revision 3 / December 18, 2002  
17  
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Edge4707B  
TEST AND MEASUREMENT PRODUCTS  
DC Characteristics  
Power Supplies  
Parameter  
Symbol  
Min  
Typ  
Max  
Units  
Power Supply Consumption (Note 1)  
Positive Supply  
Negative Supply  
ICC  
IEE  
IDD  
30  
30  
1
mA  
mA  
mA  
Digital Supply (Quiescent)  
Power Supply Rejection Ratio (Notes 2, 3)  
FV/MI Mode  
FORCE Pin  
@ 100 kHz  
@ 500 kHz  
@ 1 MHz  
FV/MI PSRR  
20  
14  
11  
dB  
dB  
dB  
IVMON Pin  
@ 100 kHz  
@ 500 kHz  
@ 1 MHz  
14  
3
1
dB  
dB  
dB  
FI/MV Mode  
FORCE Pin  
@ 100 kHz  
@ 500 kHz  
@ 1 MHz  
FV/MI PSRR  
20  
13  
13  
dB  
dB  
dB  
IVMON Pin  
@ 100 kHz  
@ 500 kHz  
@ 1 MHz  
18  
10  
7
dB  
dB  
dB  
Force Voltage  
Parameter  
Symbol  
Min  
Typ  
Max  
Units  
Input Voltage Range @ VINP  
Input Bias Current  
V
VEE + 2  
VCC 1.75  
V
VINP  
I
1  
0
1
µA  
V
VINP  
Output Forcing Voltage (positive full scale current  
through REXT)  
V
FORCE  
VEE + 2.25  
VCC 4.25  
Output Forcing Voltage (zero current through REXT)  
Output Forcing Voltage (negative full scale current  
through REXT)  
V
VEE + 2.25  
VEE + 4.25  
VCC 2.25  
VCC 2.25  
V
V
FORCE  
V
FORCE  
Voltage Accuracy  
Offset  
Vos  
FV Gain  
FV INL  
100  
.985  
0.025  
100  
1.015  
+ 0.025  
mV  
V/V  
%FSR  
Gain  
Linearity  
± .01  
Temperature Dependence (Note 6)  
Temperature Coefficient of Offset  
Temperature Coefficient of Gain  
Temperature Coefficient of Linearity  
Vos/T  
FVGain/T  
FV INL/T  
8  
.2  
2x10  
µV/˚ C  
µV/V˚ C  
%FSR/˚ C  
7  
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Revision 3 / December 18, 2002  
18  
Edge4707B  
TEST AND MEASUREMENT PRODUCTS  
DC Characteristics (continued)  
Measure Current  
Parameter  
Symbol  
Min  
Typ  
Max  
Units  
Current Measurement Range  
Range A  
Range B  
I
MEASURE  
2  
20  
200  
2  
2
20  
200  
2
µA  
µA  
µA  
mA  
Range C  
Range D  
Current Measurement Accuracy  
Measure Current Offset  
Gain  
V
150  
.985  
+ 150  
1.015  
mV  
OS  
MI Gain  
MI INL  
Linearity (measured at IVMON)  
FORCE = VEE + 4.25 to VCC 5.25V  
FORCE = VCC 5.25 to VCC 4.25V  
.05  
.08  
± .01  
.05  
.08  
% FSR  
% FSR  
Common Mode Error  
CM Error  
1.5  
1.5  
mV/V  
Common Mode Linearity  
FORCE = VEE + 4.25V to VCC 4.25V  
CM Error  
.05  
.05  
%FSR  
Temperature Dependence (Note 6)  
Temperature Coefficient of Offset  
Temperature Coefficient of Gain  
Temperature Coefficient of Linearity  
Vos/T  
MI Gain/T  
MI INL/T  
60  
2
5x10  
µV/˚ C  
µV/V˚ C  
%FSR/˚ C  
7  
Force Current  
Parameter  
Symbol  
Min  
2.25  
1  
Typ  
Max  
2.25  
1
Units  
V
Input Voltage Range @ IVIN  
Input Bias Current  
V
IVIN  
I
0
µA  
IVIN  
Output Forcing Current  
Range A  
Range B  
I
FORCE  
2  
20  
200  
2  
2
20  
200  
2
µA  
µA  
µA  
mA  
Range C  
Range D  
Compliance Voltage Range  
V
FORCE  
Positive Full-Scale Current through REXT  
Zero Current through REXT  
Negative Full-Scale Current through REXT  
VEE + 2.25  
VEE + 2.25  
VEE + 4.25  
VCC 4.25  
VCC 2.25  
VCC 2.25  
V
V
V
Current Accuracy  
Offset  
Gain  
Ios  
FI Gain  
FI INL  
5  
.985  
5
1.015  
% FSR  
Linearity (measured at IVMON)  
FORCE = VEE + 4.25 to VCC 5.25V  
FORCE = VCC 5.25 to VCC 4.25V  
.05  
.08  
± .01  
.05  
.08  
% FSR  
% FSR  
Common Mode Error (Note 4)  
CM Error  
3  
3
mV/V  
Common Mode Linearity  
FORCE = VEE + 4.25V to VCC 4.25V  
CM Error  
.05  
.05  
%FSR  
Temperature Dependence (Note 6)  
Temperature Coefficient of Offset  
Temperature Coefficient of Gain  
Temperature Coefficient of Linearity  
3  
Vos/T  
FI Gain/T  
FI INL/T  
7x10  
2
1x10  
µV/˚ C  
µV/V˚ C  
%FSR/V  
8  
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Edge4707B  
TEST AND MEASUREMENT PRODUCTS  
DC Characteristics (continued)  
Measure Voltage  
Parameter  
Symbol  
Min  
Typ  
Max  
Units  
Voltage Measurement Range  
V
SENSE  
VEE + 2.25  
VCC 2.25  
V
Voltage Measurement Accuracy  
Measure Voltage Offset  
Gain  
Vos  
MV Gain  
MV INL  
100  
.985  
.025  
100  
1.015  
.025  
mV  
Linearity  
± .01  
%FSR  
Temperature Dependence (Note 6)  
Temperature Coefficient of Offset  
Temperature Coefficient of Gain  
Temperature Coefficient of Linearity  
Vos/T  
MV Gain/T  
MV INL/T  
21  
0.35  
9x10  
µV/˚ C  
µV/V˚ C  
%FSR/˚ C  
8  
Digital Inputs (FV/FI*, MI/MV*, RS0, RS1, DISABLE, I_FCSEL, E_FCSEL, E_SNSEL, SV_SEL)  
Parameter  
Symbol  
VIL  
Min  
Typ  
Max  
Units  
V
Input Low Level  
0.8  
Input High Level  
VIH  
2.0  
V
Input Bias Current @ 0V to VDD  
IIN  
1  
0
1
µA  
External Force & Sense Switches  
Parameter  
Symbol  
Min  
Typ  
Max  
Units  
External Force Switches  
V
mA  
Usable Input Voltage Range @ E_FC_IN  
Usable Input Current Range @ E_FC_IN  
On-resistance  
VE_FC_IN  
IE_FC_IN  
RON_E_FC_IN  
VEE  
25  
VCC  
25  
55  
45  
Leakage Current @ E_FC_IN  
Switch Open (E_FC_SEL = 0)  
Switch Closed (E_FC_SEL = 1)  
Input Capacitance  
nA  
nA  
pF  
Ileak  
Ileak  
CE_FC_IN  
10  
10  
10  
10  
28  
External Sense Switches  
Usable Input Voltage Range @ E_SN_IN  
On-resistance  
VE_SN_IN  
RON-E_SN_IN  
VEE  
VCC  
1200  
V
1000  
Leakage Current  
Switch Open (E_SN_SEL = 0)  
Switch Closed (E_SN_SEL = 1)  
Ileak  
Ileak  
10  
10  
10  
10  
nA  
nA  
HiZ (Switches Open) Leakage Current (Note 5)  
VFORCE = 3V to 13V, FV/FI* = 0  
Ileak  
10  
10  
14  
nA  
pF  
Combined Capacitance of FORCE and SENSE Pins  
(Notes 2, 5)  
C_FRC_SNS  
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Revision 3 / December 18, 2002  
20  
Edge4707B  
TEST AND MEASUREMENT PRODUCTS  
DC Characteristics (continued)  
Analog MUX  
Parameter  
Symbol  
Min  
Typ  
Max  
VCC  
1000  
400  
Units  
Usable Input Voltage Range  
On-resistance (Force) @ 500 µA  
On-resistance Variability (Across full VEE to VCC Range)  
Leakage Current  
Vin  
VEE  
V
R
600  
ON_MUX  
R  
ON_MUX  
I
200  
nA  
LEAK_MUX  
IVMON  
Parameter  
Symbol  
Min  
Typ  
Max  
Units  
Leakage in DISABLED Mode  
I
100  
+ 100  
nA  
LEAK_IVMON  
@ IVMON = 2.2V to + 13V  
IVMON Output Impedance  
R
OUT  
500  
Comparator  
Parameter  
Symbol  
Min  
Typ  
Max  
Units  
V
IVMAX Voltage Range  
IVMAX  
IVMIN  
Vos  
VEE + 1.75  
VEE + 1.75  
100  
VCC 1.75  
VCC 1.75  
+ 100  
IVMIN Voltage Range  
V
Comparator Offset (IVMIN, IVMAX)  
Input Bias Current at IVMIN, IVMAX  
mV  
µA  
Ibias  
1  
+ 1  
Digital Outputs (DUTLTH, DUTGTL)  
Parameter  
Symbol  
Min  
Typ  
Max  
Units  
Output Low Level  
VOL  
VOH  
400  
mV  
V
@ I = 200 µA  
OL  
Output High Level  
2.4  
VDD  
@ I = 200 µA  
OH  
Above DC Characteristic specifications are guaranteed over full Recommended Operating Condition ranges unless otherwise  
noted.  
Note 1: Under no load conditions.  
Note 2: Guaranteed by design and characterization. Not production tested.  
Note 3: PSRR is tested from VCC/VEE supplies to FORCE and IVMON outputs. Characterized in FV/MI and FI/MV modes.  
Note 4: The mV/V units shown are derived as follows: (offset current * range resistance) / output force voltage.  
Note 5: Test Conditions: E_FC_SEL = I_FC_SEL = 0; FV/FI* = 0, FORCE and SENSE tied together over full-scale  
voltage range.  
Note 6: Temperature coefficients are valid over a 25˚ C to 65˚ C case temperature range unless otherwise noted.  
Revision 3 / December 18, 2002  
21  
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Edge4707B  
TEST AND MEASUREMENT PRODUCTS  
AC Characteristics  
Force Voltage/Measure Current  
Parameter  
Symbol  
Min  
Typ  
Max  
Units  
FORCE Output Voltage Settling Time (Notes 1, 2)  
To 0.1% of final value (C  
Range A  
= 100 pF)  
t
t
t
FORCE/SENSE  
settle  
settle  
settle  
530  
110  
µs  
µs  
Ranges B, C, D  
45  
Measured Current Settling Time (Notes 1, 4)  
To 0.1% of final value (C  
Range A  
Ranges B, C, D  
= 100 pF)  
FORCE/SENSE  
1.4  
110  
ms  
µs  
50  
28  
To 2% of final value (C  
Ranges B, C, D  
= 150 pF)  
FORCE/SENSE  
110  
µs  
I/V Monitor (Note 3)  
DISABLE True to HiZ Propagation Delay  
DISABLE False to Active Propagation Delay  
t
oe  
60  
60  
ns  
ns  
z
t
Force Amp Saturation Recovery Time  
t
11  
40  
4
µs  
sat  
Capacitive Loading Range for Stable Operation (FORCE)  
C
LOAD  
nF  
Force Current/Measure Voltage  
Parameter  
Symbol  
Min  
Typ  
Max  
Units  
FORCE Output Current Settling Time (Notes 1, 5)  
(To 0.1% of final value)  
Range A  
t
settle  
2
250  
ms  
µs  
Ranges B, C, D  
SENSE (Measure) Voltage Settling Time (Notes 1, 6)  
t
settle  
(To 0.1% of final value)  
Range A  
1.75  
225  
ms  
µs  
Ranges B, C, D  
I/V Monitor (Note 3)  
DISABLE True to HiZ Propagation Delay  
DISABLE False to Active Propagation Delay  
t
60  
60  
ns  
ns  
z
t
oe  
Force Amp Saturation Recovery Time  
t
11  
40  
4
µs  
sat  
Capacitive Loading Range for Stable Operation (FORCE)  
C
LOAD  
nF  
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Revision 3 / December 18, 2002  
22  
Edge4707B  
TEST AND MEASUREMENT PRODUCTS  
AC Characteristics (continued)  
Analog MUX  
Parameter  
Symbol  
Min  
Typ  
Max  
Units  
Switch Propagation Delay (Note 3)  
tpd  
60  
ns  
Comparator  
Parameter  
Symbol  
Min  
Typ  
Max  
Units  
Propagation Delay  
tpd  
25  
µs  
AC Test Conditions (unless otherwise noted): COMP1 to COMP2 = 22 pF, COMP3 = 100 pF to Ground,  
COMP4 = 47 pF to RES_IN, Capacitive Load at FORCE/SENSE combined output = 150 pF to GND,  
Capacitive Load at IVMON = 2 nF to GND,  
Note 1:  
Note 2:  
Note 3:  
Settling times are not production tested. Guaranteed by characterization.  
Measured from 2V step at VINP to FORCE output.  
Not production tested. Guaranteed by characterization.  
Test Conditions for Characterization:  
1. 15 pF load on output  
2. input signal has 5 ns rise/fall time  
3. tpd is defined as the difference between the time when the input crosses 1.5V to when the output  
changes 10% (of the total change) from the initial voltage level. (see timing diagram below).  
100%  
10%  
Output  
10%  
100%  
tpd  
tpd  
2
1
2V  
Input  
1.5V  
1.5V  
0.8V  
Note 4:  
Note 5:  
Note 6:  
Measured from 2V step at VINP to IVMON output.  
Measured from 2V step at IVIN to FORCE output.  
Measured from 2V step at IVIN to IVMON output.  
Revision 3 / December 18, 2002  
23  
www .semtech.com  
Edge4707B  
TEST AND MEASUREMENT PRODUCTS  
Ordering Information  
Model Number  
Package  
E4707BBG  
180 Lead 12 mm x 12 mm  
FlexBGA  
EVM4707BBG  
Edge4707 Evaluation Module  
This device is ESD sensitive. Care should be taken when handling  
and installing this device to avoid damaging it.  
Contact Information  
Semtech Corporation  
Test and Measurement Division  
10021 Willow Creek Rd., San Diego, CA 92131  
Phone: (858)695-1808 FAX (858)695-2633  
www .semtech.com  
Revision 3 / December 18, 2002  
24  
Edge4707B  
TEST AND MEASUREMENT PRODUCTS  
Revision History  
Current Revision Date: October 3, 2002  
Previous Revision Date: June 20, 2002  
Page#  
Section Name  
Description of Change  
Change from "Target" to "Preliminary"  
all  
11  
18  
Status  
Circuit Description  
Power Supplies  
Add: Power Supply Sequencing Section  
Break down Power Supply Rejection Ratio into FV/MI & FI/MV Modes  
DC & AC  
Characteristics  
18-22  
Replace all "TBDs" with numbers  
Revision 3 / December 18, 2002  
25  
www .semtech.com  

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