EDI8F32256C25MNC [ETC]

x32 SRAM Module ; X32 SRAM模块\n


型号：	EDI8F32256C25MNC
厂家：	ETC
描述：	x32 SRAM Module X32 SRAM模块\n 静态存储器
文件：	总7页 (文件大小：164K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

EDI8F32256C

256Kx32 Static RAM CMOS, High Speed Module

DESCRIPTION

FEATURES

256Kx32 bit CMOS Static

The EDI8F32256C is a high speed 8Mb Static RAM module

organized as 256K words by 32 bits. This module is constructed

from eight 256Kx4 Static RAMs in SOJ packages on an epoxy

laminate (FR4) board.

Random Access Memory

Access Times: 12, 15, 20, and 25ns

Individual Byte Selects

Four chip enables (EØ-E3) are used to independently enable the

four bytes. Reading or writing can be executed on individual

bytes or any combination of multiple bytes through proper use of

selects.

Fully Static, No Clocks

TTL Compatible I/O

High Density Package with JEDEC Standard Pinouts

64 Pin ZIP, No. 85

The EDI8F32256C is offered in 64 pin ZIP/SIMM package which

enables eight megabits of memory to be placed in less than 1.4

square inches of board space.

64 Lead Angled SIMM, No. 32

64 Lead SIMM, No. 333

All inputs and outputs are TTL compatible and operate from a

single 5V supply. Fully asynchronous circuitry requires no clocks

or refreshing for operation and provides equal access and cycle

times for ease of use.

Common Data Inputs and Outputs

Single +5V (±10%) Supply Operation

The ZIP and SIMM modules contain two pins, PD1 and PD2,

which are used to identify module memory density in applications

where alternate modules can be interchanged.

FIG. 1

PIN NAMES

PIN CONFIGURATIONS AND BLOCK DIAGRAM

AØ-A17

EØ-E3

Address Inputs

Chip Enables

Write Enables

Output Enable

Common Data Input/Output

Power (+5V±10%)

Ground

DQØ-DQ31

VCC

VSS

Aug. 2001 Rev. 13

ECO #14561

White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com

EDI8F32256C

ABSOLUTE MAXIMUM RATINGS*

RECOMMENDED DC OPERATING CONDITIONS

Voltage on any pin relative to VSS

Operating Temperature TA (Ambient)

Commercial

Industrial

Storage Temperature, Plastic

Power Dissipation

-0.5V to 7.0V

Parameter

Sym

VCC

VSS

VIH

Min

4.5

2.2

-0.3

Typ

5.0

Max

5.5

Units

Supply Voltage

Input High Voltage

Input Low Voltage

0°C to +70°C

-40°C to +85°C

-55°C to +125°C

8.0 Watt

VCC+0.3V

0.8

VIL

Output Current

20 mA

*Stress greater than those listed under "Absolute Maximum Ratings" may cause

permanent damage to the device. This is a stress rating only and functional operation

of the device at these or any other conditions greater than those indicated in the

operational sections of this specification is not implied. Exposure to absolute maximum

rating conditions for extended periods may affect reliability.

AC TEST CONDITIONS

Input Pulse Levels

VSS to 3.0V

5ns

Input Rise and Fall Times

Input and Output Timing Levels

Output Load

1.5V

1TTL, CL = 30pF

(note: For TEHQZ,TGHQZ and TWLQZ, CL = 5pF)

DC ELECTRICAL CHARACTERISTICS

Parameter

Sym

Conditions

Min

Max

12-25

800

240

Units

Operating Power Supply Current

Standby (TTL) Power Supply Current

Full Standby Power Supply Current

CMOS

ICC1

ICC2

ICC3

W, E = VIL, II/O = 0mA, Min Cycle

E ³VIH, VIN £VIL or VIN ³VIH

E ³ VCC-0.2V

VIN ³VCC-0.2V or VIN £ 0.2V

Input Leakage Current

Output Leakage Current

Output High Voltage

Output Low Voltage

ILI

ILO

VOH

VOL

VIN = 0V to VCC

V I/O = 0V to VCC

IOH = -4.0mA

2.4

±80

±20

µA

IOL = 8.0mA

0.4

*Typical: TA = 25°C, VCC = 5.0V

CAPACITANCE

TRUTH TABLE

(f=1.0MHz, VIN=VCC or VSS)

Mode

Standby

Read

Output

HIGH Z

DOUT

DIN

Power

ICC3

ICC1

Parameter

Address Lines

Data Lines

Chip Enable Line

Write Control Line

Sym

CD/Q

Max

Unit

Write

Output Deselect

HIGH Z

These parameters are sampled, not 100% tested.

White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com

Aug. 2001 Rev. 13

ECO #14561

EDI8F32256C

AC CHARACTERISTICS READ CYCLE

Symbol

12ns

15ns

20ns

25ns

Parameter

JEDEC Alt.

Min Max Min Max Min

Max Min Max Units

Read Cycle Time

Address Access Time

Chip Enable Access

TAVAV TRC

TAVQV TAA

TELQV TACS

TELQX TCLZ

TEHQZ TCHZ

TAVQX TOH

TGLQV TOE

TGLQX TOLZ

TGHQZ TOHZ

Chip Enable to Output in Low Z (1)

Chip Disable to Output in High Z (1)

Output Hold from Address Change

Output Enable to Output Valid

Output Enable to Output in Low Z (1)

Output Disable to Output in High Z (1)

Note 1: Parameter guaranteed, but not tested.

FIG. 2

READ CYCLE 1 - W HIGH, G, E LOW

TAVAV

ADDRESS 1

ADDRESS 2

TAVQX

TAVQV

DATA 2

DATA 1

FIG. 3

READ CYCLE 2 - W HIGH

TAVAV

TAVQV

TELQV

TELQX

TEHQZ

TGHQZ

TGLQV

TGLQX

Aug. 2001 Rev. 13

ECO #14561

White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com

EDI8F32256C

AC CHARACTERISTICS WRITE CYCLE

Symbol

10ns

12ns

15ns

20ns

25ns

Parameter

JEDEC Alt.

Min Max Min Max Min

Max Min Max Min Max Units

Write Cycle Time

Chip Enable to End of Write

TAVAV TWC

TELWH TCW

TWLEH TCW

Address Setup Time

Address Valid to End of Write

Write Pulse Width

TAVWL TAS

TAVEL TAS

TAVWH TAW

TAVEH TAW

TWLWH TWP

TELEH TWP

Write Recovery Time

Data Hold Time

TWHAX TWR

TEHAX TWR

TWHDX TDH

TEHDX TDH

Write to Output in High Z (1)

Data to Write Time

TWLQZ TWHZ

TDVWH TDW

TDVEH TDW

Output Active from End of Write (1)

TWHQX TWLZ

Note 1: Parameter guaranteed, but not tested.

White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com

Aug. 2001 Rev. 13

ECO #14561

EDI8F32256C

FIG. 4

WRITE CYCLE 1 - W CONTROLLED

TAVAV

TELWH

TWHAX

TWHDX

TAVWH

TWLWH

TAVWL

TDVWH

HIGH Z

DATA VALID

TWHQX

TWLQZ

FIG. 5

WRITE CYCLE 2 - E CONTROLLED

TAVAV

TAVEL

TELEH

TAVEH

TEHAX

TWLEH

TDVEH

TEHDX

DATA VALID

HIGH Z

Aug. 2001 Rev. 13

ECO #14561

White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com

EDI8F32256C

ORDERING INFORMATION

Part Number

Speed

Package

No.

(ns)

EDI8F32256C12MNC

EDI8F32256C15MNC

EDI8F32256C20MNC

EDI8F32256C25MNC

EDI8F32256C12MMC

EDI8F32256C15MMC

EDI8F32256C20MMC

EDI8F32256C25MMC

EDI8F32256C12MZC

EDI8F32256C15MZC

EDI8F32256C20MZC

EDI8F32256C25MZC

333

NOTE: 1. For Gold SIMM change form EDI8F to EDI8G.

PACKAGE DESCRIPTION

PACKAGE NO. 32: 64 LEAD ANGLED SIMM

White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com

Aug. 2001 Rev. 13

ECO #14561

EDI8F32256C

PACKAGE NO. 85: 64 PIN ZIP

PACKAGE NO. 333: 64 LEAD SIMM

ALL DIMENSIONS ARE IN INCHES

Aug. 2001 Rev. 13

ECO #14561

White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com

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