EL5128IY-T7 [ETC]

Operational Amplifier ; 运算放大器\n
EL5128IY-T7
型号: EL5128IY-T7
厂家: ETC    ETC
描述:

Operational Amplifier
运算放大器\n

运算放大器 光电二极管
文件: 总11页 (文件大小:130K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
EL5128  
®
Data Sheet  
November 22, 2002  
FN7000  
Dual V  
Buffer  
Amplifier & Gamma Reference  
Features  
COM  
• Dual VCOM amplifier  
The EL5128 integrates two V  
COM  
amplifiers with a single gamma  
reference buffer. Operating on  
• Single gamma reference buffer  
• 12MHz -3dB bandwidth  
• Supply voltage = 4.5V to 16.5V  
• Low supply current = 2.0mA  
• High slew rate = 10V/µs  
• Unity-gain stable  
®
supplies ranging from 5V to 15V, while consuming only  
2.0mA, the EL5128 has a bandwidth of 12MHz (-3dB) and  
provides common mode input ability beyond the supply rails,  
as well as rail-to-rail output capability. This enables this  
amplifier to offer maximum dynamic range at any supply  
voltage. The EL5128 also features fast slewing and settling  
times, as well as a high output drive capability of 30mA (sink  
and source).  
• Beyond the rails input capability  
• Rail-to-rail output swing  
• Ultra-small package  
The EL5128 is targeted at TFT-LCD applications, including  
notebook panels, monitors, and LCD-TVs. It is available in  
the 10-pin MSOP package and is specified for operation  
over the -40°C to +85°C temperature range.  
Applications  
• TFT-LCD drive circuits  
• Notebook displays  
• LCD desktop monitors  
• LCD-TVs  
Pinout  
EL5128IY  
(10-PIN MSOP)  
TOP VIEW  
Ordering Information  
VOUTA  
VINA-  
VINA+  
VS+  
1
2
3
4
5
10 VOUTB  
PART NUMBER  
PACKAGE TAPE & REEL OUTLINE #  
9
8
7
6
VINB-  
VINB+  
VS-  
-
+
+
-
EL5128IY  
10-Pin MSOP  
10-Pin MSOP  
10-Pin MSOP  
-
MDP0043  
MDP0043  
MDP0043  
EL5128IY-T7  
EL5128IY-T13  
7”  
13”  
VINC  
VOUTC  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-ELANTEC or 408-945-1323 | Intersil (and design) is a registered trademark of Intersil Americas Inc.  
Elantec is a registered trademark of Elantec Semiconductor, Inc.  
1
Copyright © Intersil Americas Inc. 2002. All Rights Reserved  
EL5128  
Absolute Maximum Ratings  
Thermal Information  
o
Supply Voltage between V + and V -. . . . . . . . . . . . . . . . . . . .+18V  
Maximum Die Temperature . . . . . . . . . . . . . . . . . . . . . . . . . .+125 C  
S
S
o
o
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . .V - - 0.5V, V + 0.5V  
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . -65 C to +150 C  
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves  
S
S
Maximum Continuous Output Current . . . . . . . . . . . . . . . . . . 30mA  
ESD Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2kV  
Operating Conditions  
o
o
Operating Temperature . . . . . . . . . . . . . . . . . . . . . . -40 C to +85 C  
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the  
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.  
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are at  
the specified temperature and are pulsed tests, therefore: T = T = T  
A
J
C
Electrical Specifications  
V + = +5V, V - = -5V, R = 10kand C = 10pF to 0V, T = 25°C unless otherwise specified.  
S
S
L
L
A
PARAMETER  
DESCRIPTION  
CONDITION  
MIN  
TYP  
MAX  
12  
UNIT  
Input Characteristics  
V
Input Offset Voltage  
Average Offset Voltage Drift  
Input Bias Current  
V
= 0V  
= 0V  
2
5
mV  
µV/°C  
nA  
OS  
CM  
CM  
a
TCV  
OS  
I
V
2
50  
B
R
C
Input Impedance  
1
GΩ  
pF  
IN  
IN  
Input Capacitance  
1.35  
CMIR  
Common-Mode Input Range  
Common-Mode Rejection Ratio  
Open-Loop Gain  
(V  
(V  
amps)  
-5.5  
50  
+5.5  
V
COM  
COM  
CMRR  
amps) for V from -5.5V to +5.5V  
IN  
70  
95  
dB  
A
-4.5V V  
-4.5V V  
≤ +4.5V (V  
amps)  
COM  
75  
dB  
VOL  
OUT  
OUT  
AV  
Voltage Gain  
≤ +4.5V  
0.995  
1.005  
-4.85  
V/V  
Output Characteristics  
V
Output Swing Low  
Output Swing High  
Short Circuit Current  
Output Current  
I = -5mA  
-4.92  
4.92  
±120  
±30  
V
V
OL  
L
V
I = 5mA  
4.85  
OH  
L
I
I
mA  
mA  
SC  
OUT  
Power Supply Performance  
PSRR Power Supply Rejection Ratio  
Supply Current (Per Amplifier)  
Dynamic Performance  
SR Slew Rate  
V
is moved from ±2.25V to ±7.75V  
60  
80  
dB  
µA  
S
I
No load  
660  
1000  
S
b
-4.0V V  
≤ +4.0V, 20% to 80%  
10  
500  
12  
8
V/µs  
ns  
OUT  
t
Settling to +0.1% (A = +1)  
V
(A = +1), V = 2V step  
V O  
S
BW  
-3dB Bandwidth  
R
R
R
= 10k, C = 10pF  
MHz  
MHz  
°
L
L
L
L
GBWP  
PM  
Gain-Bandwidth Product  
Phase Margin  
= 10k, C = 10pF (V  
amps)  
amps)  
L
COM  
COM  
= 10k, C = 10pF (V  
50  
75  
L
CS  
Channel Separation  
f = 5MHz  
dB  
a.Measured over operating temperature range  
b.Slew rate is measured on rising and falling edges  
2
EL5128  
Electrical Specifications  
V + = 5V, V -= 0V, R = 10kand C = 10pF to 2.5V, T = 25°C unless otherwise specified.  
S
S
L
L
A
PARAMETER  
Input Characteristics  
Input Offset Voltage  
DESCRIPTION  
CONDITION  
MIN  
TYP  
MAX  
10  
UNIT  
V
V
a
= 2.5V  
= 2.5V  
2
5
mV  
µV/°C  
nA  
OS  
CM  
CM  
TCV  
Average Offset Voltage Drift  
Input Bias Current  
OS  
I
V
2
50  
B
R
C
Input Impedance  
1
GΩ  
pF  
IN  
IN  
Input Capacitance  
1.35  
CMIR  
Common-Mode Input Range  
Common-Mode Rejection Ratio  
Open-Loop Gain  
-0.5  
45  
+5.5  
V
CMRR  
for V from -0.5V to +5.5V  
IN  
66  
95  
dB  
A
A
0.5V V  
0.5V V  
≤+ 4.5V  
≤+ 4.5V  
75  
dB  
VOL  
OUT  
OUT  
Voltage Gain  
0.995  
1.005  
150  
V/V  
V
Output Characteristics  
V
V
Output Swing Low  
Output Swing High  
Short Circuit Current  
Output Current  
I = -5mA  
80  
mV  
V
OL  
L
I = +5mA  
4.85  
4.92  
±120  
±30  
OH  
L
I
I
mA  
mA  
SC  
OUT  
Power Supply Performance  
PSRR Power Supply Rejection Ratio  
Supply Current (Per Amplifier)  
Dynamic Performance  
SR Slew Rate  
V
is moved from 4.5V to 15.5V  
60  
80  
dB  
µA  
S
I
No load  
660  
1000  
S
b
1V V  
4V, 20% to 80%  
10  
500  
12  
8
V/µs  
ns  
OUT  
t
Settling to +0.1% (A = +1)  
V
(A = +1), V = 2V step  
S
V
O
BW  
-3dB Bandwidth  
R
R
R
= 10k, C = 10pF  
MHz  
MHz  
°
L
L
L
L
GBWP  
PM  
Gain-Bandwidth Product  
Phase Margin  
= 10 k, C = 10pF  
L
= 10 k, C = 10 pF  
50  
75  
L
CS  
Channel Separation  
f = 5MHz  
dB  
a.Measured over operating temperature range  
b.Slew rate is measured on rising and falling edges  
3
EL5128  
Electrical Specifications  
V + = 15V, V - = 0V, R = 10kand C = 10pF to 7.5V, T = 25°C unless otherwise specified.  
S
S
L
L
A
PARAMETER  
DESCRIPTION  
CONDITION  
MIN  
TYP  
MAX  
14  
UNIT  
Input Characteristics  
V
Input Offset Voltage  
Average Offset Voltage Drift  
Input Bias Current  
V
a
= 7.5V  
= 7.5V  
2
5
mV  
µV/°C  
nA  
OS  
CM  
CM  
TCV  
OS  
I
V
2
50  
B
R
C
Input Impedance  
1
GΩ  
pF  
IN  
IN  
Input Capacitance  
1.35  
CMIR  
Common-Mode Input Range  
Common-Mode Rejection Ratio  
Open-Loop Gain  
-0.5  
53  
+15.5  
V
CMRR  
for V from -0.5V to +15.5V  
IN  
72  
95  
dB  
A
A
0.5V V  
0.5V V  
14.5V  
14.5V  
75  
dB  
VOL  
OUT  
OUT  
Voltage Gain  
0.995  
1.005  
150  
V/V  
V
Output Characteristics  
V
V
Output Swing Low  
Output Swing High  
Short Circuit Current  
Output Current  
I = -5mA  
80  
mV  
V
OL  
L
I = +5mA  
14.85  
14.92  
±120  
±30  
OH  
L
I
I
mA  
mA  
SC  
OUT  
Power Supply Performance  
PSRR Power Supply Rejection Ratio  
Supply Current (Per Amplifier)  
Dynamic Performance  
SR Slew Rate  
V
is moved from 4.5V to 15.5V  
60  
80  
dB  
µA  
S
I
No load  
660  
1000  
S
b
1V V  
14V, 20% to 80%  
10  
500  
12  
8
V/µs  
ns  
OUT  
t
Settling to +0.1% (A = +1)  
V
(A = +1), V = 2V step  
S
V
O
BW  
-3dB Bandwidth  
R
R
R
= 10k, C = 10pF  
MHz  
MHz  
°
L
L
L
L
GBWP  
PM  
Gain-Bandwidth Product  
Phase Margin  
= 10k, C = 10pF  
L
= 10k, C = 10 pF  
50  
75  
L
CS  
Channel Separation  
f = 5MHz  
dB  
a.Measured over operating temperature range  
b.Slew rate is measured on rising and falling edges  
4
EL5128  
Typical Performance Curves  
Input Offset Voltage Distribution  
Input Offset Voltage Drift  
1800  
70  
60  
50  
40  
30  
20  
10  
0
Typical  
Production  
Distribution  
Typical  
Production  
Distribution  
V = 5V  
S
V = 5V  
A
S
1600  
T =25°C  
1400  
1200  
1000  
800  
600  
400  
200  
0
Input Offset Voltage Drift, TCV (µV/°C)  
OS  
Input Offset Voltage (mV)  
Input Offset Voltage vs Temperature  
Input Bias Current vs Temperature  
10  
5
2.0  
0.0  
V = 5V  
S
V = 5V  
S
0
-5  
-2.0  
-50  
0
50  
100  
150  
-50  
0
50  
100  
150  
Temperature (°C)  
Temperature (°C)  
Output Low Voltage vs Temperature  
Output High Voltage vs Temperature  
-4.91  
-4.92  
-4.93  
-4.94  
-4.95  
-4.96  
-4.97  
4.97  
4.96  
4.95  
4.94  
4.93  
V = 5V  
S
V = 5V  
S
I
=-5mA  
I
=5mA  
OUT  
OUT  
-50  
0
50  
100  
150  
-50  
0
50  
100  
150  
Temperature (°C)  
Temperature (°C)  
Open-Loop Gain vs Temperature  
Slew Rate vs Temperature  
10.40  
10.35  
10.30  
10.25  
100  
90  
V = 5V  
V = 5V  
S
S
R =10kΩ  
L
80  
-50  
0
50  
100  
150  
-50  
0
50  
100  
150  
Temperature (°C)  
Temperature (°C)  
5
EL5128  
Typical Performance Curves  
Supply Current per Amplifier vs Supply Voltage  
Supply Current per Amplifier vs Temperature  
700  
600  
500  
400  
300  
T =25°C  
A
0.55  
0.5  
V = 5V  
S
0.45  
-50  
0
50  
100  
150  
0
5
10  
15  
20  
Temperature (°C)  
Supply Voltage (V)  
Frequency Response for Various R  
Open Loop Gain and Phase vs Frequency  
L
5
0
200  
150  
100  
50  
20  
10kΩ  
1kΩ  
-30  
Phase  
-80  
560Ω  
150Ω  
C =10pF  
L
-5  
A =1  
V
V = 5V  
S
-130  
-180  
-230  
V = 5V, T =25°C  
S
A
R =10Kto GND  
-10  
L
0
C =12pF to GND  
L
Gain  
-15  
100k  
-50  
1M  
100M  
10M  
10  
100  
1k  
10k  
100k  
1M  
10M 100M  
Frequency (Hz)  
Frequency (Hz)  
Frequency Response for Various C  
Closed Loop Output Impedance vs Frequency  
L
20  
200  
160  
120  
80  
R =10kΩ  
L
A =1  
V
10  
0
A =1  
V
V = 5V  
S
V = 5V  
S
T =25°C  
A
12pF  
50pF  
-10  
-20  
-30  
100pF  
40  
1000pF  
0
10k  
100k  
1M  
10M  
100M  
100  
1M  
10M  
Frequency (Hz)  
Frequency (Hz)  
Maximum Output Swing vs Frequency  
CMRR vs Frequency  
80  
60  
40  
20  
0
12  
10  
8
6
V = 5V  
S
T =25°C  
A
4
A =1  
V
R =10kΩ  
L
V = 5V  
A
S
2
C =12pF  
L
T =25°C  
Distortion <1%  
0
1k  
10k  
100k  
1M  
10k  
100  
1M  
10M  
100  
10M  
Frequency (Hz)  
Frequency (Hz)  
6
EL5128  
Typical Performance Curves  
Input Voltage Noise Spectral Density vs Frequency  
PSRR vs Frequency  
600  
100  
80  
PSRR+  
PSRR-  
60  
40  
20  
10  
V = 5V  
S
T =25°C  
A
1
0
100  
1k  
10k  
100k  
1M  
10M  
100M  
1k  
10k  
100k  
1M  
100  
10M  
Frequency (Hz)  
Frequency (Hz)  
Total Harmonic Distortion + Noise vs Frequency  
Channel Separation vs Frequency Response  
0.010  
0.009  
0.008  
0.007  
0.006  
0.005  
0.004  
0.003  
0.002  
0.001  
-60  
-80  
Measured Channel A to B  
V = 5V  
S
R =10kΩ  
L
A =1  
V
V
=220mV  
IN  
RMS  
-100  
-120  
-140  
V = 5V  
S
R =10kΩ  
L
A =1  
V
IN  
V
=1V  
RMS  
1k  
10k  
100k  
1k  
10k  
100k  
1M  
6M  
Frequency (Hz)  
Frequency (Hz)  
Settling Time vs Step Size  
Small-Signal Overshoot vs Load Capacitance  
V = 5V  
S
V = 5V  
S
90  
70  
50  
30  
10  
4
3
A =1  
V
A =1  
V
R =10kΩ  
R =10kΩ  
L
L
IN  
C =12pF  
L
V
= 50mV  
0.1%  
2
T =25°C  
A
T =25°C  
A
1
0
-1  
-2  
-3  
-4  
0.1%  
600  
0
200  
400  
800  
10  
100  
1000  
Load Capacitance (pF)  
Settling Time (nS)  
Small Signal Transient Response  
Large Signal Transient Response  
1V  
1µS  
50mV  
200ns  
V = 5V  
S
T =25°C  
A
A =1  
V
R =10kΩ  
L
C =12pF  
L
V = 5V  
S
T =25°C  
A
A =1  
V
R =10kΩ  
L
C =12pF  
L
7
EL5128  
Pin Descriptions  
PIN  
NUMBER  
PIN NAME  
PIN FUNCTION  
Amplifier A Output  
EQUIVALENT CIRCUIT  
1
VOUTA  
V
S+  
V
S-  
GND  
Circuit 1  
2
VINA-  
Amplifier A Inverting Input  
V
S+  
V
S-  
Circuit 2  
3
4
VINA+  
VS+  
Amplifier A Non-Inverting Input  
Positive Power Supply  
Amplifier C  
(Reference Circuit 2)  
5
VINC  
(Reference Circuit 2)  
(Reference Circuit 2)  
6
VOUTC  
VS-  
Amplifier C Output  
7
Negative Power Supply  
Amplifier B Non-Inverting Input  
Amplifier B Inverting Input  
Amplifier B Output  
8
VINB+  
VINB-  
VOUTB  
(Reference Circuit 2)  
(Reference Circuit 2)  
(Reference Circuit 1)  
9
10  
8
EL5128  
Output Phase Reversal  
The EL5128 is immune to phase reversal as long as the  
input voltage is limited from (V -) -0.5V to (V +) +0.5V.  
Figure 2 shows a photo of the output of the device with the  
input voltage driven beyond the supply rails. Although the  
device's output will not change phase, the input's over-  
voltage should be avoided. If an input voltage exceeds  
supply voltage by more than 0.6V, electrostatic protection  
diodes placed in the input stage of the device begin to  
conduct and over-voltage damage could occur.  
Applications Information  
Product Description  
S
S
The EL5128 voltage feedback amplifier/buffer combination is  
fabricated using a high voltage CMOS process. It exhibits  
rail-to-rail input and output capability, it is unity gain stable,  
and has low power consumption (500µA per amplifier).  
These features make the EL5128 ideal for a wide range of  
general-purpose applications. Connected in voltage follower  
mode and driving a load of 10kand 12pF, the EL5128 has  
a -3dB bandwidth of 12MHz while maintaining a 10V/µs slew  
rate.  
FIGURE 2. Operation with Beyond-the-Rails Input  
Operating Voltage, Input, and Output  
1V  
100µs  
The EL5128 is specified with a single nominal supply voltage  
from 5V to 15V or a split supply with its total range from 5V  
to 15V. Correct operation is guaranteed for a supply range of  
4.5V to 16.5V. Most EL5128 specifications are stable over  
both the full supply range and operating temperatures of -  
40°C to +85°C. Parameter variations with operating voltage  
and/or temperature are shown in the typical performance  
curves.  
V = 2.5V  
S
T =25°C  
A
A =1  
V
V
=6V  
P-P  
IN  
1V  
The input common-mode voltage range of the amplifiers  
extends 500mV beyond the supply rails. The output swings  
of the EL5128 typically extend to within 80mV of positive and  
negative supply rails with load currents of 5mA. Decreasing  
load currents will extend the output voltage range even  
closer to the supply rails. Figure 1 shows the input and  
output waveforms for the device in the unity-gain  
Power Dissipation  
With the high-output drive capability of the EL5128 amplifier,  
it is possible to exceed the 125°C “absolute-maximum  
junction temperature” under certain load current conditions.  
Therefore, it is important to calculate the maximum junction  
temperature for the application to determine if load  
conditions need to be modified for the amplifier to remain in  
the safe operating area.  
configuration. Operation is from ±5V supply with a 10kload  
connected to GND. The input is a 10V  
sinusoid. The  
P-P  
output voltage is approximately 9.985V  
.
P-P  
The maximum power dissipation allowed in a package is  
determined according to:  
FIGURE 1. Operation with Rail-to-Rail Input and Output  
T
- T  
AMAX  
JMAX  
--------------------------------------------  
P
=
DMAX  
Θ
JA  
V = 5V  
S
where:  
T =25°C  
A
A =1  
V
IN  
V
=10V  
P-  
• T  
• T  
= Maximum junction temperature  
= Maximum ambient temperature  
JMAX  
AMAX  
θ = Thermal resistance of the package  
JA  
• P  
DMAX  
= Maximum power dissipation in the package  
The maximum power dissipation actually produced by an IC  
is the total quiescent supply current times the total power  
supply voltage, plus the power in the IC due to the loads, or:  
Short Circuit Current Limit  
The EL5128 will limit the short circuit current to ±120mA if  
the output is directly shorted to the positive or the negative  
supply. If an output is shorted indefinitely, the power  
dissipation could easily increase such that the device may  
be damaged. Maximum reliability is maintained if the output  
continuous current never exceeds ±30mA. This limit is set by  
the design of the internal metal interconnects.  
P
= Σi × [V × I  
+ (V + - V  
i) × I  
i]  
LOAD  
DMAX  
S
SMAX  
S
OUT  
when sourcing, and:  
P
= Σi × [V × I  
+ (V  
i - V -) × I  
i]  
LOAD  
DMAX  
S
SMAX  
OUT  
S
9
EL5128  
when sinking.  
where:  
Driving Capacitive Loads  
The EL5128 can drive a wide range of capacitive loads. As  
load capacitance increases, however, the -3dB bandwidth of  
the device will decrease and the peaking increase. The  
amplifiers drive 10pF loads in parallel with 10kwith just  
1.5dB of peaking, and 100pF with 6.4dB of peaking. If less  
peaking is desired in these applications, a small series  
resistor (usually between 5and 50) can be placed in  
series with the output. However, this will obviously reduce  
the gain slightly. Another method of reducing peaking is to  
add a “snubber” circuit at the output. A snubber is a shunt  
load consisting of a resistor in series with a capacitor. Values  
of 150and 10nF are typical. The advantage of a snubber is  
that it does not draw any DC load current or reduce the gain  
• V = Total supply voltage  
S
• I  
= Maximum supply current per amplifier  
SMAX  
• V  
i = Maximum output voltage of the application  
OUT  
• I  
i = Load current  
LOAD  
If we set the two P  
can solve for R  
LOAD  
and 4 provide a convenient way to see if the device will  
overheat. The maximum safe power dissipation can be  
found graphically, based on the package type and the  
ambient temperature. By using the previous equation, it is a  
equations equal to each other, we  
i to avoid device overheat. Figures 3  
DMAX  
simple matter to see if P  
exceeds the device's power  
Power Supply Bypassing and Printed Circuit  
Board Layout  
DMAX  
derating curves. To ensure proper operation, it is important  
to observe the recommended derating curves in Figures 3  
and 4.  
The EL5128 can provide gain at high frequency. As with any  
high-frequency device, good printed circuit board layout is  
necessary for optimum performance. Ground plane  
construction is highly recommended, lead lengths should be  
as short as possible and the power supply pins must be well  
bypassed to reduce the risk of oscillation. For normal single  
FIGURE 3. Package Power Dissipation vs Ambient  
Temperature  
Package Power Dissipation vs Ambient Temperature  
JEDEC JESD51-7 High Effective Thermal Conductivity Test Board  
1
supply operation, where the V - pin is connected to ground,  
S
0.9  
a 0.1µF ceramic capacitor should be placed from V + to pin  
S
870mW  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0
to V - pin. A 4.7µF tantalum capacitor should then be  
S
connected in parallel, placed in the region of the amplifier.  
One 4.7µF capacitor may be used for multiple devices. This  
same capacitor combination should be placed at each  
supply pin to ground if split supplies are to be used.  
0
25  
50  
75 85  
100  
125  
Ambient Temperature (°C)  
FIGURE 4. Package Power Dissipation vs Ambient  
Temperature  
Package Power Dissipation vs Ambient Temperature  
JEDEC JESD51-3 Low Effective Thermal Conductivity Test Board  
0.6  
0.5  
486mW  
0.4  
0.3  
0.2  
0.1  
0
0
25  
50  
75 85  
100  
125  
Ambient Temperature (°C)  
10  
EL5128  
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.  
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality  
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without  
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and  
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result  
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.  
For information regarding Intersil Corporation and its products, see www.intersil.com  
11  

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