EPD [ETC]

EPD Transient Voltage Suppressors for Low Voltage Electronics (404k) ; 环保署瞬态电压抑制器用于低压电子（ 404K ）\n


型号：	EPD
厂家：	ETC
描述：	EPD Transient Voltage Suppressors for Low Voltage Electronics (404k) 环保署瞬态电压抑制器用于低压电子（ 404K ）\n 光电二极管电子
文件：	总1页 (文件大小：405K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

SI96-06

Surging Ideas

TVS Diode Application Note

PROTECTION PRODUCTS

EPD Transient Voltage Suppressors for Low Voltage

Electronics

metal

passivation

At voltages below 5V, conventional avalanche technol-

ogy is impractical. In order to achieve stand-off volt-

ages below 5V, very high impurity concentrations

(≥10⁺¹⁸cm^-3) must be used. This leads to detrimental

performance characteristics such as high capacitance

and very high reverse leakage current. In a joint

development effort, Semtech Corporation and the

University of California at Berkeley have developed a

proprietary device architecture called the Enhanced

Punch-Through Diode (EPD).

Figure 1 - EPD TVS Device Structure

Enhanced Punch-Through Mechanism

In contrast to the traditional pn structure of silicon

avalanche TVS diodes, the EPD device employs a more

complex n+p+p-n+ 4-layer structure (Figure 1). The

structure has light doping in the p+ and p- layers so the

reversed biased n+p+ junction does not avalanche.

An npn structure was chosen over a pnp structure

because it promotes higher electron mobility, improving

device clamping characteristics. A key difference

between the EPD device and traditional punch-through

devices is the base region in the npn structure. A thin

base is used to minimize the space charge voltage,

thus lowering the clamping voltage at high transient

currents. Wide base regions employed by traditional

punch through devices result in poor clamping perfor-

mance. By carefully engineering the p-base region, the

resulting device has superior leakage, clamping, and

capacitance characteristics at voltages of 2.8V and

3.3V.

Figure 2 - EPD TVS Schematic Representation

I_SB

I_PT

I_R

V_BRR

V_C

RWM

I_BRR

EPD TVS Device Operation

The IV characteristic curve of the EPD device is shown

in Figure 3. The device represents a high impedance

to the circuit up to the working voltage (V_RWM). During a

transient event, the device will begin to conduct as it is

biased in the reverse direction. When the punch-

through voltage (V_PT) is exceeded, the device enters a

low impedance state, diverting the transient current

away from the protected circuit. When the device is

conducting current, it will exhibit a slight “snap-back” or

negative resistance characteristic due to its structure.

To return to a non-conducting state, the current

through the device must fall below the snap-back

current (approximately < 50mA). In the reverse direc-

tion, the device looks like a diode with a reverse

breakdown voltage (V_BRR) of approximately 30V.

Figure 3 - EPD TVS IV Characteristic Curve

These devices are targeted towards the protection of

today’s low voltage, sub-micron ICs. The devices are

designed primarily to protect against electrostatic

discharge (ESD) on power and transmission lines, but

are also rated for switching and low level lightning

induced transients.

www.semtech.com

Revision 11/2001

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